Commit 0bd88fc6 authored by Lyude Paul's avatar Lyude Paul
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Bifrost: Note Port 3 can only write FMA passthrough

parent 36e6e27f
......@@ -313,15 +313,15 @@ The register file has four ports, two read ports, a read/write port, and a write
The format of the register part of the instruction word is as follows:
[options="header"]
|============================
| Field | Bits
| Uniform/const | 8
| Port 2 (write) | 6
| Port 3 (read/write) | 6
| Port 0 (read) | 5
| Port 1 (read) | 6
| Control | 4
|============================
|===============================
| Field | Bits
| Uniform/const | 8
| Port 2 (write) | 6
| Port 3 (read/write FMA) | 6
| Port 0 (read) | 5
| Port 1 (read) | 6
| Control | 4
|===============================
Control is what ARM calls the "register access descriptor." To save bits, if the Control field is 0, then Port 1 is disabled, and the field for Port 1 instead contains the "real" Control field in the upper 4 bits. Bit 1 is set to 1 if Port 0 is disabled, and bit 0 is reused as the high bit of Port 0, allowing you to still access all 64 registers. If the Control field isn't 0, then both Port 0 and Port 1 are always enabled. In this way, the Control field only needs to describe how Port 2 and Port 3 are configured, except for the magic 0 value, reducing the number of bits required.
......
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