- Mar 29, 2019
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Rob Herring authoreddrm/panfrost: add support for reset lines See merge request !3
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Rob Herring authored
Reset and assorted fixes See merge request !2
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Neil Armstrong authored
This patch implements the optional reset lines as described in the updated Midgard bindings patch at [1] and the Bifrost bindings proposal at [2]. [1] https://patchwork.freedesktop.org/patch/290177/?series=56046&rev=3 [2] https://patchwork.freedesktop.org/patch/292422/?series=53840&rev=2 Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com>
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- Mar 28, 2019
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Tomeu Vizoso authored
Signed-off-by:Tomeu Vizoso <tomeu.vizoso@collabora.com>
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Tomeu Vizoso authored
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- Mar 27, 2019
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Tomeu Vizoso authored
Otherwise we see the MMU complaining about what seem like missing mappings, when clients submit jobs in quick succession. Signed-off-by: -
Tomeu Vizoso authored
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Tomeu Vizoso authored
Otherwise the MMU complaints on 32bit. Signed-off-by: -
Tomeu Vizoso authored
Also put exception name resolution to a single function common to gpu, job and mmu because the hw values are consecutive and we can read status values in a block that correspond to error conditions that belong to another IP block. Signed-off-by: -
Tomeu Vizoso authored
Based on a list that Rob shared around. Signed-off-by:
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- Mar 14, 2019
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Rob Herring authored
Fixes building on x86. Signed-off-by:Rob Herring <robh@kernel.org>
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- Mar 13, 2019
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Rob Herring authored
Do some whitespace clean-up in the process. Signed-off-by:
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- Mar 12, 2019
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Rob Herring authored
The various config registers were hardcoded for T860 r2p0. Fix this to match what the vendor driver does. Signed-off-by: -
Rob Herring authored
Add panfrost_model_cmp() and panfrost_model_eq() helpers to check the GPU model. panfrost_model_cmp() works like strcmp returning negative if the model is less than the given version, positive if model is greater than the given version or 0 for exact match. Signed-off-by: -
Rob Herring authored
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Rob Herring authored
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Rob Herring authored
Multiple 'status' values for the same major and minor version are not handled correctly. Fix this. Signed-off-by: -
Rob Herring authored
Catch any null GPU addresses by not mapping address 0. Signed-off-by: -
Rob Herring authored
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- Mar 11, 2019
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Rob Herring authored
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Rob Herring authored
The T60x has an oddball ID value. Fix it up to the standard Midgard format so we (and userspace) don't have to special case it. This makes distinguishing Midgard vs. Bifrost easier. Signed-off-by: -
Rob Herring authored
This adds the initial driver for panfrost which supports Arm Mali Midgard and Bifrost family of GPUs. Currently, only the T860 Midgard GPU has been tested. Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Sean Paul <sean@poorly.run> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io> Cc: Lyude Paul <lyude@redhat.com> Cc: Eric Anholt <eric@anholt.net> Signed-off-by:
Marty E. Plummer <hanetzer@startmail.com> Signed-off-by:
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Rob Herring authored
Similar to the single handle drm_gem_object_lookup(), drm_gem_objects_lookup() takes an array of handles and returns an array of GEM objects. Signed-off-by: -
Now that we have the reservation object in the GEM object, it's easy to provide a helper for this common case. Noticed while reviewing panfrost and lima drivers. This particular version came out of v3d, which in turn was a copy from vc4. Signed-off-by:
Eric Anholt <eric@anholt.net> Signed-off-by:
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- Mar 07, 2019
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This adds a library for shmem backed GEM objects. v8: - export drm_gem_shmem_create_with_handle - call mapping_set_gfp_mask to set default zone to GFP_HIGHUSER - Add helper drm_gem_shmem_get_pages_sgt() v7: - Use write-combine for mmap instead. This is the more common case. (robher) v6: - Fix uninitialized variable issue in an error path (anholt). - Add a drm_gem_shmem_vm_open() to the fops to get proper refcounting of the pages (anholt). v5: - Drop drm_gem_shmem_prime_mmap() (Daniel Vetter) - drm_gem_shmem_mmap(): Subtract drm_vma_node_start() to get the real vma->vm_pgoff - drm_gem_shmem_fault(): Use vmf->pgoff now that vma->vm_pgoff is correct v4: - Drop cache modes (Thomas Hellstrom) - Add a GEM attached vtable v3: - Grammar (Sam Ravnborg) - s/drm_gem_shmem_put_pages_unlocked/drm_gem_shmem_put_pages_locked/ (Sam Ravnborg) - Add debug output in error path (Sam Ravnborg) Signed-off-by:
Noralf Trønnes <noralf@tronnes.org> Signed-off-by:
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Rob Herring authored
ARM Mali midgard GPU is similar to standard 64-bit stage 1 page tables, but have a few differences. Add a new format type to represent the format. The input address size is 48-bits and the output address size is 40-bits (and possibly less?). Note that the later bifrost GPUs follow the standard 64-bit stage 1 format. The differences in the format compared to 64-bit stage 1 format are: The 3rd level page entry bits are 0x1 instead of 0x3 for page entries. The access flags are not read-only and unprivileged, but read and write. This is similar to stage 2 entries, but the memory attributes field matches stage 1 being an index. The nG bit is not set by the vendor driver. This one didn't seem to matter, but we'll keep it aligned to the vendor driver. Cc: Will Deacon <will.deacon@arm.com> Cc: Robin Murphy <robin.murphy@arm.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: linux-arm-kernel@lists.infradead.org Cc: iommu@lists.linux-foundation.org Signed-off-by: -
Rob Herring authored
Move io-pgtable.h to include/linux/ and export alloc_io_pgtable_ops and free_io_pgtable_ops. This enables drivers outside drivers/iommu/ to use the ARM page table library. Specifically, some ARM Mali GPUs use the ARM page table formats. Cc: Will Deacon <will.deacon@arm.com> Cc: Robin Murphy <robin.murphy@arm.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Rob Clark <robdclark@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: iommu@lists.linux-foundation.org Cc: linux-mediatek@lists.infradead.org Cc: linux-arm-msm@vger.kernel.org Signed-off-by: -
Rob Herring authored
This reverts commit 264fce6c.
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Rob Herring authored
This reverts commit ba9877e2.
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For other driver like lima usage. Cc: Rob Herring <robh@kernel.org> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Signed-off-by:
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Maxime Ripard authored
The current code, since commit bb43d40d ("drm/sun4i: rgb: Validate the clock rate"), perform some validation on the pixel clock to filter out the EDID modes provided by monitors (through bridges) that we wouldn't be able to reach. For the usual modes, we're able to generate a perfect clock rate, so a strict check was enough. However, this had the side effect of preventing displays that would work otherwise to operate properly, since we would pretty much never be able to generate an exact rate for those displays, even though we would fall within that panel tolerance. This was also shown to happen for unusual modes exposed through EDIDs, for example on eDP panels. We can work around this by simplifying a bit the problem: no panels we've encountered so far actually needed that check. All of them are tied to a particular board when it is produced, and made to work with the Allwinner BSP. That pretty much guarantees that we never have a pixel clock out of reach. On the other hand, the EDIDs modes that needed to be validated have always been exposed through bridges. Let's just use that metric to instead of validating all modes, only validate modes when we have a bridge attached. It should be good enough for now, while we still have room for improvements or refinements using the display_timings structure for example for panels. We also add a tolerance for EDID-based modes instead of doing a strict check. This tolerance is of 0.5% which is the one advertised in the VESA DVT and CVT specs. If that needed to be extended in the future, we can add a custom module parameter to relax it a bit. Fixes: bb43d40d ("drm/sun4i: rgb: Validate the clock rate") Signed-off-by:
Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Vasily Khoruzhick <anarsoul@gmail.com> # tested on pinebook Reviewed-by:
Paul Kocialkowski <paul.kocialkowski@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/ec2dc2a7b3d4bd44f7a2a6e1c1813f92449a7310.1551191081.git-series.maxime.ripard@bootlin.com
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Maxime Ripard authored
Our clock rate variables are getting pretty close to the LONG_MAX / ULONG_MAX limit, especially since we will start doing arithmetic on it. Move those types to unsigned long long to be sure we don't overflow their type. Signed-off-by:
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Maxime Ripard authored
We'll need the bridge pointer, if any, in the mode_valid callback in addition to the init function. Store the pointer to the bridge in the rgb private structure. Signed-off-by:
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Maxime Ripard authored
The TCON driver used to need the panel pointer in order to configure the tcon according to the various parameters of the panel. However, this has evolved over time (especially to support bridges), and therefore the panel pointer isn't needed anymore by the TCON driver. Move that pointer to the LVDS and RGB encoders drivers. Signed-off-by:
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Maxime Ripard authored
The preferred bpp for the fbdev emulation buffer has been 32 so far, which means that by default we will allocate an 8MB buffer with a 1920x1080 resolution. Worse this memory will be allocated from the CMA pool, and will never be freed even if we don't use the fbdev emulation. Therefore, reducing it is a big deal, and switching to 16bpp by default will gain us around 4MB at 1920x1080, while keeping decent color depth. And users still have the option to switch to 32bpp using the kernel command line. Signed-off-by:
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- Mar 06, 2019
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Sean Paul authored
Picking up v5.0 + missed misc-fixes from last release Signed-off-by:Sean Paul <seanpaul@chromium.org>
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Paul Kocialkowski authored
In order to test whether the load tracker is working as expected, we need the ability to compare the commit result with the underrun indication. With the load tracker always enabled, commits that are expected to trigger an underrun are always rejected, so userspace cannot get the actual underrun indication from the hardware. Add a debugfs entry to disable/enable the load tracker, so that a DRM commit expected to trigger an underrun can go through with the load tracker disabled. The underrun indication is then available to userspace and can be checked against the commit result with the load tracker enabled. Signed-off-by:
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