Commit 890d6a54 authored by Tomeu Vizoso's avatar Tomeu Vizoso Committed by Thierry Reding

clk: tegra: Have EMC clock implement determine_rate()

As opposed to round_rate(), determine_rate() can take rate constraints
into account when choosing the best rate.
Signed-off-by: default avatarTomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent ac67477f
...@@ -116,8 +116,11 @@ static unsigned long emc_recalc_rate(struct clk_hw *hw, ...@@ -116,8 +116,11 @@ static unsigned long emc_recalc_rate(struct clk_hw *hw,
* safer since things have EMC rate floors. Also don't touch parent_rate * safer since things have EMC rate floors. Also don't touch parent_rate
* since we don't want the CCF to play with our parent clocks. * since we don't want the CCF to play with our parent clocks.
*/ */
static long emc_round_rate(struct clk_hw *hw, unsigned long rate, static long emc_determine_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate) unsigned long min_rate,
unsigned long max_rate,
unsigned long *best_parent_rate,
struct clk_hw **best_parent_hw)
{ {
struct tegra_clk_emc *tegra; struct tegra_clk_emc *tegra;
u8 ram_code = tegra_read_ram_code(); u8 ram_code = tegra_read_ram_code();
...@@ -126,18 +129,26 @@ static long emc_round_rate(struct clk_hw *hw, unsigned long rate, ...@@ -126,18 +129,26 @@ static long emc_round_rate(struct clk_hw *hw, unsigned long rate,
tegra = container_of(hw, struct tegra_clk_emc, hw); tegra = container_of(hw, struct tegra_clk_emc, hw);
for (i = 0; i < tegra->num_timings; i++) { for (i = 0; i < tegra->num_timings; i++) {
if (tegra->timings[i].ram_code != ram_code) if (tegra->timings[i].ram_code != ram_code)
continue; continue;
timing = tegra->timings + i;
timing = tegra->timings + i; if (timing->rate > max_rate) {
i = min(i, 1);
return tegra->timings[i - 1].rate;
}
if (timing->rate < min_rate)
continue;
if (timing->rate >= rate) if (timing->rate >= rate)
return timing->rate; return timing->rate;
} }
if (timing) if (timing)
return timing->rate; return timing->rate;
return __clk_get_rate(hw->clk); return __clk_get_rate(hw->clk);
} }
...@@ -451,7 +462,7 @@ static int load_timings_from_dt(struct tegra_clk_emc *tegra, ...@@ -451,7 +462,7 @@ static int load_timings_from_dt(struct tegra_clk_emc *tegra,
static const struct clk_ops tegra_clk_emc_ops = { static const struct clk_ops tegra_clk_emc_ops = {
.recalc_rate = emc_recalc_rate, .recalc_rate = emc_recalc_rate,
.round_rate = emc_round_rate, .determine_rate = emc_determine_rate,
.set_rate = emc_set_rate, .set_rate = emc_set_rate,
.get_parent = emc_get_parent, .get_parent = emc_get_parent,
}; };
......
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