Commit 2f4bf528 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'powerpc-4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull powerpc updates from Michael Ellerman:

 - Kconfig: remove BE-only platforms from LE kernel build from Boqun
   Feng
 - Refresh ps3_defconfig from Geoff Levand
 - Emit GNU & SysV hashes for the vdso from Michael Ellerman
 - Define an enum for the bolted SLB indexes from Anshuman Khandual
 - Use a local to avoid multiple calls to get_slb_shadow() from Michael
   Ellerman
 - Add gettimeofday() benchmark from Michael Neuling
 - Avoid link stack corruption in __get_datapage() from Michael Neuling
 - Add virt_to_pfn and use this instead of opencoding from Aneesh Kumar
   K.V
 - Add ppc64le_defconfig from Michael Ellerman
 - pseries: extract of_helpers module from Andy Shevchenko
 - Correct string length in pseries_of_derive_parent() from Nathan
   Fontenot
 - Free the MSI bitmap if it was slab allocated from Denis Kirjanov
 - Shorten irq_chip name for the SIU from Christophe Leroy
 - Wait 1s for secondaries to enter OPAL during kexec from Samuel
   Mendoza-Jonas
 - Fix _ALIGN_* errors due to type difference, from Aneesh Kumar K.V
 - powerpc/pseries/hvcserver: don't memset pi_buff if it is null from
   Colin Ian King
 - Disable hugepd for 64K page size, from Aneesh Kumar K.V
 - Differentiate between hugetlb and THP during page walk from Aneesh
   Kumar K.V
 - Make PCI non-optional for pseries from Michael Ellerman
 - Individual System V IPC system calls from Sam bobroff
 - Add selftest of unmuxed IPC calls from Michael Ellerman
 - discard .exit.data at runtime from Stephen Rothwell
 - Delete old orphaned PrPMC 280/2800 DTS and boot file, from Paul
   Gortmaker
 - Use of_get_next_parent to simplify code from Christophe Jaillet
 - Paginate some xmon output from Sam bobroff
 - Add some more elements to the xmon PACA dump from Michael Ellerman
 - Allow the tm-syscall selftest to build with old headers from Michael
   Ellerman
 - Run EBB selftests only on POWER8 from Denis Kirjanov
 - Drop CONFIG_TUNE_CELL in favour of CONFIG_CELL_CPU from Michael
   Ellerman
 - Avoid reference to potentially freed memory in prom.c from Christophe
   Jaillet
 - Quieten boot wrapper output with run_cmd from Geoff Levand
 - EEH fixes and cleanups from Gavin Shan
 - Fix recursive fenced PHB on Broadcom shiner adapter from Gavin Shan
 - Use of_get_next_parent() in of_get_ibm_chip_id() from Michael
   Ellerman
 - Fix section mismatch warning in msi_bitmap_alloc() from Denis
   Kirjanov
 - Fix ps3-lpm white space from Rudhresh Kumar J
 - Fix ps3-vuart null dereference from Colin King
 - nvram: Add missing kfree in error path from Christophe Jaillet
 - nvram: Fix function name in some errors messages, from Christophe
   Jaillet
 - drivers/macintosh: adb: fix misleading Kconfig help text from Aaro
   Koskinen
 - agp/uninorth: fix a memleak in create_gatt_table from Denis Kirjanov
 - cxl: Free virtual PHB when removing from Andrew Donnellan
 - scripts/kconfig/Makefile: Allow KBUILD_DEFCONFIG to be a target from
   Michael Ellerman
 - scripts/kconfig/Makefile: Fix KBUILD_DEFCONFIG check when building
   with O= from Michael Ellerman
 - Freescale updates from Scott: Highlights include 64-bit book3e
   kexec/kdump support, a rework of the qoriq clock driver, device tree
   changes including qoriq fman nodes, support for a new 85xx board, and
   some fixes.
 - MPC5xxx updates from Anatolij: Highlights include a driver for
   MPC512x LocalPlus Bus FIFO with its device tree binding
   documentation, mpc512x device tree updates and some minor fixes.

* tag 'powerpc-4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (106 commits)
  powerpc/msi: Fix section mismatch warning in msi_bitmap_alloc()
  powerpc/prom: Use of_get_next_parent() in of_get_ibm_chip_id()
  powerpc/pseries: Correct string length in pseries_of_derive_parent()
  powerpc/e6500: hw tablewalk: make sure we invalidate and write to the same tlb entry
  powerpc/mpc85xx: Add FSL QorIQ DPAA FMan support to the SoC device tree(s)
  powerpc/mpc85xx: Create dts components for the FSL QorIQ DPAA FMan
  powerpc/fsl: Add #clock-cells and clockgen label to clockgen nodes
  powerpc: handle error case in cpm_muram_alloc()
  powerpc: mpic: use IRQCHIP_SKIP_SET_WAKE instead of redundant mpic_irq_set_wake
  powerpc/book3e-64: Enable kexec
  powerpc/book3e-64/kexec: Set "r4 = 0" when entering spinloop
  powerpc/booke: Only use VIRT_PHYS_OFFSET on booke32
  powerpc/book3e-64/kexec: Enable SMP release
  powerpc/book3e-64/kexec: create an identity TLB mapping
  powerpc/book3e-64: Don't limit paca to 256 MiB
  powerpc/book3e/kdump: Enable crash_kexec_wait_realmode
  powerpc/book3e: support CONFIG_RELOCATABLE
  powerpc/booke64: Fix args to copy_and_flush
  powerpc/book3e-64: rename interrupt_end_book3e with __end_interrupts
  powerpc/e6500: kexec: Handle hardware threads
  ...
parents 2e3078af 8bdf2023
......@@ -44,3 +44,11 @@ Implementation note: Linux will look for the property "linux,stdout-path" or
on PowerPC "stdout" if "stdout-path" is not found. However, the
"linux,stdout-path" and "stdout" properties are deprecated. New platforms
should only use the "stdout-path" property.
linux,booted-from-kexec
-----------------------
This property is set (currently only on PowerPC, and only needed on
book3e) by some versions of kexec-tools to tell the new kernel that it
is being booted by kexec, as the booting environment may differ (e.g.
a different secondary CPU release mechanism)
* Clock Block on Freescale QorIQ Platforms
Freescale qoriq chips take primary clocking input from the external
Freescale QorIQ chips take primary clocking input from the external
SYSCLK signal. The SYSCLK input (frequency) is multiplied using
multiple phase locked loops (PLL) to create a variety of frequencies
which can then be passed to a variety of internal logic, including
......@@ -13,14 +13,16 @@ which the chip complies.
Chassis Version Example Chips
--------------- -------------
1.0 p4080, p5020, p5040
2.0 t4240, b4860, t1040
2.0 t4240, b4860
1. Clock Block Binding
Required properties:
- compatible: Should contain a specific clock block compatible string
and a single chassis clock compatible string.
Clock block strings include, but not limited to, one of the:
- compatible: Should contain a chip-specific clock block compatible
string and (if applicable) may contain a chassis-version clock
compatible string.
Chip-specific strings are of the form "fsl,<chip>-clockgen", such as:
* "fsl,p2041-clockgen"
* "fsl,p3041-clockgen"
* "fsl,p4080-clockgen"
......@@ -30,15 +32,14 @@ Required properties:
* "fsl,b4420-clockgen"
* "fsl,b4860-clockgen"
* "fsl,ls1021a-clockgen"
Chassis clock strings include:
Chassis-version clock strings include:
* "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks
* "fsl,qoriq-clockgen-2.0": for chassis 2.0 clocks
- reg: Describes the address of the device's resources within the
address space defined by its parent bus, and resource zero
represents the clock register set
- clock-frequency: Input system clock frequency
Recommended properties:
Optional properties:
- ranges: Allows valid translation between child's address space and
parent's. Must be present if the device has sub-nodes.
- #address-cells: Specifies the number of cells used to represent
......@@ -47,8 +48,46 @@ Recommended properties:
- #size-cells: Specifies the number of cells used to represent
the size of an address. Must be present if the device has
sub-nodes and set to 1 if present
- clock-frequency: Input system clock frequency (SYSCLK)
- clocks: If clock-frequency is not specified, sysclk may be provided
as an input clock. Either clock-frequency or clocks must be
provided.
2. Clock Provider
The clockgen node should act as a clock provider, though in older device
trees the children of the clockgen node are the clock providers.
When the clockgen node is a clock provider, #clock-cells = <2>.
The first cell of the clock specifier is the clock type, and the
second cell is the clock index for the specified type.
Type# Name Index Cell
0 sysclk must be 0
1 cmux index (n in CLKCnCSR)
2 hwaccel index (n in CLKCGnHWACSR)
3 fman 0 for fm1, 1 for fm2
4 platform pll 0=pll, 1=pll/2, 2=pll/3, 3=pll/4
3. Example
clockgen: global-utilities@e1000 {
compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
clock-frequency = <133333333>;
reg = <0xe1000 0x1000>;
#clock-cells = <2>;
};
fman@400000 {
...
clocks = <&clockgen 3 0>;
...
};
}
4. Legacy Child Nodes
2. Clock Provider/Consumer Binding
NOTE: These nodes are deprecated. Kernels should continue to support
device trees with these nodes, but new device trees should not use them.
Most of the bindings are from the common clock binding[1].
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
......@@ -82,7 +121,7 @@ Recommended properties:
- reg: Should be the offset and length of clock block base address.
The length should be 4.
Example for clock block and clock provider:
Legacy Example:
/ {
clockgen: global-utilities@e1000 {
compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
......@@ -142,7 +181,7 @@ Example for clock block and clock provider:
};
};
Example for clock consumer:
Example for legacy clock consumer:
/ {
cpu0: PowerPC,e5500@0 {
......
* Maxim (Dallas) DS26522 Dual T1/E1/J1 Transceiver
Required properties:
- compatible: Should contain "maxim,ds26522".
- reg: SPI CS.
- spi-max-frequency: SPI clock.
Example:
slic@1 {
compatible = "maxim,ds26522";
reg = <1>;
spi-max-frequency = <2000000>; /* input clock */
};
Freescale MPC512x LocalPlus Bus FIFO (called SCLPC in the Reference Manual)
Required properties:
- compatible: should be "fsl,mpc512x-lpbfifo";
- reg: should contain the offset and length of SCLPC register set;
- interrupts: should contain the interrupt specifier for SCLPC; syntax of an
interrupt client node is described in interrupt-controller/interrupts.txt;
- dmas: should contain the DMA specifier for SCLPC as described at
dma/dma.txt and dma/mpc512x-dma.txt;
- dma-names: should be "rx-tx";
Example:
sclpc@10100 {
compatible = "fsl,mpc512x-lpbfifo";
reg = <0x10100 0x50>;
interrupts = <7 0x8>;
dmas = <&dma0 26>;
dma-names = "rx-tx";
};
......@@ -419,7 +419,7 @@ config PPC64_SUPPORTS_MEMORY_FAILURE
config KEXEC
bool "kexec system call"
depends on (PPC_BOOK3S || FSL_BOOKE || (44x && !SMP))
depends on (PPC_BOOK3S || FSL_BOOKE || (44x && !SMP)) || PPC_BOOK3E
select KEXEC_CORE
help
kexec is a system call that implements the ability to shutdown your
......
......@@ -157,8 +157,6 @@ CFLAGS-$(CONFIG_E500) += $(call cc-option,-mcpu=8540 -msoft-float,-mcpu=powerpc)
endif
endif
CFLAGS-$(CONFIG_TUNE_CELL) += $(call cc-option,-mtune=cell)
asinstr := $(call as-instr,lis 9$(comma)foo@high,-DHAVE_AS_ATHIGH=1)
KBUILD_CPPFLAGS += -Iarch/$(ARCH) $(asinstr)
......@@ -288,6 +286,10 @@ PHONY += pseries_le_defconfig
pseries_le_defconfig:
$(call merge_into_defconfig,pseries_defconfig,le)
PHONY += ppc64le_defconfig
ppc64le_defconfig:
$(call merge_into_defconfig,ppc64_defconfig,le)
PHONY += mpc85xx_defconfig
mpc85xx_defconfig:
$(call merge_into_defconfig,mpc85xx_basic_defconfig,\
......
......@@ -364,6 +364,9 @@ $(obj)/cuImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
$(obj)/cuImage.%: vmlinux $(obj)/%.dtb $(wrapperbits)
$(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb)
$(obj)/cuImage.%: vmlinux $(obj)/fsl/%.dtb $(wrapperbits)
$(call if_changed,wrap,cuboot-$*,,$(obj)/fsl/$*.dtb)
$(obj)/simpleImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
$(call if_changed,wrap,simpleboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
......
......@@ -32,7 +32,7 @@
* this software, even if advised of the possibility of such damage.
*/
/include/ "fsl/b4420si-pre.dtsi"
/include/ "b4420si-pre.dtsi"
/include/ "b4qds.dtsi"
/ {
......@@ -47,4 +47,4 @@
};
/include/ "fsl/b4420si-post.dtsi"
/include/ "b4420si-post.dtsi"
......@@ -89,7 +89,9 @@
compatible = "fsl,b4420-rcpm", "fsl,qoriq-rcpm-2.0";
};
L2: l2-cache-controller@c20000 {
L2_1: l2-cache-controller@c20000 {
compatible = "fsl,b4420-l2-cache-controller";
reg = <0xc20000 0x40000>;
next-level-cache = <&cpc>;
};
};
/*
* B4420 Silicon/SoC Device Tree Source (pre include)
*
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2012 - 2015 Freescale Semiconductor, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
......@@ -54,8 +54,13 @@
dma0 = &dma0;
dma1 = &dma1;
sdhc = &sdhc;
};
fman0 = &fman0;
ethernet0 = &enet0;
ethernet1 = &enet1;
ethernet2 = &enet2;
ethernet3 = &enet3;
};
cpus {
#address-cells = <1>;
......@@ -65,14 +70,14 @@
device_type = "cpu";
reg = <0 1>;
clocks = <&mux0>;
next-level-cache = <&L2>;
next-level-cache = <&L2_1>;
fsl,portid-mapping = <0x80000000>;
};
cpu1: PowerPC,e6500@2 {
device_type = "cpu";
reg = <2 3>;
clocks = <&mux0>;
next-level-cache = <&L2>;
next-level-cache = <&L2_1>;
fsl,portid-mapping = <0x80000000>;
};
};
......
......@@ -32,7 +32,7 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/include/ "fsl/b4860si-pre.dtsi"
/include/ "b4860si-pre.dtsi"
/include/ "b4qds.dtsi"
/ {
......@@ -58,4 +58,4 @@
};
/include/ "fsl/b4860si-post.dtsi"
/include/ "b4860si-post.dtsi"
/*
* B4860 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2012 - 2014 Freescale Semiconductor Inc.
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
......@@ -51,14 +51,12 @@
#address-cells = <2>;
#size-cells = <2>;
cell-index = <1>;
fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */
};
port2 {
#address-cells = <2>;
#size-cells = <2>;
cell-index = <2>;
fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */
};
};
......@@ -260,7 +258,27 @@
compatible = "fsl,b4860-rcpm", "fsl,qoriq-rcpm-2.0";
};
L2: l2-cache-controller@c20000 {
/include/ "qoriq-fman3-0-1g-4.dtsi"
/include/ "qoriq-fman3-0-1g-5.dtsi"
/include/ "qoriq-fman3-0-10g-0.dtsi"
/include/ "qoriq-fman3-0-10g-1.dtsi"
fman@400000 {
enet4: ethernet@e8000 {
};
enet5: ethernet@ea000 {
};
enet6: ethernet@f0000 {
};
enet7: ethernet@f2000 {
};
};
L2_1: l2-cache-controller@c20000 {
compatible = "fsl,b4860-l2-cache-controller";
reg = <0xc20000 0x40000>;
next-level-cache = <&cpc>;
};
};
/*
* B4860 Silicon/SoC Device Tree Source (pre include)
*
* Copyright 2012 Freescale Semiconductor Inc.
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
......@@ -54,6 +54,16 @@
dma0 = &dma0;
dma1 = &dma1;
sdhc = &sdhc;
fman0 = &fman0;
ethernet0 = &enet0;
ethernet1 = &enet1;
ethernet2 = &enet2;
ethernet3 = &enet3;
ethernet4 = &enet4;
ethernet5 = &enet5;
ethernet6 = &enet6;
ethernet7 = &enet7;
};
......@@ -65,28 +75,28 @@
device_type = "cpu";
reg = <0 1>;
clocks = <&mux0>;
next-level-cache = <&L2>;
next-level-cache = <&L2_1>;
fsl,portid-mapping = <0x80000000>;
};
cpu1: PowerPC,e6500@2 {
device_type = "cpu";
reg = <2 3>;
clocks = <&mux0>;
next-level-cache = <&L2>;
next-level-cache = <&L2_1>;
fsl,portid-mapping = <0x80000000>;
};
cpu2: PowerPC,e6500@4 {
device_type = "cpu";
reg = <4 5>;
clocks = <&mux0>;
next-level-cache = <&L2>;
next-level-cache = <&L2_1>;
fsl,portid-mapping = <0x80000000>;
};
cpu3: PowerPC,e6500@6 {
device_type = "cpu";
reg = <6 7>;
clocks = <&mux0>;
next-level-cache = <&L2>;
next-level-cache = <&L2_1>;
fsl,portid-mapping = <0x80000000>;
};
};
......
......@@ -229,4 +229,4 @@
};
/include/ "fsl/b4si-post.dtsi"
/include/ "b4si-post.dtsi"
/*
* B4420 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2012 - 2014 Freescale Semiconductor, Inc.
* Copyright 2012 - 2015 Freescale Semiconductor, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
......@@ -466,9 +466,32 @@
interrupts = <16 2 1 29>;
};
L2: l2-cache-controller@c20000 {
compatible = "fsl,b4-l2-cache-controller";
reg = <0xc20000 0x1000>;
next-level-cache = <&cpc>;
/include/ "qoriq-fman3-0.dtsi"
/include/ "qoriq-fman3-0-1g-0.dtsi"
/include/ "qoriq-fman3-0-1g-1.dtsi"
/include/ "qoriq-fman3-0-1g-2.dtsi"
/include/ "qoriq-fman3-0-1g-3.dtsi"
fman@400000 {
interrupts = <96 2 0 0>, <16 2 1 30>;
enet0: ethernet@e0000 {
};
enet1: ethernet@e2000 {
};
enet2: ethernet@e4000 {
};
enet3: ethernet@e6000 {
};
mdio@fc000 {
interrupts = <100 1 0 0>;
};
mdio@fd000 {
interrupts = <101 1 0 0>;
};
};
};
......@@ -9,7 +9,7 @@
* option) any later version.
*/
/include/ "fsl/bsc9131si-pre.dtsi"
/include/ "bsc9131si-pre.dtsi"
/ {
model = "fsl,bsc9131rdb";
......@@ -31,4 +31,4 @@
};
/include/ "bsc9131rdb.dtsi"
/include/ "fsl/bsc9131si-post.dtsi"
/include/ "bsc9131si-post.dtsi"
......@@ -80,6 +80,18 @@
status = "disabled";
};
ptp_clock@b0e00 {
compatible = "fsl,etsec-ptp";
reg = <0xb0e00 0xb0>;
interrupts = <68 2 0 0 69 2 0 0>;
fsl,tclk-period = <5>;
fsl,tmr-prsc = <2>;
fsl,tmr-add = <0xcccccccd>;
fsl,tmr-fiper1 = <999999995>;
fsl,tmr-fiper2 = <99990>;
fsl,max-adj = <249999999>;
};
enet0: ethernet@b0000 {
phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
......
......@@ -9,7 +9,7 @@
* option) any later version.
*/
/include/ "fsl/bsc9132si-pre.dtsi"
/include/ "bsc9132si-pre.dtsi"
/ {
model = "fsl,bsc9132qds";
......@@ -32,4 +32,4 @@
};
/include/ "bsc9132qds.dtsi"
/include/ "fsl/bsc9132si-post.dtsi"
/include/ "bsc9132si-post.dtsi"
......@@ -87,6 +87,18 @@
};
};
ptp_clock@b0e00 {
compatible = "fsl,etsec-ptp";
reg = <0xb0e00 0xb0>;
interrupts = <68 2 0 0 69 2 0 0>;
fsl,tclk-period = <5>;
fsl,tmr-prsc = <2>;
fsl,tmr-add = <0xcccccccd>;
fsl,tmr-fiper1 = <999999995>;
fsl,tmr-fiper2 = <99990>;
fsl,max-adj = <249999999>;
};
enet0: ethernet@b0000 {
phy-handle = <&phy0>;
tbi-handle = <&tbi0>;
......
......@@ -32,7 +32,7 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/include/ "fsl/c293si-pre.dtsi"
/include/ "c293si-pre.dtsi"
/ {
model = "fsl,C293PCIE";
......@@ -221,4 +221,4 @@
phy-connection-type = "rgmii-id";
};
};
/include/ "fsl/c293si-post.dtsi"
/include/ "c293si-post.dtsi"
/*
* Cyrus 5020 Device Tree Source, based on p5020ds.dts
*
* Copyright 2015 Andy Fleming
*
* p5020ds.dts copyright:
* Copyright 2010 - 2014 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/include/ "p5020si-pre.dtsi"
/ {
model = "varisys,CYRUS";
compatible = "varisys,CYRUS";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&mpic>;
memory {
device_type = "memory";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
qman_fqd: qman-fqd {
size = <0 0x400000>;
alignment = <0 0x400000>;
};
qman_pfdr: qman-pfdr {
size = <0 0x2000000>;
alignment = <0 0x2000000>;
};
};
dcsr: dcsr@f00000000 {
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
};
bportals: bman-portals@ff4000000 {
ranges = <0x0 0xf 0xf4000000 0x200000>;
};
qportals: qman-portals@ff4200000 {
ranges = <0x0 0xf 0xf4200000 0x200000>;
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;
spi@110000 {
};
i2c@118100 {
};
i2c@119100 {
rtc@6f {