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  1. 19 Jan, 2015 1 commit
    • Andrew Lunn's avatar
      bus: mvebu-mbus: fix support of MBus window 13 · 38bdf45f
      Andrew Lunn authored 
      On Armada XP, 375 and 38x the MBus window 13 has the remap capability,
like windows 0 to 7. However, the mvebu-mbus driver isn't currently
taking into account this special case, which means that when window 13
is actually used, the remap registers are left to 0, making the device
using this MBus window unavailable.

As a minimal fix for stable, don't use window 13. A full fix will
follow later.

Fixes: fddddb52

 ("bus: introduce an Marvell EBU MBus driver")
Cc: <stable@vger.kernel.org> # v3.10+
Reviewed-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: default avatarAndrew Lunn <andrew@lunn.ch>
      38bdf45f
  3. 17 Jan, 2015 1 commit
  5. 30 Nov, 2014 2 commits
    • Thomas Petazzoni's avatar
      bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration · 4749c02b
      Thomas Petazzoni authored 
      

On Marvell EBU platforms, when doing suspend/resume, the SDRAM window
configuration must be saved on suspend, and restored on
resume. However, it needs to be restored on resume *before*
re-entering the kernel, because the SDRAM window configuration defines
the layout of the memory. For this reason, it cannot simply be done in
the ->suspend() and ->resume() hooks of the mvebu-mbus driver.

Instead, it needs to be restored by the bootloader "boot info"
mechanism used when resuming. This mechanism allows the kernel to
define a list of (address, value) pairs when suspending, that the
bootloader will restore on resume before jumping back into the kernel.

This commit therefore adds a new function to the mvebu-mbus driver,
called mvebu_mbus_save_cpu_target(), which will be called by the
platform code to make the mvebu-mbus driver save the SDRAM window
configuration in a way that can be understood by the bootloader "boot
info" mechanism.
Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1416585613-2113-8-git-send-email-thomas.petazzoni@free-electrons.com

Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
      4749c02b
    • Thomas Petazzoni's avatar
      bus: mvebu-mbus: suspend/resume support · a0e89c02
      Thomas Petazzoni authored 
      

This commit extends the mvebu-mbus driver to provide suspend/resume
support. Since mvebu-mbus is not a platform_driver, the syscore_ops
mechanism is used to get ->suspend() and ->resume() hooks called into
the driver.

In those hooks, we save and restore the MBus windows state, to make
sure after resume all Mbus windows are properly restored. Note that
while the state of some windows could be gathered by looking again at
the Device Tree (for statically described windows), it is not the case
of dynamically described windows such as the PCIe memory and I/O
windows. Therefore, we take the simple approach of saving and
restoring the registers for all MBus windows.

In addition, the commit extends the Device Tree binding of the MBus
controller, to control the MBus bridge registers (which define which
parts of the physical address space is routed to MBus windows
vs. normal RAM memory). Those registers must be saved and restored
during suspend/resume. The Device Tree binding extension is made is a
backward compatible fashion, but of course, suspend/resume will not
work without the Device Tree update.
Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1416585613-2113-7-git-send-email-thomas.petazzoni@free-electrons.com

Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
      a0e89c02
  7. 28 Nov, 2014 4 commits
  9. 21 Nov, 2014 1 commit
    • Florian Fainelli's avatar
      bus: brcmstb_gisb: resolve section mismatch · 2e8a29a1
      Florian Fainelli authored 
      Commit f1bee783 moved the call to hook_fault_code in
brcmstb_gisb_arb_probe() which now calls a function annotated with __init, so
this one must also be annotated with __init.

In order to avoid introducing another section mismatch, call
platform_driver_probe() manually and remove the .probe assignment from
brcmstb_gisb_arb_driver, this is very similar to what
drivers/pci/host/pci-imx6.c does since we basically have the same constraints
here.

Fixes: f1bee783

 ("bus: brcmstb_gisb: register the fault code hook")
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      2e8a29a1
  11. 12 Nov, 2014 2 commits
  13. 05 Nov, 2014 1 commit
  15. 30 Oct, 2014 1 commit
    • Mark Rutland's avatar
      bus: cci: move away from arm_pmu framework · c6f85cb4
      Mark Rutland authored 
      

The ARM CPU PMUs and the ARM CCI PMU are using the same framework
despite being substantially different in programming model, which makes
it difficult to handle either particularly well.

This patch migrates the ARM CCI PMU driver away from the arm_pmu
framework, matching the style of the CCN PMU driver and other 'uncore'
PMU drivers. This will enable refactoring of the arm_pmu framework to
better support CPU PMUs. Event context migration on hotplug is not yet
added due to a race on event->ctx in the core perf code.
Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
Acked-by: default avatarPunit Agrawal <punit.agrawal@arm.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
[will: fix whitespace issues]
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      c6f85cb4
  17. 20 Oct, 2014 3 commits
  19. 08 Oct, 2014 1 commit
  21. 11 Sep, 2014 1 commit
    • Nishanth Menon's avatar
      bus: omap_l3_noc: Fix connID for OMAP4 · 41fc619d
      Nishanth Menon authored and Tony Lindgren's avatar Tony Lindgren committed 
      Commit d4d8819e ("bus: omap_l3_noc: fix masterid detection")
did the right thing in dropping the LSB 2 bits which is not part
of the ConnID for NTTP master address. However, as part of that
change, we should also have ensured that existing list of OMAP4 connID
codes are also shifted by 2 bits to ensure that connIDs map to "Table
13-18. ConnID Values" as provided in Technical Reference Manuals for
OMAP4430(Rev AP, April 2014, SWPU220AP) and OMAP4460(Rev AB, April
2014, SWPU234AB)

Fixes: d4d8819e

 ("bus: omap_l3_noc: fix masterid detection")
Reported-by: default avatarKristian Otnes <kotnes@cisco.com>
Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren's avatarTony Lindgren <tony@atomide.com>
      41fc619d
  23. 05 Sep, 2014 1 commit
  25. 24 Aug, 2014 1 commit
  27. 01 Aug, 2014 1 commit
  29. 31 Jul, 2014 1 commit
  31. 24 Jul, 2014 1 commit
  33. 23 Jul, 2014 1 commit
    • Pawel Moll's avatar
      bus: ARM CCN PMU driver · a33b0daa
      Pawel Moll authored 
      

Driver providing perf backend for ARM Cache Coherent Network
interconnect. Supports counting all hardware events and crosspoint
watchpoints.

Currently works with CCN-504 only, although there should be
no changes required for CCN-508 (just impossible to test it now).
Signed-off-by: default avatarPawel Moll <pawel.moll@arm.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      a33b0daa
  35. 18 Jul, 2014 1 commit
    • Liu Ying's avatar
      bus: imx-weim: populate devices on a simple bus · 26651c43
      Liu Ying authored 
      

There could be some memory map devices located in
a certain chip select region of the i.MX WEIM.
The devices could be attached to a simple bus(for
example, a AXI bus) whose root node is one child
device tree node of the i.MX WEIM device tree node.
There should be a bridge(very likely, software
transparent) bewteen the i.MX WEIM and the simple bus.
This patch makes the i.MX WEIM driver possible to
populate devices on a simple bus.  In this way, people
may try various IPs(in a FPGA, maybe) outside of i.MX
chips with the i.MX WEIM embedded.
Signed-off-by: default avatarLiu Ying <Ying.Liu@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
      26651c43
  37. 20 Jun, 2014 1 commit
  39. 17 Jun, 2014 1 commit
    • Arnd Bergmann's avatar
      bus/arm-cci: add dependency on OF && CPU_V7 · 30b6f37d
      Arnd Bergmann authored 
      

The arm-cci code uses device tree helpers for initialization
that don't work on kernels built without CONFIG_OF. Further,
it contains an inline assembly in cci_enable_port_for_self()
that uses ARMv7 instructions and fails to build when targetting
other ARM instruction set versions.

This works around both issues by limiting the scope of the
Kconfig symbol to platforms that can actually build this driver
cleanly.
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Acked-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
      30b6f37d
  41. 26 May, 2014 1 commit
    • Arnd Bergmann's avatar
      ARM: vexpress: refine dependencies for new code · b33cdd28
      Arnd Bergmann authored 
      

The versatile express changes for 3.16 introduced a number of
build regressions for randconfig kernels by not tracking dependencies
between the components right.

This patch tries to rectify that:

* the mach-vexpress code cannot link without the syscfg driver,
  which in turn needs MFD_VEXPRESS_SYSREG
* various drivers call devm_regmap_init_vexpress_config(), which
  has to be exported so it can be used by loadable modules
* the configuration bus uses OF DT helper functions that are not
  available to platforms disable CONFIG_OF
* The sysreg driver exports GPIOs through gpiolib, which can
  be disabled on some platforms.
* The clocksource code cannot be built on platforms that don't
  use modern timekeeping but rely on gettimeoffset.
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      b33cdd28
  43. 23 May, 2014 1 commit
    • Florian Fainelli's avatar
      bus: add Broadcom GISB bus arbiter timeout/error handler · 44127b77
      Florian Fainelli authored 
      

This patch adds support for the Broadcom GISB arbiter bus timeout/error
handler. GISB is a proprietary bus used by Broadcom Set Top Box
System-on-a-chip devices (BCM7xxx) which allows multiple masters and
clients to be interfaced with each other.

The bus arbiter offers support for generating two interrupts towards the
host CPU, thus allowing us to "catch" clock gated masters, or masters
being volontarily blocked for powersaving purposes, or do general system
troubleshooting.

We also register a hook with the ARM fault exception handling to allow
printing a more informative message than "imprecise external abort at
0x00000000" for instance.
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      44127b77
  45. 15 May, 2014 1 commit
    • Pawel Moll's avatar
      mfd: vexpress: Convert custom func API to regmap · 3b9334ac
      Pawel Moll authored 
      

Components of the Versatile Express platform (configuration
microcontrollers on motherboard and daughterboards in particular)
talk to each other over a custom configuration bus. They
provide miscellaneous functions (from clock generator control
to energy sensors) which are represented as platform devices
(and Device Tree nodes). The transactions on the bus can
be generated by different "bridges" in the system, some
of which are universal for the whole platform (for the price
of high transfer latencies), others restricted to a subsystem
(but much faster).

Until now drivers for such functions were using custom "func"
API, which is being replaced in this patch by regmap calls.
This required:

* a rework (and move to drivers/bus directory, as suggested
  by Samuel and Arnd) of the config bus core, which is much
  simpler now and uses device model infrastructure (class)
  to keep track of the bridges; non-DT case (soon to be
  retired anyway) is simply covered by a special device
  registration function

* the new config-bus driver also takes over device population,
  so there is no need for special matching table for
  of_platform_populate nor "simple-bus" hack in the arm64
  model dtsi file (relevant bindings documentation has
  been updated); this allows all the vexpress devices
  fit into normal device model, making it possible
  to remove plenty of early inits and other hacks in
  the near future

* adaptation of the syscfg bridge implementation in the
  sysreg driver, again making it much simpler; there is
  a special case of the "energy" function spanning two
  registers, where they should be both defined in the tree
  now, but backward compatibility is maintained in the code

* modification of the relevant drivers:

  * hwmon - just a straight-forward API change
  * power/reset driver - API change
  * regulator - API change plus error handling
    simplification
  * osc clock driver - this one required larger rework
    in order to turn in into a standard platform driver
Signed-off-by: default avatarPawel Moll <pawel.moll@arm.com>
Acked-by: default avatarMark Brown <broonie@linaro.org>
Acked-by: default avatarLee Jones <lee.jones@linaro.org>
Acked-by: default avatarGuenter Roeck <linux@roeck-us.net>
Acked-by: default avatarMike Turquette <mturquette@linaro.org>
      3b9334ac
  47. 05 May, 2014 10 commits