Commit d468289a authored by JeffyChen's avatar JeffyChen Committed by Linus Walleij

pinctrl: rockchip: add irq_enable & irq_disable ops

Currently we are trying to enable/disable the clk of irq's gpio bank when
unmask/mask irq. But the kernel's "lazy disable approach" will skip masking
irq when the irq chip doesn't support irq_disable ops.

So we may hit this case:
	irq_enable-> enable clk
	irq_disable-> noop
	irq_enable-> enable clk again
	irq_disable-> noop
Signed-off-by: JeffyChen's avatarJeffy Chen <>
Reviewed-by: Heiko Stuebner's avatarHeiko Stuebner <>
Signed-off-by: Linus Walleij's avatarLinus Walleij <>
parent 2afd450d
......@@ -2241,7 +2241,7 @@ static void rockchip_irq_resume(struct irq_data *d)
static void rockchip_irq_gc_mask_clr_bit(struct irq_data *d)
static void rockchip_irq_enable(struct irq_data *d)
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
struct rockchip_pin_bank *bank = gc->private;
......@@ -2250,7 +2250,7 @@ static void rockchip_irq_gc_mask_clr_bit(struct irq_data *d)
static void rockchip_irq_gc_mask_set_bit(struct irq_data *d)
static void rockchip_irq_disable(struct irq_data *d)
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
struct rockchip_pin_bank *bank = gc->private;
......@@ -2317,9 +2317,10 @@ static int rockchip_interrupts_register(struct platform_device *pdev,
gc->chip_types[0].regs.mask = GPIO_INTMASK;
gc->chip_types[0].regs.ack = GPIO_PORTS_EOI;
gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;
gc->chip_types[0].chip.irq_mask = rockchip_irq_gc_mask_set_bit;
gc->chip_types[0].chip.irq_unmask =
gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit;
gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit;
gc->chip_types[0].chip.irq_enable = rockchip_irq_enable;
gc->chip_types[0].chip.irq_disable = rockchip_irq_disable;
gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake;
gc->chip_types[0].chip.irq_suspend = rockchip_irq_suspend;
gc->chip_types[0].chip.irq_resume = rockchip_irq_resume;
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