Commit 832e77bc authored by James Bottomley's avatar James Bottomley

Merge branch 'misc' into for-linus

Signed-off-by: default avatarJames Bottomley <JBottomley@Parallels.com>
parents e0fd9aff e689cf0c
...@@ -1353,6 +1353,8 @@ config SCSI_LPFC ...@@ -1353,6 +1353,8 @@ config SCSI_LPFC
tristate "Emulex LightPulse Fibre Channel Support" tristate "Emulex LightPulse Fibre Channel Support"
depends on PCI && SCSI depends on PCI && SCSI
select SCSI_FC_ATTRS select SCSI_FC_ATTRS
select GENERIC_CSUM
select CRC_T10DIF
help help
This lpfc driver supports the Emulex LightPulse This lpfc driver supports the Emulex LightPulse
Family of Fibre Channel PCI host adapters. Family of Fibre Channel PCI host adapters.
......
...@@ -84,7 +84,7 @@ static void asd_set_ddb_type(struct domain_device *dev) ...@@ -84,7 +84,7 @@ static void asd_set_ddb_type(struct domain_device *dev)
struct asd_ha_struct *asd_ha = dev->port->ha->lldd_ha; struct asd_ha_struct *asd_ha = dev->port->ha->lldd_ha;
int ddb = (int) (unsigned long) dev->lldd_dev; int ddb = (int) (unsigned long) dev->lldd_dev;
if (dev->dev_type == SATA_PM_PORT) if (dev->dev_type == SAS_SATA_PM_PORT)
asd_ddbsite_write_byte(asd_ha,ddb, DDB_TYPE, DDB_TYPE_PM_PORT); asd_ddbsite_write_byte(asd_ha,ddb, DDB_TYPE, DDB_TYPE_PM_PORT);
else if (dev->tproto) else if (dev->tproto)
asd_ddbsite_write_byte(asd_ha,ddb, DDB_TYPE, DDB_TYPE_TARGET); asd_ddbsite_write_byte(asd_ha,ddb, DDB_TYPE, DDB_TYPE_TARGET);
...@@ -116,7 +116,7 @@ void asd_set_dmamode(struct domain_device *dev) ...@@ -116,7 +116,7 @@ void asd_set_dmamode(struct domain_device *dev)
int ddb = (int) (unsigned long) dev->lldd_dev; int ddb = (int) (unsigned long) dev->lldd_dev;
u32 qdepth = 0; u32 qdepth = 0;
if (dev->dev_type == SATA_DEV || dev->dev_type == SATA_PM_PORT) { if (dev->dev_type == SAS_SATA_DEV || dev->dev_type == SAS_SATA_PM_PORT) {
if (ata_id_has_ncq(ata_dev->id)) if (ata_id_has_ncq(ata_dev->id))
qdepth = ata_id_queue_depth(ata_dev->id); qdepth = ata_id_queue_depth(ata_dev->id);
asd_ddbsite_write_dword(asd_ha, ddb, SATA_TAG_ALLOC_MASK, asd_ddbsite_write_dword(asd_ha, ddb, SATA_TAG_ALLOC_MASK,
...@@ -140,8 +140,8 @@ static int asd_init_sata(struct domain_device *dev) ...@@ -140,8 +140,8 @@ static int asd_init_sata(struct domain_device *dev)
int ddb = (int) (unsigned long) dev->lldd_dev; int ddb = (int) (unsigned long) dev->lldd_dev;
asd_ddbsite_write_word(asd_ha, ddb, ATA_CMD_SCBPTR, 0xFFFF); asd_ddbsite_write_word(asd_ha, ddb, ATA_CMD_SCBPTR, 0xFFFF);
if (dev->dev_type == SATA_DEV || dev->dev_type == SATA_PM || if (dev->dev_type == SAS_SATA_DEV || dev->dev_type == SAS_SATA_PM ||
dev->dev_type == SATA_PM_PORT) { dev->dev_type == SAS_SATA_PM_PORT) {
struct dev_to_host_fis *fis = (struct dev_to_host_fis *) struct dev_to_host_fis *fis = (struct dev_to_host_fis *)
dev->frame_rcvd; dev->frame_rcvd;
asd_ddbsite_write_byte(asd_ha, ddb, SATA_STATUS, fis->status); asd_ddbsite_write_byte(asd_ha, ddb, SATA_STATUS, fis->status);
...@@ -174,7 +174,7 @@ static int asd_init_target_ddb(struct domain_device *dev) ...@@ -174,7 +174,7 @@ static int asd_init_target_ddb(struct domain_device *dev)
asd_ddbsite_write_byte(asd_ha, ddb, CONN_MASK, dev->port->phy_mask); asd_ddbsite_write_byte(asd_ha, ddb, CONN_MASK, dev->port->phy_mask);
if (dev->port->oob_mode != SATA_OOB_MODE) { if (dev->port->oob_mode != SATA_OOB_MODE) {
flags |= OPEN_REQUIRED; flags |= OPEN_REQUIRED;
if ((dev->dev_type == SATA_DEV) || if ((dev->dev_type == SAS_SATA_DEV) ||
(dev->tproto & SAS_PROTOCOL_STP)) { (dev->tproto & SAS_PROTOCOL_STP)) {
struct smp_resp *rps_resp = &dev->sata_dev.rps_resp; struct smp_resp *rps_resp = &dev->sata_dev.rps_resp;
if (rps_resp->frame_type == SMP_RESPONSE && if (rps_resp->frame_type == SMP_RESPONSE &&
...@@ -188,8 +188,8 @@ static int asd_init_target_ddb(struct domain_device *dev) ...@@ -188,8 +188,8 @@ static int asd_init_target_ddb(struct domain_device *dev)
} else { } else {
flags |= CONCURRENT_CONN_SUPP; flags |= CONCURRENT_CONN_SUPP;
if (!dev->parent && if (!dev->parent &&
(dev->dev_type == EDGE_DEV || (dev->dev_type == SAS_EDGE_EXPANDER_DEVICE ||
dev->dev_type == FANOUT_DEV)) dev->dev_type == SAS_FANOUT_EXPANDER_DEVICE))
asd_ddbsite_write_byte(asd_ha, ddb, MAX_CCONN, asd_ddbsite_write_byte(asd_ha, ddb, MAX_CCONN,
4); 4);
else else
...@@ -198,7 +198,7 @@ static int asd_init_target_ddb(struct domain_device *dev) ...@@ -198,7 +198,7 @@ static int asd_init_target_ddb(struct domain_device *dev)
asd_ddbsite_write_byte(asd_ha, ddb, NUM_CTX, 1); asd_ddbsite_write_byte(asd_ha, ddb, NUM_CTX, 1);
} }
} }
if (dev->dev_type == SATA_PM) if (dev->dev_type == SAS_SATA_PM)
flags |= SATA_MULTIPORT; flags |= SATA_MULTIPORT;
asd_ddbsite_write_byte(asd_ha, ddb, DDB_TARG_FLAGS, flags); asd_ddbsite_write_byte(asd_ha, ddb, DDB_TARG_FLAGS, flags);
...@@ -211,7 +211,7 @@ static int asd_init_target_ddb(struct domain_device *dev) ...@@ -211,7 +211,7 @@ static int asd_init_target_ddb(struct domain_device *dev)
asd_ddbsite_write_word(asd_ha, ddb, SEND_QUEUE_TAIL, 0xFFFF); asd_ddbsite_write_word(asd_ha, ddb, SEND_QUEUE_TAIL, 0xFFFF);
asd_ddbsite_write_word(asd_ha, ddb, SISTER_DDB, 0xFFFF); asd_ddbsite_write_word(asd_ha, ddb, SISTER_DDB, 0xFFFF);
if (dev->dev_type == SATA_DEV || (dev->tproto & SAS_PROTOCOL_STP)) { if (dev->dev_type == SAS_SATA_DEV || (dev->tproto & SAS_PROTOCOL_STP)) {
i = asd_init_sata(dev); i = asd_init_sata(dev);
if (i < 0) { if (i < 0) {
asd_free_ddb(asd_ha, ddb); asd_free_ddb(asd_ha, ddb);
...@@ -219,7 +219,7 @@ static int asd_init_target_ddb(struct domain_device *dev) ...@@ -219,7 +219,7 @@ static int asd_init_target_ddb(struct domain_device *dev)
} }
} }
if (dev->dev_type == SAS_END_DEV) { if (dev->dev_type == SAS_END_DEVICE) {
struct sas_end_device *rdev = rphy_to_end_device(dev->rphy); struct sas_end_device *rdev = rphy_to_end_device(dev->rphy);
if (rdev->I_T_nexus_loss_timeout > 0) if (rdev->I_T_nexus_loss_timeout > 0)
asd_ddbsite_write_word(asd_ha, ddb, ITNL_TIMEOUT, asd_ddbsite_write_word(asd_ha, ddb, ITNL_TIMEOUT,
...@@ -328,10 +328,10 @@ int asd_dev_found(struct domain_device *dev) ...@@ -328,10 +328,10 @@ int asd_dev_found(struct domain_device *dev)
spin_lock_irqsave(&asd_ha->hw_prof.ddb_lock, flags); spin_lock_irqsave(&asd_ha->hw_prof.ddb_lock, flags);
switch (dev->dev_type) { switch (dev->dev_type) {
case SATA_PM: case SAS_SATA_PM:
res = asd_init_sata_pm_ddb(dev); res = asd_init_sata_pm_ddb(dev);
break; break;
case SATA_PM_PORT: case SAS_SATA_PM_PORT:
res = asd_init_sata_pm_port_ddb(dev); res = asd_init_sata_pm_port_ddb(dev);
break; break;
default: default:
......
...@@ -74,7 +74,7 @@ static void asd_init_phy_identify(struct asd_phy *phy) ...@@ -74,7 +74,7 @@ static void asd_init_phy_identify(struct asd_phy *phy)
memset(phy->identify_frame, 0, sizeof(*phy->identify_frame)); memset(phy->identify_frame, 0, sizeof(*phy->identify_frame));
phy->identify_frame->dev_type = SAS_END_DEV; phy->identify_frame->dev_type = SAS_END_DEVICE;
if (phy->sas_phy.role & PHY_ROLE_INITIATOR) if (phy->sas_phy.role & PHY_ROLE_INITIATOR)
phy->identify_frame->initiator_bits = phy->sas_phy.iproto; phy->identify_frame->initiator_bits = phy->sas_phy.iproto;
if (phy->sas_phy.role & PHY_ROLE_TARGET) if (phy->sas_phy.role & PHY_ROLE_TARGET)
......
...@@ -184,7 +184,7 @@ int asd_I_T_nexus_reset(struct domain_device *dev) ...@@ -184,7 +184,7 @@ int asd_I_T_nexus_reset(struct domain_device *dev)
struct sas_phy *phy = sas_get_local_phy(dev); struct sas_phy *phy = sas_get_local_phy(dev);
/* Standard mandates link reset for ATA (type 0) and /* Standard mandates link reset for ATA (type 0) and
* hard reset for SSP (type 1) */ * hard reset for SSP (type 1) */
int reset_type = (dev->dev_type == SATA_DEV || int reset_type = (dev->dev_type == SAS_SATA_DEV ||
(dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1; (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
asd_clear_nexus_I_T(dev, NEXUS_PHASE_PRE); asd_clear_nexus_I_T(dev, NEXUS_PHASE_PRE);
......
/** /**
* Copyright (C) 2005 - 2012 Emulex * Copyright (C) 2005 - 2013 Emulex
* All rights reserved. * All rights reserved.
* *
* This program is free software; you can redistribute it and/or * This program is free software; you can redistribute it and/or
......
/** /**
* Copyright (C) 2005 - 2012 Emulex * Copyright (C) 2005 - 2013 Emulex
* All rights reserved. * All rights reserved.
* *
* This program is free software; you can redistribute it and/or * This program is free software; you can redistribute it and/or
...@@ -155,6 +155,7 @@ int beiscsi_mccq_compl(struct beiscsi_hba *phba, ...@@ -155,6 +155,7 @@ int beiscsi_mccq_compl(struct beiscsi_hba *phba,
uint16_t status = 0, addl_status = 0, wrb_num = 0; uint16_t status = 0, addl_status = 0, wrb_num = 0;
struct be_mcc_wrb *temp_wrb; struct be_mcc_wrb *temp_wrb;
struct be_cmd_req_hdr *ioctl_hdr; struct be_cmd_req_hdr *ioctl_hdr;
struct be_cmd_resp_hdr *ioctl_resp_hdr;
struct be_queue_info *mccq = &phba->ctrl.mcc_obj.q; struct be_queue_info *mccq = &phba->ctrl.mcc_obj.q;
if (beiscsi_error(phba)) if (beiscsi_error(phba))
...@@ -204,6 +205,12 @@ int beiscsi_mccq_compl(struct beiscsi_hba *phba, ...@@ -204,6 +205,12 @@ int beiscsi_mccq_compl(struct beiscsi_hba *phba,
ioctl_hdr->subsystem, ioctl_hdr->subsystem,
ioctl_hdr->opcode, ioctl_hdr->opcode,
status, addl_status); status, addl_status);
if (status == MCC_STATUS_INSUFFICIENT_BUFFER) {
ioctl_resp_hdr = (struct be_cmd_resp_hdr *) ioctl_hdr;
if (ioctl_resp_hdr->response_length)
goto release_mcc_tag;
}
rc = -EAGAIN; rc = -EAGAIN;
} }
...@@ -267,6 +274,7 @@ static int be_mcc_compl_process(struct be_ctrl_info *ctrl, ...@@ -267,6 +274,7 @@ static int be_mcc_compl_process(struct be_ctrl_info *ctrl,
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem); struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev); struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev);
struct be_cmd_req_hdr *hdr = embedded_payload(wrb); struct be_cmd_req_hdr *hdr = embedded_payload(wrb);
struct be_cmd_resp_hdr *resp_hdr;
be_dws_le_to_cpu(compl, 4); be_dws_le_to_cpu(compl, 4);
...@@ -284,6 +292,11 @@ static int be_mcc_compl_process(struct be_ctrl_info *ctrl, ...@@ -284,6 +292,11 @@ static int be_mcc_compl_process(struct be_ctrl_info *ctrl,
hdr->subsystem, hdr->opcode, hdr->subsystem, hdr->opcode,
compl_status, extd_status); compl_status, extd_status);
if (compl_status == MCC_STATUS_INSUFFICIENT_BUFFER) {
resp_hdr = (struct be_cmd_resp_hdr *) hdr;
if (resp_hdr->response_length)
return 0;
}
return -EBUSY; return -EBUSY;
} }
return 0; return 0;
...@@ -335,30 +348,26 @@ static void be2iscsi_fail_session(struct iscsi_cls_session *cls_session) ...@@ -335,30 +348,26 @@ static void be2iscsi_fail_session(struct iscsi_cls_session *cls_session)
void beiscsi_async_link_state_process(struct beiscsi_hba *phba, void beiscsi_async_link_state_process(struct beiscsi_hba *phba,
struct be_async_event_link_state *evt) struct be_async_event_link_state *evt)
{ {
switch (evt->port_link_status) { if ((evt->port_link_status == ASYNC_EVENT_LINK_DOWN) ||
case ASYNC_EVENT_LINK_DOWN: ((evt->port_link_status & ASYNC_EVENT_LOGICAL) &&
(evt->port_fault != BEISCSI_PHY_LINK_FAULT_NONE))) {
phba->state = BE_ADAPTER_LINK_DOWN;
beiscsi_log(phba, KERN_ERR, beiscsi_log(phba, KERN_ERR,
BEISCSI_LOG_CONFIG | BEISCSI_LOG_INIT, BEISCSI_LOG_CONFIG | BEISCSI_LOG_INIT,
"BC_%d : Link Down on Physical Port %d\n", "BC_%d : Link Down on Port %d\n",
evt->physical_port); evt->physical_port);
phba->state |= BE_ADAPTER_LINK_DOWN;
iscsi_host_for_each_session(phba->shost, iscsi_host_for_each_session(phba->shost,
be2iscsi_fail_session); be2iscsi_fail_session);
break; } else if ((evt->port_link_status & ASYNC_EVENT_LINK_UP) ||
case ASYNC_EVENT_LINK_UP: ((evt->port_link_status & ASYNC_EVENT_LOGICAL) &&
(evt->port_fault == BEISCSI_PHY_LINK_FAULT_NONE))) {
phba->state = BE_ADAPTER_UP; phba->state = BE_ADAPTER_UP;
beiscsi_log(phba, KERN_ERR, beiscsi_log(phba, KERN_ERR,
BEISCSI_LOG_CONFIG | BEISCSI_LOG_INIT, BEISCSI_LOG_CONFIG | BEISCSI_LOG_INIT,
"BC_%d : Link UP on Physical Port %d\n", "BC_%d : Link UP on Port %d\n",
evt->physical_port);
break;
default:
beiscsi_log(phba, KERN_ERR,
BEISCSI_LOG_CONFIG | BEISCSI_LOG_INIT,
"BC_%d : Unexpected Async Notification %d on"
"Physical Port %d\n",
evt->port_link_status,
evt->physical_port); evt->physical_port);
} }
} }
...@@ -479,7 +488,7 @@ static int be_mbox_db_ready_wait(struct be_ctrl_info *ctrl) ...@@ -479,7 +488,7 @@ static int be_mbox_db_ready_wait(struct be_ctrl_info *ctrl)
{ {
void __iomem *db = ctrl->db + MPU_MAILBOX_DB_OFFSET; void __iomem *db = ctrl->db + MPU_MAILBOX_DB_OFFSET;
struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev); struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev);
int wait = 0; uint32_t wait = 0;
u32 ready; u32 ready;
do { do {
...@@ -527,6 +536,10 @@ int be_mbox_notify(struct be_ctrl_info *ctrl) ...@@ -527,6 +536,10 @@ int be_mbox_notify(struct be_ctrl_info *ctrl)
struct be_mcc_compl *compl = &mbox->compl; struct be_mcc_compl *compl = &mbox->compl;
struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev); struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev);
status = be_mbox_db_ready_wait(ctrl);
if (status)
return status;
val &= ~MPU_MAILBOX_DB_RDY_MASK; val &= ~MPU_MAILBOX_DB_RDY_MASK;
val |= MPU_MAILBOX_DB_HI_MASK; val |= MPU_MAILBOX_DB_HI_MASK;
val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2;
...@@ -580,6 +593,10 @@ static int be_mbox_notify_wait(struct beiscsi_hba *phba) ...@@ -580,6 +593,10 @@ static int be_mbox_notify_wait(struct beiscsi_hba *phba)
struct be_mcc_compl *compl = &mbox->compl; struct be_mcc_compl *compl = &mbox->compl;
struct be_ctrl_info *ctrl = &phba->ctrl; struct be_ctrl_info *ctrl = &phba->ctrl;
status = be_mbox_db_ready_wait(ctrl);
if (status)
return status;
val |= MPU_MAILBOX_DB_HI_MASK; val |= MPU_MAILBOX_DB_HI_MASK;
/* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */
val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2;
...@@ -732,6 +749,16 @@ int beiscsi_cmd_eq_create(struct be_ctrl_info *ctrl, ...@@ -732,6 +749,16 @@ int beiscsi_cmd_eq_create(struct be_ctrl_info *ctrl,
return status; return status;
} }
/**
* be_cmd_fw_initialize()- Initialize FW
* @ctrl: Pointer to function control structure
*
* Send FW initialize pattern for the function.
*
* return
* Success: 0
* Failure: Non-Zero value
**/
int be_cmd_fw_initialize(struct be_ctrl_info *ctrl) int be_cmd_fw_initialize(struct be_ctrl_info *ctrl)
{ {
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem); struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
...@@ -762,6 +789,47 @@ int be_cmd_fw_initialize(struct be_ctrl_info *ctrl) ...@@ -762,6 +789,47 @@ int be_cmd_fw_initialize(struct be_ctrl_info *ctrl)
return status; return status;
} }
/**
* be_cmd_fw_uninit()- Uinitialize FW
* @ctrl: Pointer to function control structure
*
* Send FW uninitialize pattern for the function
*
* return
* Success: 0
* Failure: Non-Zero value
**/
int be_cmd_fw_uninit(struct be_ctrl_info *ctrl)
{
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev);
int status;
u8 *endian_check;
spin_lock(&ctrl->mbox_lock);
memset(wrb, 0, sizeof(*wrb));
endian_check = (u8 *) wrb;
*endian_check++ = 0xFF;
*endian_check++ = 0xAA;
*endian_check++ = 0xBB;
*endian_check++ = 0xFF;
*endian_check++ = 0xFF;
*endian_check++ = 0xCC;
*endian_check++ = 0xDD;
*endian_check = 0xFF;
be_dws_cpu_to_le(wrb, sizeof(*wrb));
status = be_mbox_notify(ctrl);
if (status)
beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
"BC_%d : be_cmd_fw_uninit Failed\n");
spin_unlock(&ctrl->mbox_lock);
return status;
}
int beiscsi_cmd_cq_create(struct be_ctrl_info *ctrl, int beiscsi_cmd_cq_create(struct be_ctrl_info *ctrl,
struct be_queue_info *cq, struct be_queue_info *eq, struct be_queue_info *cq, struct be_queue_info *eq,
bool sol_evts, bool no_delay, int coalesce_wm) bool sol_evts, bool no_delay, int coalesce_wm)
...@@ -783,20 +851,7 @@ int beiscsi_cmd_cq_create(struct be_ctrl_info *ctrl, ...@@ -783,20 +851,7 @@ int beiscsi_cmd_cq_create(struct be_ctrl_info *ctrl,
OPCODE_COMMON_CQ_CREATE, sizeof(*req)); OPCODE_COMMON_CQ_CREATE, sizeof(*req));
req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
if (chip_skh_r(ctrl->pdev)) { if (is_chip_be2_be3r(phba)) {
req->hdr.version = MBX_CMD_VER2;
req->page_size = 1;
AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm,
ctxt, coalesce_wm);
AMAP_SET_BITS(struct amap_cq_context_v2, nodelay,
ctxt, no_delay);
AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt,
__ilog2_u32(cq->len / 256));
AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1);
AMAP_SET_BITS(struct amap_cq_context_v2, eventable, ctxt, 1);
AMAP_SET_BITS(struct amap_cq_context_v2, eqid, ctxt, eq->id);
AMAP_SET_BITS(struct amap_cq_context_v2, armed, ctxt, 1);
} else {
AMAP_SET_BITS(struct amap_cq_context, coalescwm, AMAP_SET_BITS(struct amap_cq_context, coalescwm,
ctxt, coalesce_wm); ctxt, coalesce_wm);
AMAP_SET_BITS(struct amap_cq_context, nodelay, ctxt, no_delay); AMAP_SET_BITS(struct amap_cq_context, nodelay, ctxt, no_delay);
...@@ -809,6 +864,19 @@ int beiscsi_cmd_cq_create(struct be_ctrl_info *ctrl, ...@@ -809,6 +864,19 @@ int beiscsi_cmd_cq_create(struct be_ctrl_info *ctrl,
AMAP_SET_BITS(struct amap_cq_context, armed, ctxt, 1); AMAP_SET_BITS(struct amap_cq_context, armed, ctxt, 1);
AMAP_SET_BITS(struct amap_cq_context, func, ctxt, AMAP_SET_BITS(struct amap_cq_context, func, ctxt,
PCI_FUNC(ctrl->pdev->devfn)); PCI_FUNC(ctrl->pdev->devfn));
} else {
req->hdr.version = MBX_CMD_VER2;
req->page_size = 1;
AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm,
ctxt, coalesce_wm);
AMAP_SET_BITS(struct amap_cq_context_v2, nodelay,
ctxt, no_delay);
AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt,
__ilog2_u32(cq->len / 256));
AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1);
AMAP_SET_BITS(struct amap_cq_context_v2, eventable, ctxt, 1);
AMAP_SET_BITS(struct amap_cq_context_v2, eqid, ctxt, eq->id);
AMAP_SET_BITS(struct amap_cq_context_v2, armed, ctxt, 1);
} }
be_dws_cpu_to_le(ctxt, sizeof(req->context)); be_dws_cpu_to_le(ctxt, sizeof(req->context));
...@@ -949,6 +1017,7 @@ int be_cmd_create_default_pdu_queue(struct be_ctrl_info *ctrl, ...@@ -949,6 +1017,7 @@ int be_cmd_create_default_pdu_queue(struct be_ctrl_info *ctrl,
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem); struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
struct be_defq_create_req *req = embedded_payload(wrb); struct be_defq_create_req *req = embedded_payload(wrb);
struct be_dma_mem *q_mem = &dq->dma_mem; struct be_dma_mem *q_mem = &dq->dma_mem;
struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev);
void *ctxt = &req->context; void *ctxt = &req->context;
int status; int status;
...@@ -961,17 +1030,36 @@ int be_cmd_create_default_pdu_queue(struct be_ctrl_info *ctrl, ...@@ -961,17 +1030,36 @@ int be_cmd_create_default_pdu_queue(struct be_ctrl_info *ctrl,
OPCODE_COMMON_ISCSI_DEFQ_CREATE, sizeof(*req)); OPCODE_COMMON_ISCSI_DEFQ_CREATE, sizeof(*req));
req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size);
AMAP_SET_BITS(struct amap_be_default_pdu_context, rx_pdid, ctxt, 0);
AMAP_SET_BITS(struct amap_be_default_pdu_context, rx_pdid_valid, ctxt, if (is_chip_be2_be3r(phba)) {
1); AMAP_SET_BITS(struct amap_be_default_pdu_context,
AMAP_SET_BITS(struct amap_be_default_pdu_context, pci_func_id, ctxt, rx_pdid, ctxt, 0);
PCI_FUNC(ctrl->pdev->devfn)); AMAP_SET_BITS(struct amap_be_default_pdu_context,
AMAP_SET_BITS(struct amap_be_default_pdu_context, ring_size, ctxt, rx_pdid_valid, ctxt, 1);
be_encoded_q_len(length / sizeof(struct phys_addr))); AMAP_SET_BITS(struct amap_be_default_pdu_context,
AMAP_SET_BITS(struct amap_be_default_pdu_context, default_buffer_size, pci_func_id, ctxt, PCI_FUNC(ctrl->pdev->devfn));
ctxt, entry_size); AMAP_SET_BITS(struct amap_be_default_pdu_context,
AMAP_SET_BITS(struct amap_be_default_pdu_context, cq_id_recv, ctxt, ring_size, ctxt,
cq->id); be_encoded_q_len(length /
sizeof(struct phys_addr)));
AMAP_SET_BITS(struct amap_be_default_pdu_context,
default_buffer_size, ctxt, entry_size);
AMAP_SET_BITS(struct amap_be_default_pdu_context,
cq_id_recv, ctxt, cq->id);
} else {
AMAP_SET_BITS(struct amap_default_pdu_context_ext,
rx_pdid, ctxt, 0);
AMAP_SET_BITS(struct amap_default_pdu_context_ext,
rx_pdid_valid, ctxt, 1);
AMAP_SET_BITS(struct amap_default_pdu_context_ext,
ring_size, ctxt,
be_encoded_q_len(length /
sizeof(struct phys_addr)));
AMAP_SET_BITS(struct amap_default_pdu_context_ext,
default_buffer_size, ctxt, entry_size);
AMAP_SET_BITS(struct amap_default_pdu_context_ext,
cq_id_recv, ctxt, cq->id);
}
be_dws_cpu_to_le(ctxt, sizeof(req->context)); be_dws_cpu_to_le(ctxt, sizeof(req->context));
......
/** /**
* Copyright (C) 2005 - 2012 Emulex * Copyright (C) 2005 - 2013 Emulex
* All rights reserved. * All rights reserved.
* *
* This program is free software; you can redistribute it and/or * This program is free software; you can redistribute it and/or
...@@ -52,6 +52,10 @@ struct be_mcc_wrb { ...@@ -52,6 +52,10 @@ struct be_mcc_wrb {
/* Completion Status */ /* Completion Status */
#define MCC_STATUS_SUCCESS 0x0 #define MCC_STATUS_SUCCESS 0x0
#define MCC_STATUS_FAILED 0x1
#define MCC_STATUS_ILLEGAL_REQUEST 0x2
#define MCC_STATUS_ILLEGAL_FIELD 0x3
#define MCC_STATUS_INSUFFICIENT_BUFFER 0x4
#define CQE_STATUS_COMPL_MASK 0xFFFF #define CQE_STATUS_COMPL_MASK 0xFFFF
#define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */ #define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */
...@@ -118,7 +122,8 @@ struct be_async_event_trailer { ...@@ -118,7 +122,8 @@ struct be_async_event_trailer {
enum { enum {
ASYNC_EVENT_LINK_DOWN = 0x0, ASYNC_EVENT_LINK_DOWN = 0x0,
ASYNC_EVENT_LINK_UP = 0x1 ASYNC_EVENT_LINK_UP = 0x1,
ASYNC_EVENT_LOGICAL = 0x2
}; };
/** /**
...@@ -130,6 +135,9 @@ struct be_async_event_link_state { ...@@ -130,6 +135,9 @@ struct be_async_event_link_state {
u8 port_link_status; u8 port_link_status;
u8 port_duplex; u8 port_duplex;
u8 port_speed; u8 port_speed;
#define BEISCSI_PHY_LINK_FAULT_NONE 0x00
#define BEISCSI_PHY_LINK_FAULT_LOCAL 0x01
#define BEISCSI_PHY_LINK_FAULT_REMOTE 0x02
u8 port_fault; u8 port_fault;
u8 rsvd0[7]; u8 rsvd0[7];
struct be_async_event_trailer trailer; struct be_async_event_trailer trailer;
...@@ -697,6 +705,7 @@ int beiscsi_mccq_compl(struct beiscsi_hba *phba, ...@@ -697,6 +705,7 @@ int beiscsi_mccq_compl(struct beiscsi_hba *phba,
uint32_t tag, struct be_mcc_wrb **wrb, void *cmd_va); uint32_t tag, struct be_mcc_wrb **wrb, void *cmd_va);
/*ISCSI Functuions */ /*ISCSI Functuions */
int be_cmd_fw_initialize(struct be_ctrl_info *ctrl); int be_cmd_fw_initialize(struct be_ctrl_info *ctrl);
int be_cmd_fw_uninit(struct be_ctrl_info *ctrl);
struct be_mcc_wrb *wrb_from_mbox(struct be_dma_mem *mbox_mem); struct be_mcc_wrb *wrb_from_mbox(struct be_dma_mem *mbox_mem);
struct be_mcc_wrb *wrb_from_mccq(struct beiscsi_hba *phba); struct be_mcc_wrb *wrb_from_mccq(struct beiscsi_hba *phba);
...@@ -751,6 +760,18 @@ struct amap_be_default_pdu_context { ...@@ -751,6 +760,18 @@ struct amap_be_default_pdu_context {
u8 rsvd4[32]; /* dword 3 */ u8 rsvd4[32]; /* dword 3 */
} __packed; } __packed;
struct amap_default_pdu_context_ext {
u8 rsvd0[16]; /* dword 0 */
u8 ring_size[4]; /* dword 0 */
u8 rsvd1[12]; /* dword 0 */
u8 rsvd2[22]; /* dword 1 */
u8 rx_pdid[9]; /* dword 1 */
u8 rx_pdid_valid; /* dword 1 */
u8 default_buffer_size[16]; /* dword 2 */
u8 cq_id_recv[16]; /* dword 2 */
u8 rsvd3[32]; /* dword 3 */
} __packed;
struct be_defq_create_req { struct be_defq_create_req {
struct be_cmd_req_hdr hdr; struct be_cmd_req_hdr hdr;
u16 num_pages; u16 num_pages;
...@@ -896,7 +917,7 @@ struct amap_it_dmsg_cqe_v2 { ...@@ -896,7 +917,7 @@ struct amap_it_dmsg_cqe_v2 {
* stack to notify the * stack to notify the
* controller of a posted Work Request Block * controller of a posted Work Request Block
*/ */
#define DB_WRB_POST_CID_MASK 0x3FF /* bits 0 - 9 */ #define DB_WRB_POST_CID_MASK 0xFFFF /* bits 0 - 16 */
#define DB_DEF_PDU_WRB_INDEX_MASK 0xFF /* bits 0 - 9 */ #define DB_DEF_PDU_WRB_INDEX_MASK 0xFF /* bits 0 - 9 */
#define DB_DEF_PDU_WRB_INDEX_SHIFT 16 #define DB_DEF_PDU_WRB_INDEX_SHIFT 16
......