Commit 6845664a authored by Thomas Gleixner's avatar Thomas Gleixner

arm: Cleanup the irq namespace

Convert to the new function names. Automated with coccinelle.
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 25a5662a
...@@ -213,8 +213,8 @@ static int gic_set_wake(struct irq_data *d, unsigned int on) ...@@ -213,8 +213,8 @@ static int gic_set_wake(struct irq_data *d, unsigned int on)
static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
{ {
struct gic_chip_data *chip_data = get_irq_data(irq); struct gic_chip_data *chip_data = irq_get_handler_data(irq);
struct irq_chip *chip = get_irq_chip(irq); struct irq_chip *chip = irq_get_chip(irq);
unsigned int cascade_irq, gic_irq; unsigned int cascade_irq, gic_irq;
unsigned long status; unsigned long status;
...@@ -257,9 +257,9 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) ...@@ -257,9 +257,9 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
{ {
if (gic_nr >= MAX_GIC_NR) if (gic_nr >= MAX_GIC_NR)
BUG(); BUG();
if (set_irq_data(irq, &gic_data[gic_nr]) != 0) if (irq_set_handler_data(irq, &gic_data[gic_nr]) != 0)
BUG(); BUG();
set_irq_chained_handler(irq, gic_handle_cascade_irq); irq_set_chained_handler(irq, gic_handle_cascade_irq);
} }
static void __init gic_dist_init(struct gic_chip_data *gic, static void __init gic_dist_init(struct gic_chip_data *gic,
...@@ -319,9 +319,9 @@ static void __init gic_dist_init(struct gic_chip_data *gic, ...@@ -319,9 +319,9 @@ static void __init gic_dist_init(struct gic_chip_data *gic,
* Setup the Linux IRQ subsystem. * Setup the Linux IRQ subsystem.
*/ */
for (i = irq_start; i < irq_limit; i++) { for (i = irq_start; i < irq_limit; i++) {
set_irq_chip(i, &gic_chip); irq_set_chip(i, &gic_chip);
set_irq_chip_data(i, gic); irq_set_chip_data(i, gic);
set_irq_handler(i, handle_level_irq); irq_set_handler(i, handle_level_irq);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE); set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
} }
......
...@@ -88,8 +88,8 @@ void it8152_init_irq(void) ...@@ -88,8 +88,8 @@ void it8152_init_irq(void)
__raw_writel((0), IT8152_INTC_LDCNIRR); __raw_writel((0), IT8152_INTC_LDCNIRR);
for (irq = IT8152_IRQ(0); irq <= IT8152_LAST_IRQ; irq++) { for (irq = IT8152_IRQ(0); irq <= IT8152_LAST_IRQ; irq++) {
set_irq_chip(irq, &it8152_irq_chip); irq_set_chip(irq, &it8152_irq_chip);
set_irq_handler(irq, handle_level_irq); irq_set_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
} }
} }
......
...@@ -140,7 +140,7 @@ static struct locomo_dev_info locomo_devices[] = { ...@@ -140,7 +140,7 @@ static struct locomo_dev_info locomo_devices[] = {
static void locomo_handler(unsigned int irq, struct irq_desc *desc) static void locomo_handler(unsigned int irq, struct irq_desc *desc)
{ {
struct locomo *lchip = get_irq_chip_data(irq); struct locomo *lchip = irq_get_chip_data(irq);
int req, i; int req, i;
/* Acknowledge the parent IRQ */ /* Acknowledge the parent IRQ */
...@@ -197,15 +197,15 @@ static void locomo_setup_irq(struct locomo *lchip) ...@@ -197,15 +197,15 @@ static void locomo_setup_irq(struct locomo *lchip)
/* /*
* Install handler for IRQ_LOCOMO_HW. * Install handler for IRQ_LOCOMO_HW.
*/ */
set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING); irq_set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING);
set_irq_chip_data(lchip->irq, lchip); irq_set_chip_data(lchip->irq, lchip);
set_irq_chained_handler(lchip->irq, locomo_handler); irq_set_chained_handler(lchip->irq, locomo_handler);
/* Install handlers for IRQ_LOCOMO_* */ /* Install handlers for IRQ_LOCOMO_* */
for ( ; irq <= lchip->irq_base + 3; irq++) { for ( ; irq <= lchip->irq_base + 3; irq++) {
set_irq_chip(irq, &locomo_chip); irq_set_chip(irq, &locomo_chip);
set_irq_chip_data(irq, lchip); irq_set_chip_data(irq, lchip);
set_irq_handler(irq, handle_level_irq); irq_set_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
} }
} }
...@@ -476,8 +476,8 @@ static void __locomo_remove(struct locomo *lchip) ...@@ -476,8 +476,8 @@ static void __locomo_remove(struct locomo *lchip)
device_for_each_child(lchip->dev, NULL, locomo_remove_child); device_for_each_child(lchip->dev, NULL, locomo_remove_child);
if (lchip->irq != NO_IRQ) { if (lchip->irq != NO_IRQ) {
set_irq_chained_handler(lchip->irq, NULL); irq_set_chained_handler(lchip->irq, NULL);
set_irq_data(lchip->irq, NULL); irq_set_handler_data(lchip->irq, NULL);
} }
iounmap(lchip->base); iounmap(lchip->base);
......
...@@ -202,7 +202,7 @@ static void ...@@ -202,7 +202,7 @@ static void
sa1111_irq_handler(unsigned int irq, struct irq_desc *desc) sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
{ {
unsigned int stat0, stat1, i; unsigned int stat0, stat1, i;
struct sa1111 *sachip = get_irq_data(irq); struct sa1111 *sachip = irq_get_handler_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC; void __iomem *mapbase = sachip->base + SA1111_INTC;
stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0); stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0);
...@@ -472,25 +472,25 @@ static void sa1111_setup_irq(struct sa1111 *sachip) ...@@ -472,25 +472,25 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1); sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1);
for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
set_irq_chip(irq, &sa1111_low_chip); irq_set_chip(irq, &sa1111_low_chip);
set_irq_chip_data(irq, sachip); irq_set_chip_data(irq, sachip);
set_irq_handler(irq, handle_edge_irq); irq_set_handler(irq, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
} }
for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) { for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
set_irq_chip(irq, &sa1111_high_chip); irq_set_chip(irq, &sa1111_high_chip);
set_irq_chip_data(irq, sachip); irq_set_chip_data(irq, sachip);
set_irq_handler(irq, handle_edge_irq); irq_set_handler(irq, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
} }
/* /*
* Register SA1111 interrupt * Register SA1111 interrupt
*/ */
set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
set_irq_data(sachip->irq, sachip); irq_set_handler_data(sachip->irq, sachip);
set_irq_chained_handler(sachip->irq, sa1111_irq_handler); irq_set_chained_handler(sachip->irq, sa1111_irq_handler);
} }
/* /*
...@@ -815,8 +815,8 @@ static void __sa1111_remove(struct sa1111 *sachip) ...@@ -815,8 +815,8 @@ static void __sa1111_remove(struct sa1111 *sachip)
clk_disable(sachip->clk); clk_disable(sachip->clk);
if (sachip->irq != NO_IRQ) { if (sachip->irq != NO_IRQ) {
set_irq_chained_handler(sachip->irq, NULL); irq_set_chained_handler(sachip->irq, NULL);
set_irq_data(sachip->irq, NULL); irq_set_handler_data(sachip->irq, NULL);
release_mem_region(sachip->phys + SA1111_INTC, 512); release_mem_region(sachip->phys + SA1111_INTC, 512);
} }
......
...@@ -305,9 +305,9 @@ static void __init vic_set_irq_sources(void __iomem *base, ...@@ -305,9 +305,9 @@ static void __init vic_set_irq_sources(void __iomem *base,
if (vic_sources & (1 << i)) { if (vic_sources & (1 << i)) {
unsigned int irq = irq_start + i; unsigned int irq = irq_start + i;
set_irq_chip(irq, &vic_chip); irq_set_chip(irq, &vic_chip);
set_irq_chip_data(irq, base); irq_set_chip_data(irq, base);
set_irq_handler(irq, handle_level_irq); irq_set_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
} }
} }
......
...@@ -1043,8 +1043,8 @@ ecard_probe(int slot, card_type_t type) ...@@ -1043,8 +1043,8 @@ ecard_probe(int slot, card_type_t type)
*/ */
if (slot < 8) { if (slot < 8) {
ec->irq = 32 + slot; ec->irq = 32 + slot;
set_irq_chip(ec->irq, &ecard_chip); irq_set_chip(ec->irq, &ecard_chip);
set_irq_handler(ec->irq, handle_level_irq); irq_set_handler(ec->irq, handle_level_irq);
set_irq_flags(ec->irq, IRQF_VALID); set_irq_flags(ec->irq, IRQF_VALID);
} }
...@@ -1103,7 +1103,7 @@ static int __init ecard_init(void) ...@@ -1103,7 +1103,7 @@ static int __init ecard_init(void)
irqhw = ecard_probeirqhw(); irqhw = ecard_probeirqhw();
set_irq_chained_handler(IRQ_EXPANSIONCARD, irq_set_chained_handler(IRQ_EXPANSIONCARD,
irqhw ? ecard_irqexp_handler : ecard_irq_handler); irqhw ? ecard_irqexp_handler : ecard_irq_handler);
ecard_proc_init(); ecard_proc_init();
......
...@@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) ...@@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
return; return;
if (cpu_is_at91cap9_revB()) if (cpu_is_at91cap9_revB())
set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH); irq_set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
/* Enable VBus control for UHP ports */ /* Enable VBus control for UHP ports */
for (i = 0; i < data->ports; i++) { for (i = 0; i < data->ports; i++) {
...@@ -157,7 +157,7 @@ static struct platform_device at91_usba_udc_device = { ...@@ -157,7 +157,7 @@ static struct platform_device at91_usba_udc_device = {
void __init at91_add_device_usba(struct usba_platform_data *data) void __init at91_add_device_usba(struct usba_platform_data *data)
{ {
if (cpu_is_at91cap9_revB()) { if (cpu_is_at91cap9_revB()) {
set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH); irq_set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS | at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
AT91_MATRIX_UDPHS_BYPASS_LOCK); AT91_MATRIX_UDPHS_BYPASS_LOCK);
} }
...@@ -861,7 +861,7 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) ...@@ -861,7 +861,7 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
return; return;
if (cpu_is_at91cap9_revB()) if (cpu_is_at91cap9_revB())
set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH); irq_set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
......
...@@ -287,7 +287,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state) ...@@ -287,7 +287,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
else else
wakeups[bank] &= ~mask; wakeups[bank] &= ~mask;
set_irq_wake(gpio_chip[bank].bank->id, state); irq_set_irq_wake(gpio_chip[bank].bank->id, state);
return 0; return 0;
} }
...@@ -511,8 +511,8 @@ void __init at91_gpio_irq_setup(void) ...@@ -511,8 +511,8 @@ void __init at91_gpio_irq_setup(void)
* Can use the "simple" and not "edge" handler since it's * Can use the "simple" and not "edge" handler since it's
* shorter, and the AIC handles interrupts sanely. * shorter, and the AIC handles interrupts sanely.
*/ */
set_irq_chip(pin, &gpio_irqchip); irq_set_chip(pin, &gpio_irqchip);
set_irq_handler(pin, handle_simple_irq); irq_set_handler(pin, handle_simple_irq);
set_irq_flags(pin, IRQF_VALID); set_irq_flags(pin, IRQF_VALID);
} }
...@@ -523,8 +523,8 @@ void __init at91_gpio_irq_setup(void) ...@@ -523,8 +523,8 @@ void __init at91_gpio_irq_setup(void)
if (prev && prev->next == this) if (prev && prev->next == this)
continue; continue;
set_irq_chip_data(id, this); irq_set_chip_data(id, this);
set_irq_chained_handler(id, gpio_irq_handler); irq_set_chained_handler(id, gpio_irq_handler);
} }
pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks); pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks);
} }
......
...@@ -143,8 +143,8 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) ...@@ -143,8 +143,8 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
/* Active Low interrupt, with the specified priority */ /* Active Low interrupt, with the specified priority */
at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
set_irq_chip(i, &at91_aic_chip); irq_set_chip(i, &at91_aic_chip);
set_irq_handler(i, handle_level_irq); irq_set_handler(i, handle_level_irq);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE); set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
/* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */ /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
......
...@@ -93,11 +93,11 @@ static void vic_init(void __iomem *base, struct irq_chip *chip, ...@@ -93,11 +93,11 @@ static void vic_init(void __iomem *base, struct irq_chip *chip,
unsigned int i; unsigned int i;
for (i = 0; i < 32; i++) { for (i = 0; i < 32; i++) {
unsigned int irq = irq_start + i; unsigned int irq = irq_start + i;
set_irq_chip(irq, chip); irq_set_chip(irq, chip);
set_irq_chip_data(irq, base); irq_set_chip_data(irq, base);
if (vic_sources & (1 << i)) { if (vic_sources & (1 << i)) {
set_irq_handler(irq, handle_level_irq); irq_set_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
} }
} }
...@@ -119,9 +119,9 @@ void __init bcmring_init_irq(void) ...@@ -119,9 +119,9 @@ void __init bcmring_init_irq(void)
/* special cases */ /* special cases */
if (INTCHW_INTC1_GPIO0 & IRQ_INTC1_VALID_MASK) { if (INTCHW_INTC1_GPIO0 & IRQ_INTC1_VALID_MASK) {
set_irq_handler(IRQ_GPIO0, handle_simple_irq); irq_set_handler(IRQ_GPIO0, handle_simple_irq);
} }
if (INTCHW_INTC1_GPIO1 & IRQ_INTC1_VALID_MASK) { if (INTCHW_INTC1_GPIO1 & IRQ_INTC1_VALID_MASK) {
set_irq_handler(IRQ_GPIO1, handle_simple_irq); irq_set_handler(IRQ_GPIO1, handle_simple_irq);
} }
} }
...@@ -112,13 +112,13 @@ void __init clps711x_init_irq(void) ...@@ -112,13 +112,13 @@ void __init clps711x_init_irq(void)
for (i = 0; i < NR_IRQS; i++) { for (i = 0; i < NR_IRQS; i++) {
if (INT1_IRQS & (1 << i)) { if (INT1_IRQS & (1 << i)) {
set_irq_handler(i, handle_level_irq); irq_set_handler(i, handle_level_irq);
set_irq_chip(i, &int1_chip); irq_set_chip(i, &int1_chip);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE); set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
} }
if (INT2_IRQS & (1 << i)) { if (INT2_IRQS & (1 << i)) {
set_irq_handler(i, handle_level_irq); irq_set_handler(i, handle_level_irq);
set_irq_chip(i, &int2_chip); irq_set_chip(i, &int2_chip);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE); set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
} }
} }
......
...@@ -167,9 +167,9 @@ void __init cp_intc_init(void) ...@@ -167,9 +167,9 @@ void __init cp_intc_init(void)
/* Set up genirq dispatching for cp_intc */ /* Set up genirq dispatching for cp_intc */
for (i = 0; i < num_irq; i++) { for (i = 0; i < num_irq; i++) {
set_irq_chip(i, &cp_intc_irq_chip); irq_set_chip(i, &cp_intc_irq_chip);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE); set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
set_irq_handler(i, handle_edge_irq); irq_set_handler(i, handle_edge_irq);
} }
/* Enable global interrupt */ /* Enable global interrupt */
......
...@@ -62,7 +62,7 @@ static inline struct davinci_gpio_regs __iomem *irq2regs(int irq) ...@@ -62,7 +62,7 @@ static inline struct davinci_gpio_regs __iomem *irq2regs(int irq)
{ {
struct davinci_gpio_regs __iomem *g; struct davinci_gpio_regs __iomem *g;
g = (__force struct davinci_gpio_regs __iomem *)get_irq_chip_data(irq); g = (__force struct davinci_gpio_regs __iomem *)irq_get_chip_data(irq);
return g; return g;
} }
...@@ -208,7 +208,7 @@ pure_initcall(davinci_gpio_setup); ...@@ -208,7 +208,7 @@ pure_initcall(davinci_gpio_setup);
static void gpio_irq_disable(struct irq_data *d) static void gpio_irq_disable(struct irq_data *d)
{ {
struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
u32 mask = (u32) irq_data_get_irq_data(d); u32 mask = (u32) irq_data_get_irq_handler_data(d);
__raw_writel(mask, &g->clr_falling); __raw_writel(mask, &g->clr_falling);
__raw_writel(mask, &g->clr_rising); __raw_writel(mask, &g->clr_rising);
...@@ -217,7 +217,7 @@ static void gpio_irq_disable(struct irq_data *d) ...@@ -217,7 +217,7 @@ static void gpio_irq_disable(struct irq_data *d)
static void gpio_irq_enable(struct irq_data *d) static void gpio_irq_enable(struct irq_data *d)
{ {
struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
u32 mask = (u32) irq_data_get_irq_data(d); u32 mask = (u32) irq_data_get_irq_handler_data(d);
unsigned status = irqd_get_trigger_type(d); unsigned status = irqd_get_trigger_type(d);
status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING; status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;
...@@ -233,7 +233,7 @@ static void gpio_irq_enable(struct irq_data *d) ...@@ -233,7 +233,7 @@ static void gpio_irq_enable(struct irq_data *d)
static int gpio_irq_type(struct irq_data *d, unsigned trigger) static int gpio_irq_type(struct irq_data *d, unsigned trigger)
{ {
struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
u32 mask = (u32) irq_data_get_irq_data(d); u32 mask = (u32) irq_data_get_irq_handler_data(d);
if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
return -EINVAL; return -EINVAL;
...@@ -276,7 +276,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) ...@@ -276,7 +276,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
status >>= 16; status >>= 16;
/* now demux them to the right lowlevel handler */ /* now demux them to the right lowlevel handler */
n = (int)get_irq_data(irq); n = (int)irq_get_handler_data(irq);
while (status) { while (status) {
res = ffs(status); res = ffs(status);
n += res; n += res;
...@@ -314,7 +314,7 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset) ...@@ -314,7 +314,7 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset)
static int gpio_irq_type_unbanked(struct irq_data *d, unsigned trigger) static int gpio_irq_type_unbanked(struct irq_data *d, unsigned trigger)
{ {
struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
u32 mask = (u32) irq_data_get_irq_data(d); u32 mask = (u32) irq_data_get_irq_handler_data(d);
if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
return -EINVAL; return -EINVAL;
...@@ -397,9 +397,9 @@ static int __init davinci_gpio_irq_setup(void) ...@@ -397,9 +397,9 @@ static int __init davinci_gpio_irq_setup(void)
/* set the direct IRQs up to use that irqchip */ /* set the direct IRQs up to use that irqchip */
for (gpio = 0; gpio < soc_info->gpio_unbanked; gpio++, irq++) { for (gpio = 0; gpio < soc_info->gpio_unbanked; gpio++, irq++) {
set_irq_chip(irq, &gpio_irqchip_unbanked); irq_set_chip(irq, &gpio_irqchip_unbanked);
set_irq_data(irq, (void *) __gpio_mask(gpio)); irq_set_handler_data(irq, (void *)__gpio_mask(gpio));
set_irq_chip_data(irq, (__force void *) g); irq_set_chip_data(irq, (__force void *)g);
irq_set_status_flags(irq, IRQ_TYPE_EDGE_BOTH); irq_set_status_flags(irq, IRQ_TYPE_EDGE_BOTH);
} }
...@@ -421,15 +421,15 @@ static int __init davinci_gpio_irq_setup(void) ...@@ -421,15 +421,15 @@ static int __init davinci_gpio_irq_setup(void)
__raw_writel(~0, &g->clr_rising); __raw_writel(~0, &g->clr_rising);
/* set up all irqs in this bank */ /* set up all irqs in this bank */
set_irq_chained_handler(bank_irq, gpio_irq_handler); irq_set_chained_handler(bank_irq, gpio_irq_handler);
set_irq_chip_data(bank_irq, (__force void *) g); irq_set_chip_data(bank_irq, (__force void *)g);
set_irq_data(bank_irq, (void *) irq); irq_set_handler_data(bank_irq, (void *)irq);
for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) { for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) {
set_irq_chip(irq, &gpio_irqchip); irq_set_chip(irq, &gpio_irqchip);
set_irq_chip_data(irq, (__force void *) g); irq_set_chip_data(irq, (__force void *)g);
set_irq_data(irq, (void *) __gpio_mask(gpio)); irq_set_handler_data(irq, (void *)__gpio_mask(gpio));
set_irq_handler(irq, handle_simple_irq); irq_set_handler(irq, handle_simple_irq);
set_irq_flags(irq, IRQF_VALID);