Commit 604beee8 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'renesas-soc-fixes2-for-v3.19' of...

Merge tag 'renesas-soc-fixes2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes

Merge "Second Round of Renesas ARM Based SoC Fixes for v3.19" from Simon
Horman:

* Instantiate GIC from C board code in legacy builds on r8a7778 and r8a7779

* tag 'renesas-soc-fixes2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

:
  ARM: shmobile: r8a7779: Instantiate GIC from C board code in legacy builds
  ARM: shmobile: r8a7778: Instantiate GIC from C board code in legacy builds
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 07bf3283 f469cde2
...@@ -576,11 +576,18 @@ void __init r8a7778_init_irq_extpin(int irlm) ...@@ -576,11 +576,18 @@ void __init r8a7778_init_irq_extpin(int irlm)
void __init r8a7778_init_irq_dt(void) void __init r8a7778_init_irq_dt(void)
{ {
void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000); void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000);
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
void __iomem *gic_dist_base = ioremap_nocache(0xfe438000, 0x1000);
void __iomem *gic_cpu_base = ioremap_nocache(0xfe430000, 0x1000);
#endif
BUG_ON(!base); BUG_ON(!base);
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
gic_init(0, 29, gic_dist_base, gic_cpu_base);
#else
irqchip_init(); irqchip_init();
#endif
/* route all interrupts to ARM */ /* route all interrupts to ARM */
__raw_writel(0x73ffffff, base + INT2NTSR0); __raw_writel(0x73ffffff, base + INT2NTSR0);
__raw_writel(0xffffffff, base + INT2NTSR1); __raw_writel(0xffffffff, base + INT2NTSR1);
......
...@@ -720,10 +720,17 @@ static int r8a7779_set_wake(struct irq_data *data, unsigned int on) ...@@ -720,10 +720,17 @@ static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
void __init r8a7779_init_irq_dt(void) void __init r8a7779_init_irq_dt(void)
{ {
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
void __iomem *gic_dist_base = ioremap_nocache(0xf0001000, 0x1000);
void __iomem *gic_cpu_base = ioremap_nocache(0xf0000100, 0x1000);
#endif
gic_arch_extn.irq_set_wake = r8a7779_set_wake; gic_arch_extn.irq_set_wake = r8a7779_set_wake;
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
gic_init(0, 29, gic_dist_base, gic_cpu_base);
#else
irqchip_init(); irqchip_init();
#endif
/* route all interrupts to ARM */ /* route all interrupts to ARM */
__raw_writel(0xffffffff, INT2NTSR0); __raw_writel(0xffffffff, INT2NTSR0);
__raw_writel(0x3fffffff, INT2NTSR1); __raw_writel(0x3fffffff, INT2NTSR1);
......
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