Commit 5686a1e5 authored by Thomas Petazzoni's avatar Thomas Petazzoni Committed by Jason Cooper

bus: mvebu: pass the coherency availability information at init time

Until now, the mvebu-mbus was guessing by itself whether hardware I/O
coherency was available or not by poking into the Device Tree to see
if the coherency fabric Device Tree node was present or not.

However, on some upcoming SoCs, the presence or absence of the
coherency fabric DT node isn't sufficient: in CONFIG_SMP, the
coherency can be enabled, but not in !CONFIG_SMP.

In order to clean this up, the mvebu_mbus_dt_init() function is
extended to get a boolean argument telling whether coherency is
enabled or not. Therefore, the logic to decide whether coherency is
available or not now belongs to the core SoC code instead of the
mvebu-mbus driver itself, which is much better.
Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397483228-25625-4-git-send-email-thomas.petazzoni@free-electrons.comSigned-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent 501f928e
...@@ -195,7 +195,7 @@ static void __init kirkwood_dt_init(void) ...@@ -195,7 +195,7 @@ static void __init kirkwood_dt_init(void)
{ {
kirkwood_disable_mbus_error_propagation(); kirkwood_disable_mbus_error_propagation();
BUG_ON(mvebu_mbus_dt_init()); BUG_ON(mvebu_mbus_dt_init(false));
#ifdef CONFIG_CACHE_FEROCEON_L2 #ifdef CONFIG_CACHE_FEROCEON_L2
feroceon_of_init(); feroceon_of_init();
......
...@@ -58,7 +58,7 @@ static void __init mvebu_timer_and_clk_init(void) ...@@ -58,7 +58,7 @@ static void __init mvebu_timer_and_clk_init(void)
of_clk_init(NULL); of_clk_init(NULL);
clocksource_of_init(); clocksource_of_init();
coherency_init(); coherency_init();
BUG_ON(mvebu_mbus_dt_init()); BUG_ON(mvebu_mbus_dt_init(coherency_available()));
#ifdef CONFIG_CACHE_L2X0 #ifdef CONFIG_CACHE_L2X0
l2x0_of_init(0, ~0UL); l2x0_of_init(0, ~0UL);
#endif #endif
......
...@@ -23,7 +23,7 @@ static void __init dove_init(void) ...@@ -23,7 +23,7 @@ static void __init dove_init(void)
#ifdef CONFIG_CACHE_TAUROS2 #ifdef CONFIG_CACHE_TAUROS2
tauros2_init(0); tauros2_init(0);
#endif #endif
BUG_ON(mvebu_mbus_dt_init()); BUG_ON(mvebu_mbus_dt_init(false));
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
} }
......
...@@ -169,7 +169,7 @@ static void __init kirkwood_dt_init(void) ...@@ -169,7 +169,7 @@ static void __init kirkwood_dt_init(void)
{ {
kirkwood_disable_mbus_error_propagation(); kirkwood_disable_mbus_error_propagation();
BUG_ON(mvebu_mbus_dt_init()); BUG_ON(mvebu_mbus_dt_init(false));
#ifdef CONFIG_CACHE_FEROCEON_L2 #ifdef CONFIG_CACHE_FEROCEON_L2
feroceon_of_init(); feroceon_of_init();
......
...@@ -694,7 +694,6 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus, ...@@ -694,7 +694,6 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus,
phys_addr_t sdramwins_phys_base, phys_addr_t sdramwins_phys_base,
size_t sdramwins_size) size_t sdramwins_size)
{ {
struct device_node *np;
int win; int win;
mbus->mbuswins_base = ioremap(mbuswins_phys_base, mbuswins_size); mbus->mbuswins_base = ioremap(mbuswins_phys_base, mbuswins_size);
...@@ -707,12 +706,6 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus, ...@@ -707,12 +706,6 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus,
return -ENOMEM; return -ENOMEM;
} }
np = of_find_compatible_node(NULL, NULL, "marvell,coherency-fabric");
if (np) {
mbus->hw_io_coherency = 1;
of_node_put(np);
}
for (win = 0; win < mbus->soc->num_wins; win++) for (win = 0; win < mbus->soc->num_wins; win++)
mvebu_mbus_disable_window(mbus, win); mvebu_mbus_disable_window(mbus, win);
...@@ -882,7 +875,7 @@ static void __init mvebu_mbus_get_pcie_resources(struct device_node *np, ...@@ -882,7 +875,7 @@ static void __init mvebu_mbus_get_pcie_resources(struct device_node *np,
} }
} }
int __init mvebu_mbus_dt_init(void) int __init mvebu_mbus_dt_init(bool is_coherent)
{ {
struct resource mbuswins_res, sdramwins_res; struct resource mbuswins_res, sdramwins_res;
struct device_node *np, *controller; struct device_node *np, *controller;
...@@ -920,6 +913,8 @@ int __init mvebu_mbus_dt_init(void) ...@@ -920,6 +913,8 @@ int __init mvebu_mbus_dt_init(void)
return -EINVAL; return -EINVAL;
} }
mbus_state.hw_io_coherency = is_coherent;
/* Get optional pcie-{mem,io}-aperture properties */ /* Get optional pcie-{mem,io}-aperture properties */
mvebu_mbus_get_pcie_resources(np, &mbus_state.pcie_mem_aperture, mvebu_mbus_get_pcie_resources(np, &mbus_state.pcie_mem_aperture,
&mbus_state.pcie_io_aperture); &mbus_state.pcie_io_aperture);
......
...@@ -73,6 +73,6 @@ int mvebu_mbus_del_window(phys_addr_t base, size_t size); ...@@ -73,6 +73,6 @@ int mvebu_mbus_del_window(phys_addr_t base, size_t size);
int mvebu_mbus_init(const char *soc, phys_addr_t mbus_phys_base, int mvebu_mbus_init(const char *soc, phys_addr_t mbus_phys_base,
size_t mbus_size, phys_addr_t sdram_phys_base, size_t mbus_size, phys_addr_t sdram_phys_base,
size_t sdram_size); size_t sdram_size);
int mvebu_mbus_dt_init(void); int mvebu_mbus_dt_init(bool is_coherent);
#endif /* __LINUX_MBUS_H */ #endif /* __LINUX_MBUS_H */
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