Commit 52d90145 authored by Russell King's avatar Russell King
Browse files
parents f4b23cc2 59376cc3
......@@ -26,6 +26,7 @@
#include <mach/colibri.h>
#include <mach/ohci.h>
#include <mach/pxafb.h>
#include <mach/audio.h>
#include "generic.h"
#include "devices.h"
......@@ -145,7 +146,7 @@ static void __init colibri_pxa300_init_lcd(void)
static inline void colibri_pxa300_init_lcd(void) {}
#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */
#if defined(SND_AC97_CODEC) || defined(SND_AC97_CODEC_MODULE)
#if defined(CONFIG_SND_AC97_CODEC) || defined(CONFIG_SND_AC97_CODEC_MODULE)
static mfp_cfg_t colibri_pxa310_ac97_pin_config[] __initdata = {
GPIO24_AC97_SYSCLK,
GPIO23_AC97_nACRESET,
......
......@@ -446,7 +446,7 @@ static struct platform_device corgiled_device = {
static struct pxamci_platform_data corgi_mci_platform_data = {
.detect_delay_ms = 250,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.gpio_card_detect = -1,
.gpio_card_detect = CORGI_GPIO_nSD_DETECT,
.gpio_card_ro = CORGI_GPIO_nSD_WP,
.gpio_power = CORGI_GPIO_SD_PWR,
};
......
......@@ -256,13 +256,9 @@ static void init_sdram_rows(void)
static u32 mdrefr_dri(unsigned int freq)
{
u32 dri = 0;
u32 interval = freq * SDRAM_TREF / sdram_rows;
if (cpu_is_pxa25x())
dri = ((freq * SDRAM_TREF) / (sdram_rows * 32));
if (cpu_is_pxa27x())
dri = ((freq * SDRAM_TREF) / (sdram_rows - 31)) / 32;
return dri;
return (interval - (cpu_is_pxa27x() ? 31 : 0)) / 32;
}
/* find a valid frequency point */
......
......@@ -41,10 +41,10 @@ void pxa27x_clear_otgph(void)
EXPORT_SYMBOL(pxa27x_clear_otgph);
static unsigned long ac97_reset_config[] = {
GPIO95_AC97_nRESET,
GPIO95_GPIO,
GPIO113_AC97_nRESET,
GPIO113_GPIO,
GPIO113_AC97_nRESET,
GPIO95_GPIO,
GPIO95_AC97_nRESET,
};
void pxa27x_assert_ac97reset(int reset_gpio, int on)
......
......@@ -178,7 +178,6 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
unsigned long val,
struct cpufreq_freqs *freqs)
{
#warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock"
switch (val) {
case CPUFREQ_PRECHANGE:
if (freqs->new > freqs->old) {
......@@ -186,7 +185,7 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
"pre-updating\n",
freqs->new / 1000, (freqs->new / 100) % 10,
freqs->old / 1000, (freqs->old / 100) % 10);
pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
pxa2xx_pcmcia_set_timing(skt);
}
break;
......@@ -196,7 +195,7 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
"post-updating\n",
freqs->new / 1000, (freqs->new / 100) % 10,
freqs->old / 1000, (freqs->old / 100) % 10);
pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
pxa2xx_pcmcia_set_timing(skt);
}
break;
}
......
......@@ -2561,7 +2561,7 @@ static void pxa_udc_shutdown(struct platform_device *_dev)
udc_disable(udc);
}
#ifdef CONFIG_CPU_PXA27x
#ifdef CONFIG_PXA27x
extern void pxa27x_clear_otgph(void);
#else
#define pxa27x_clear_otgph() do {} while (0)
......
......@@ -203,7 +203,7 @@ static inline void pxa27x_reset_hc(struct pxa27x_ohci *ohci)
__raw_writel(uhchr & ~UHCHR_FHR, ohci->mmio_base + UHCHR);
}
#ifdef CONFIG_CPU_PXA27x
#ifdef CONFIG_PXA27x
extern void pxa27x_clear_otgph(void);
#else
#define pxa27x_clear_otgph() do {} while (0)
......
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