Commit 2b78f1e1 authored by Andreas Larsson's avatar Andreas Larsson Committed by Linus Walleij

gpio: gpio-generic: Add 16 and 32 bit big endian byte order support

There is no general support for 64-bit big endian accesses, so that is
left unsupported.
Signed-off-by: default avatarAndreas Larsson <andreas@gaisler.com>
Acked-by: default avatarAnton Vorontsov <anton@enomsg.org>
Signed-off-by: Linus Walleij's avatarLinus Walleij <linus.walleij@linaro.org>
parent 43158441
......@@ -104,6 +104,26 @@ static unsigned long bgpio_read64(void __iomem *reg)
}
#endif /* BITS_PER_LONG >= 64 */
static void bgpio_write16be(void __iomem *reg, unsigned long data)
{
iowrite16be(data, reg);
}
static unsigned long bgpio_read16be(void __iomem *reg)
{
return ioread16be(reg);
}
static void bgpio_write32be(void __iomem *reg, unsigned long data)
{
iowrite32be(data, reg);
}
static unsigned long bgpio_read32be(void __iomem *reg)
{
return ioread32be(reg);
}
static unsigned long bgpio_pin2mask(struct bgpio_chip *bgc, unsigned int pin)
{
return 1 << pin;
......@@ -249,7 +269,8 @@ static int bgpio_dir_out_inv(struct gpio_chip *gc, unsigned int gpio, int val)
static int bgpio_setup_accessors(struct device *dev,
struct bgpio_chip *bgc,
bool be)
bool bit_be,
bool byte_be)
{
switch (bgc->bits) {
......@@ -258,17 +279,33 @@ static int bgpio_setup_accessors(struct device *dev,
bgc->write_reg = bgpio_write8;
break;
case 16:
bgc->read_reg = bgpio_read16;
bgc->write_reg = bgpio_write16;
if (byte_be) {
bgc->read_reg = bgpio_read16be;
bgc->write_reg = bgpio_write16be;
} else {
bgc->read_reg = bgpio_read16;
bgc->write_reg = bgpio_write16;
}
break;
case 32:
bgc->read_reg = bgpio_read32;
bgc->write_reg = bgpio_write32;
if (byte_be) {
bgc->read_reg = bgpio_read32be;
bgc->write_reg = bgpio_write32be;
} else {
bgc->read_reg = bgpio_read32;
bgc->write_reg = bgpio_write32;
}
break;
#if BITS_PER_LONG >= 64
case 64:
bgc->read_reg = bgpio_read64;
bgc->write_reg = bgpio_write64;
if (byte_be) {
dev_err(dev,
"64 bit big endian byte order unsupported\n");
return -EINVAL;
} else {
bgc->read_reg = bgpio_read64;
bgc->write_reg = bgpio_write64;
}
break;
#endif /* BITS_PER_LONG >= 64 */
default:
......@@ -276,7 +313,7 @@ static int bgpio_setup_accessors(struct device *dev,
return -EINVAL;
}
bgc->pin2mask = be ? bgpio_pin2mask_be : bgpio_pin2mask;
bgc->pin2mask = bit_be ? bgpio_pin2mask_be : bgpio_pin2mask;
return 0;
}
......@@ -385,7 +422,8 @@ int bgpio_init(struct bgpio_chip *bgc, struct device *dev,
if (ret)
return ret;
ret = bgpio_setup_accessors(dev, bgc, flags & BGPIOF_BIG_ENDIAN);
ret = bgpio_setup_accessors(dev, bgc, flags & BGPIOF_BIG_ENDIAN,
flags & BGPIOF_BIG_ENDIAN_BYTE_ORDER);
if (ret)
return ret;
......
......@@ -72,5 +72,6 @@ int bgpio_init(struct bgpio_chip *bgc, struct device *dev,
#define BGPIOF_BIG_ENDIAN BIT(0)
#define BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */
#define BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */
#define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3)
#endif /* __BASIC_MMIO_GPIO_H */
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