Commit 27a28736 authored by Linus Walleij's avatar Linus Walleij

Merge branch 'ib-pinctrl-genprops' into devel

parents af81ba3c 2956b5d9
...@@ -146,10 +146,11 @@ a pull-up resistor is needed on the outgoing rail to complete the circuit, and ...@@ -146,10 +146,11 @@ a pull-up resistor is needed on the outgoing rail to complete the circuit, and
in the second case, a pull-down resistor is needed on the rail. in the second case, a pull-down resistor is needed on the rail.
Hardware that supports open drain or open source or both, can implement a Hardware that supports open drain or open source or both, can implement a
special callback in the gpio_chip: .set_single_ended() that takes an enum flag special callback in the gpio_chip: .set_config() that takes a generic
telling whether to configure the line as open drain, open source or push-pull. pinconf packed value telling whether to configure the line as open drain,
This will happen in response to the GPIO_OPEN_DRAIN or GPIO_OPEN_SOURCE flag open source or push-pull. This will happen in response to the
set in the machine file, or coming from other hardware descriptions. GPIO_OPEN_DRAIN or GPIO_OPEN_SOURCE flag set in the machine file, or coming
from other hardware descriptions.
If this state can not be configured in hardware, i.e. if the GPIO hardware does If this state can not be configured in hardware, i.e. if the GPIO hardware does
not support open drain/open source in hardware, the GPIO library will instead not support open drain/open source in hardware, the GPIO library will instead
......
...@@ -308,6 +308,18 @@ static int bcm_kona_gpio_set_debounce(struct gpio_chip *chip, unsigned gpio, ...@@ -308,6 +308,18 @@ static int bcm_kona_gpio_set_debounce(struct gpio_chip *chip, unsigned gpio,
return 0; return 0;
} }
static int bcm_kona_gpio_set_config(struct gpio_chip *chip, unsigned gpio,
unsigned long config)
{
u32 debounce;
if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE)
return -ENOTSUPP;
debounce = pinconf_to_config_argument(config);
return bcm_kona_gpio_set_debounce(chip, gpio, debounce);
}
static const struct gpio_chip template_chip = { static const struct gpio_chip template_chip = {
.label = "bcm-kona-gpio", .label = "bcm-kona-gpio",
.owner = THIS_MODULE, .owner = THIS_MODULE,
...@@ -318,7 +330,7 @@ static const struct gpio_chip template_chip = { ...@@ -318,7 +330,7 @@ static const struct gpio_chip template_chip = {
.get = bcm_kona_gpio_get, .get = bcm_kona_gpio_get,
.direction_output = bcm_kona_gpio_direction_output, .direction_output = bcm_kona_gpio_direction_output,
.set = bcm_kona_gpio_set, .set = bcm_kona_gpio_set,
.set_debounce = bcm_kona_gpio_set_debounce, .set_config = bcm_kona_gpio_set_config,
.to_irq = bcm_kona_gpio_to_irq, .to_irq = bcm_kona_gpio_to_irq,
.base = 0, .base = 0,
}; };
......
...@@ -272,12 +272,16 @@ static int dln2_gpio_direction_output(struct gpio_chip *chip, unsigned offset, ...@@ -272,12 +272,16 @@ static int dln2_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
return dln2_gpio_set_direction(chip, offset, DLN2_GPIO_DIRECTION_OUT); return dln2_gpio_set_direction(chip, offset, DLN2_GPIO_DIRECTION_OUT);
} }
static int dln2_gpio_set_debounce(struct gpio_chip *chip, unsigned offset, static int dln2_gpio_set_config(struct gpio_chip *chip, unsigned offset,
unsigned debounce) unsigned long config)
{ {
struct dln2_gpio *dln2 = gpiochip_get_data(chip); struct dln2_gpio *dln2 = gpiochip_get_data(chip);
__le32 duration = cpu_to_le32(debounce); __le32 duration;
if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE)
return -ENOTSUPP;
duration = cpu_to_le32(pinconf_to_config_argument(config));
return dln2_transfer_tx(dln2->pdev, DLN2_GPIO_SET_DEBOUNCE, return dln2_transfer_tx(dln2->pdev, DLN2_GPIO_SET_DEBOUNCE,
&duration, sizeof(duration)); &duration, sizeof(duration));
} }
...@@ -474,7 +478,7 @@ static int dln2_gpio_probe(struct platform_device *pdev) ...@@ -474,7 +478,7 @@ static int dln2_gpio_probe(struct platform_device *pdev)
dln2->gpio.get_direction = dln2_gpio_get_direction; dln2->gpio.get_direction = dln2_gpio_get_direction;
dln2->gpio.direction_input = dln2_gpio_direction_input; dln2->gpio.direction_input = dln2_gpio_direction_input;
dln2->gpio.direction_output = dln2_gpio_direction_output; dln2->gpio.direction_output = dln2_gpio_direction_output;
dln2->gpio.set_debounce = dln2_gpio_set_debounce; dln2->gpio.set_config = dln2_gpio_set_config;
platform_set_drvdata(pdev, dln2); platform_set_drvdata(pdev, dln2);
......
...@@ -279,6 +279,18 @@ static int dwapb_gpio_set_debounce(struct gpio_chip *gc, ...@@ -279,6 +279,18 @@ static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
return 0; return 0;
} }
static int dwapb_gpio_set_config(struct gpio_chip *gc, unsigned offset,
unsigned long config)
{
u32 debounce;
if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE)
return -ENOTSUPP;
debounce = pinconf_to_config_argument(config);
return dwapb_gpio_set_debounce(gc, offset, debounce);
}
static irqreturn_t dwapb_irq_handler_mfd(int irq, void *dev_id) static irqreturn_t dwapb_irq_handler_mfd(int irq, void *dev_id)
{ {
u32 worked; u32 worked;
...@@ -426,7 +438,7 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, ...@@ -426,7 +438,7 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
/* Only port A support debounce */ /* Only port A support debounce */
if (pp->idx == 0) if (pp->idx == 0)
port->gc.set_debounce = dwapb_gpio_set_debounce; port->gc.set_config = dwapb_gpio_set_config;
if (pp->irq) if (pp->irq)
dwapb_configure_irqs(gpio, port, pp); dwapb_configure_irqs(gpio, port, pp);
......
...@@ -291,15 +291,20 @@ static struct ep93xx_gpio_bank ep93xx_gpio_banks[] = { ...@@ -291,15 +291,20 @@ static struct ep93xx_gpio_bank ep93xx_gpio_banks[] = {
EP93XX_GPIO_BANK("H", 0x40, 0x44, 56, false), EP93XX_GPIO_BANK("H", 0x40, 0x44, 56, false),
}; };
static int ep93xx_gpio_set_debounce(struct gpio_chip *chip, static int ep93xx_gpio_set_config(struct gpio_chip *chip, unsigned offset,
unsigned offset, unsigned debounce) unsigned long config)
{ {
int gpio = chip->base + offset; int gpio = chip->base + offset;
int irq = gpio_to_irq(gpio); int irq = gpio_to_irq(gpio);
u32 debounce;
if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE)
return -ENOTSUPP;
if (irq < 0) if (irq < 0)
return -EINVAL; return -EINVAL;
debounce = pinconf_to_config_argument(config);
ep93xx_gpio_int_debounce(irq, debounce ? true : false); ep93xx_gpio_int_debounce(irq, debounce ? true : false);
return 0; return 0;
...@@ -335,7 +340,7 @@ static int ep93xx_gpio_add_bank(struct gpio_chip *gc, struct device *dev, ...@@ -335,7 +340,7 @@ static int ep93xx_gpio_add_bank(struct gpio_chip *gc, struct device *dev,
gc->base = bank->base; gc->base = bank->base;
if (bank->has_debounce) { if (bank->has_debounce) {
gc->set_debounce = ep93xx_gpio_set_debounce; gc->set_config = ep93xx_gpio_set_config;
gc->to_irq = ep93xx_gpio_to_irq; gc->to_irq = ep93xx_gpio_to_irq;
} }
......
...@@ -131,9 +131,8 @@ static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset); ...@@ -131,9 +131,8 @@ static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset);
static int f7188x_gpio_direction_out(struct gpio_chip *chip, static int f7188x_gpio_direction_out(struct gpio_chip *chip,
unsigned offset, int value); unsigned offset, int value);
static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value); static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
static int f7188x_gpio_set_single_ended(struct gpio_chip *gc, static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
unsigned offset, unsigned long config);
enum single_ended_mode mode);
#define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \ #define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \
{ \ { \
...@@ -145,7 +144,7 @@ static int f7188x_gpio_set_single_ended(struct gpio_chip *gc, ...@@ -145,7 +144,7 @@ static int f7188x_gpio_set_single_ended(struct gpio_chip *gc,
.get = f7188x_gpio_get, \ .get = f7188x_gpio_get, \
.direction_output = f7188x_gpio_direction_out, \ .direction_output = f7188x_gpio_direction_out, \
.set = f7188x_gpio_set, \ .set = f7188x_gpio_set, \
.set_single_ended = f7188x_gpio_set_single_ended, \ .set_config = f7188x_gpio_set_config, \
.base = _base, \ .base = _base, \
.ngpio = _ngpio, \ .ngpio = _ngpio, \
.can_sleep = true, \ .can_sleep = true, \
...@@ -326,17 +325,17 @@ static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) ...@@ -326,17 +325,17 @@ static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
superio_exit(sio->addr); superio_exit(sio->addr);
} }
static int f7188x_gpio_set_single_ended(struct gpio_chip *chip, static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
unsigned offset, unsigned long config)
enum single_ended_mode mode)
{ {
int err; int err;
enum pin_config_param param = pinconf_to_config_param(config);
struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
struct f7188x_sio *sio = bank->data->sio; struct f7188x_sio *sio = bank->data->sio;
u8 data; u8 data;
if (mode != LINE_MODE_OPEN_DRAIN && if (param != PIN_CONFIG_DRIVE_OPEN_DRAIN &&
mode != LINE_MODE_PUSH_PULL) param != PIN_CONFIG_DRIVE_PUSH_PULL)
return -ENOTSUPP; return -ENOTSUPP;
err = superio_enter(sio->addr); err = superio_enter(sio->addr);
...@@ -345,7 +344,7 @@ static int f7188x_gpio_set_single_ended(struct gpio_chip *chip, ...@@ -345,7 +344,7 @@ static int f7188x_gpio_set_single_ended(struct gpio_chip *chip,
superio_select(sio->addr, SIO_LD_GPIO); superio_select(sio->addr, SIO_LD_GPIO);
data = superio_inb(sio->addr, gpio_out_mode(bank->regbase)); data = superio_inb(sio->addr, gpio_out_mode(bank->regbase));
if (mode == LINE_MODE_OPEN_DRAIN) if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN)
data &= ~BIT(offset); data &= ~BIT(offset);
else else
data |= BIT(offset); data |= BIT(offset);
......
...@@ -100,21 +100,21 @@ static int lp873x_gpio_request(struct gpio_chip *gc, unsigned int offset) ...@@ -100,21 +100,21 @@ static int lp873x_gpio_request(struct gpio_chip *gc, unsigned int offset)
return 0; return 0;
} }
static int lp873x_gpio_set_single_ended(struct gpio_chip *gc, static int lp873x_gpio_set_config(struct gpio_chip *gc, unsigned offset,
unsigned int offset, unsigned long config)
enum single_ended_mode mode)
{ {
struct lp873x_gpio *gpio = gpiochip_get_data(gc); struct lp873x_gpio *gpio = gpiochip_get_data(gc);
switch (mode) { switch (pinconf_to_config_param(config)) {
case LINE_MODE_OPEN_DRAIN: case PIN_CONFIG_DRIVE_OPEN_DRAIN:
return regmap_update_bits(gpio->lp873->regmap, return regmap_update_bits(gpio->lp873->regmap,
LP873X_REG_GPO_CTRL, LP873X_REG_GPO_CTRL,
BIT(offset * BITS_PER_GPO + BIT(offset * BITS_PER_GPO +
LP873X_GPO_CTRL_OD), LP873X_GPO_CTRL_OD),
BIT(offset * BITS_PER_GPO + BIT(offset * BITS_PER_GPO +
LP873X_GPO_CTRL_OD)); LP873X_GPO_CTRL_OD));
case LINE_MODE_PUSH_PULL:
case PIN_CONFIG_DRIVE_PUSH_PULL:
return regmap_update_bits(gpio->lp873->regmap, return regmap_update_bits(gpio->lp873->regmap,
LP873X_REG_GPO_CTRL, LP873X_REG_GPO_CTRL,
BIT(offset * BITS_PER_GPO + BIT(offset * BITS_PER_GPO +
...@@ -133,7 +133,7 @@ static const struct gpio_chip template_chip = { ...@@ -133,7 +133,7 @@ static const struct gpio_chip template_chip = {
.direction_output = lp873x_gpio_direction_output, .direction_output = lp873x_gpio_direction_output,
.get = lp873x_gpio_get, .get = lp873x_gpio_get,
.set = lp873x_gpio_set, .set = lp873x_gpio_set,
.set_single_ended = lp873x_gpio_set_single_ended, .set_config = lp873x_gpio_set_config,
.base = -1, .base = -1,
.ngpio = 2, .ngpio = 2,
.can_sleep = true, .can_sleep = true,
......
...@@ -152,11 +152,10 @@ static int max77620_gpio_dir_output(struct gpio_chip *gc, unsigned int offset, ...@@ -152,11 +152,10 @@ static int max77620_gpio_dir_output(struct gpio_chip *gc, unsigned int offset,
return ret; return ret;
} }
static int max77620_gpio_set_debounce(struct gpio_chip *gc, static int max77620_gpio_set_debounce(struct max77620_gpio *mgpio,
unsigned int offset, unsigned int offset,
unsigned int debounce) unsigned int debounce)
{ {
struct max77620_gpio *mgpio = gpiochip_get_data(gc);
u8 val; u8 val;
int ret; int ret;
...@@ -202,21 +201,23 @@ static void max77620_gpio_set(struct gpio_chip *gc, unsigned int offset, ...@@ -202,21 +201,23 @@ static void max77620_gpio_set(struct gpio_chip *gc, unsigned int offset,
dev_err(mgpio->dev, "CNFG_GPIO_OUT update failed: %d\n", ret); dev_err(mgpio->dev, "CNFG_GPIO_OUT update failed: %d\n", ret);
} }
static int max77620_gpio_set_single_ended(struct gpio_chip *gc, static int max77620_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
unsigned int offset, unsigned long config)
enum single_ended_mode mode)
{ {
struct max77620_gpio *mgpio = gpiochip_get_data(gc); struct max77620_gpio *mgpio = gpiochip_get_data(gc);
switch (mode) { switch (pinconf_to_config_param(config)) {
case LINE_MODE_OPEN_DRAIN: case PIN_CONFIG_DRIVE_OPEN_DRAIN:
return regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset), return regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset),
MAX77620_CNFG_GPIO_DRV_MASK, MAX77620_CNFG_GPIO_DRV_MASK,
MAX77620_CNFG_GPIO_DRV_OPENDRAIN); MAX77620_CNFG_GPIO_DRV_OPENDRAIN);
case LINE_MODE_PUSH_PULL: case PIN_CONFIG_DRIVE_PUSH_PULL:
return regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset), return regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset),
MAX77620_CNFG_GPIO_DRV_MASK, MAX77620_CNFG_GPIO_DRV_MASK,
MAX77620_CNFG_GPIO_DRV_PUSHPULL); MAX77620_CNFG_GPIO_DRV_PUSHPULL);
case PIN_CONFIG_INPUT_DEBOUNCE:
return max77620_gpio_set_debounce(mgpio, offset,
pinconf_to_config_argument(config));
default: default:
break; break;
} }
...@@ -257,9 +258,8 @@ static int max77620_gpio_probe(struct platform_device *pdev) ...@@ -257,9 +258,8 @@ static int max77620_gpio_probe(struct platform_device *pdev)
mgpio->gpio_chip.direction_input = max77620_gpio_dir_input; mgpio->gpio_chip.direction_input = max77620_gpio_dir_input;
mgpio->gpio_chip.get = max77620_gpio_get; mgpio->gpio_chip.get = max77620_gpio_get;
mgpio->gpio_chip.direction_output = max77620_gpio_dir_output; mgpio->gpio_chip.direction_output = max77620_gpio_dir_output;
mgpio->gpio_chip.set_debounce = max77620_gpio_set_debounce;
mgpio->gpio_chip.set = max77620_gpio_set; mgpio->gpio_chip.set = max77620_gpio_set;
mgpio->gpio_chip.set_single_ended = max77620_gpio_set_single_ended; mgpio->gpio_chip.set_config = max77620_gpio_set_config;
mgpio->gpio_chip.to_irq = max77620_gpio_to_irq; mgpio->gpio_chip.to_irq = max77620_gpio_to_irq;
mgpio->gpio_chip.ngpio = MAX77620_GPIO_NR; mgpio->gpio_chip.ngpio = MAX77620_GPIO_NR;
mgpio->gpio_chip.can_sleep = 1; mgpio->gpio_chip.can_sleep = 1;
......
...@@ -89,22 +89,18 @@ static int men_z127_debounce(struct gpio_chip *gc, unsigned gpio, ...@@ -89,22 +89,18 @@ static int men_z127_debounce(struct gpio_chip *gc, unsigned gpio,
static int men_z127_set_single_ended(struct gpio_chip *gc, static int men_z127_set_single_ended(struct gpio_chip *gc,
unsigned offset, unsigned offset,
enum single_ended_mode mode) enum pin_config_param param)
{ {
struct men_z127_gpio *priv = gpiochip_get_data(gc); struct men_z127_gpio *priv = gpiochip_get_data(gc);
u32 od_en; u32 od_en;
if (mode != LINE_MODE_OPEN_DRAIN &&
mode != LINE_MODE_PUSH_PULL)
return -ENOTSUPP;
spin_lock(&gc->bgpio_lock); spin_lock(&gc->bgpio_lock);
od_en = readl(priv->reg_base + MEN_Z127_ODER); od_en = readl(priv->reg_base + MEN_Z127_ODER);
if (mode == LINE_MODE_OPEN_DRAIN) if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN)
od_en |= BIT(offset); od_en |= BIT(offset);
else else
/* Implicitly LINE_MODE_PUSH_PULL */ /* Implicitly PIN_CONFIG_DRIVE_PUSH_PULL */
od_en &= ~BIT(offset); od_en &= ~BIT(offset);
writel(od_en, priv->reg_base + MEN_Z127_ODER); writel(od_en, priv->reg_base + MEN_Z127_ODER);
...@@ -113,6 +109,27 @@ static int men_z127_set_single_ended(struct gpio_chip *gc, ...@@ -113,6 +109,27 @@ static int men_z127_set_single_ended(struct gpio_chip *gc,
return 0; return 0;
} }
static int men_z127_set_config(struct gpio_chip *gc, unsigned offset,
unsigned long config)
{
enum pin_config_param param = pinconf_to_config_param(config);
switch (param) {
case PIN_CONFIG_DRIVE_OPEN_DRAIN:
case PIN_CONFIG_DRIVE_PUSH_PULL:
return men_z127_set_single_ended(gc, offset, param);
case PIN_CONFIG_INPUT_DEBOUNCE:
return men_z127_debounce(gc, offset,
pinconf_to_config_argument(config));
default:
break;
}
return -ENOTSUPP;
}
static int men_z127_probe(struct mcb_device *mdev, static int men_z127_probe(struct mcb_device *mdev,
const struct mcb_device_id *id) const struct mcb_device_id *id)
{ {
...@@ -149,8 +166,7 @@ static int men_z127_probe(struct mcb_device *mdev, ...@@ -149,8 +166,7 @@ static int men_z127_probe(struct mcb_device *mdev,
if (ret) if (ret)
goto err_unmap; goto err_unmap;
men_z127_gpio->gc.set_debounce = men_z127_debounce; men_z127_gpio->gc.set_config = men_z127_set_config;
men_z127_gpio->gc.set_single_ended = men_z127_set_single_ended;
ret = gpiochip_add_data(&men_z127_gpio->gc, men_z127_gpio); ret = gpiochip_add_data(&men_z127_gpio->gc, men_z127_gpio);
if (ret) { if (ret) {
......
...@@ -190,6 +190,18 @@ static int mrfld_gpio_set_debounce(struct gpio_chip *chip, unsigned int offset, ...@@ -190,6 +190,18 @@ static int mrfld_gpio_set_debounce(struct gpio_chip *chip, unsigned int offset,
return 0; return 0;
} }
static int mrfld_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
unsigned long config)
{
u32 debounce;
if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE)
return -ENOTSUPP;
debounce = pinconf_to_config_argument(config);
return mrfld_gpio_set_debounce(chip, offset, debounce);
}
static void mrfld_irq_ack(struct irq_data *d) static void mrfld_irq_ack(struct irq_data *d)
{ {
struct mrfld_gpio *priv = irq_data_get_irq_chip_data(d); struct mrfld_gpio *priv = irq_data_get_irq_chip_data(d);
...@@ -414,7 +426,7 @@ static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id ...@@ -414,7 +426,7 @@ static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id
priv->chip.get = mrfld_gpio_get; priv->chip.get = mrfld_gpio_get;
priv->chip.set = mrfld_gpio_set; priv->chip.set = mrfld_gpio_set;
priv->chip.get_direction = mrfld_gpio_get_direction; priv->chip.get_direction = mrfld_gpio_get_direction;
priv->chip.set_debounce = mrfld_gpio_set_debounce; priv->chip.set_config = mrfld_gpio_set_config;
priv->chip.base = gpio_base; priv->chip.base = gpio_base;
priv->chip.ngpio = MRFLD_NGPIO; priv->chip.ngpio = MRFLD_NGPIO;
priv->chip.can_sleep = false; priv->chip.can_sleep = false;
......
...@@ -974,6 +974,18 @@ static int omap_gpio_debounce(struct gpio_chip *chip, unsigned offset, ...@@ -974,6 +974,18 @@ static int omap_gpio_debounce(struct gpio_chip *chip, unsigned offset,
return 0; return 0;
} }
static int omap_gpio_set_config(struct gpio_chip *chip, unsigned offset,
unsigned long config)
{
u32 debounce;
if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE)
return -ENOTSUPP;
debounce = pinconf_to_config_argument(config);
return omap_gpio_debounce(chip, offset, debounce);
}
static void omap_gpio_set(struct gpio_chip *chip, unsigned offset, int value) static void omap_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
{ {
struct gpio_bank *bank; struct gpio_bank *bank;
...@@ -1045,7 +1057,7 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc) ...@@ -1045,7 +1057,7 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc)
bank->chip.direction_input = omap_gpio_input; bank->chip.direction_input = omap_gpio_input;
bank->chip.get = omap_gpio_get; bank->chip.get = omap_gpio_get;
bank->chip.direction_output = omap_gpio_output; bank->chip.direction_output = omap_gpio_output;
bank->chip.set_debounce = omap_gpio_debounce; bank->chip.set_config = omap_gpio_set_config;
bank->chip.set = omap_gpio_set; bank->chip.set = omap_gpio_set;
if (bank->is_mpuio) { if (bank->is_mpuio) {
bank->chip.label = "mpuio"; bank->chip.label = "mpuio";
......
...@@ -100,9 +100,8 @@ static int tc3589x_gpio_get_direction(struct gpio_chip *chip, ...@@ -100,9 +100,8 @@ static int tc3589x_gpio_get_direction(struct gpio_chip *chip,
return !(ret & BIT(pos)); return !(ret & BIT(pos));
} }
static int tc3589x_gpio_set_single_ended(struct gpio_chip *chip, static int tc3589x_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
unsigned int offset, unsigned long config)
enum single_ended_mode mode)
{ {
struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip); struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
...@@ -116,22 +115,22 @@ static int tc3589x_gpio_set_single_ended(struct gpio_chip *chip, ...@@ -116,22 +115,22 @@ static int tc3589x_gpio_set_single_ended(struct gpio_chip *chip,
unsigned int pos = offset % 8; unsigned int pos = offset % 8;
int ret; int ret;
switch(mode) { switch (pinconf_to_config_param(config)) {
case LINE_MODE_OPEN_DRAIN: case PIN_CONFIG_DRIVE_OPEN_DRAIN:
/* Set open drain mode */ /* Set open drain mode */
ret = tc3589x_set_bits(tc3589x, odmreg, BIT(pos), 0); ret = tc3589x_set_bits(tc3589x, odmreg, BIT(pos), 0);
if (ret) if (ret)
return ret; return ret;
/* Enable open drain/source mode */ /* Enable open drain/source mode */
return tc3589x_set_bits(tc3589x, odereg, BIT(pos), BIT(pos)); return tc3589x_set_bits(tc3589x, odereg, BIT(pos), BIT(pos));
case LINE_MODE_OPEN_SOURCE: case PIN_CONFIG_DRIVE_OPEN_SOURCE:
/* Set open source mode */ /* Set open source mode */
ret = tc3589x_set_bits(tc3589x, odmreg, BIT(pos), BIT(pos)); ret = tc3589x_set_bits(tc3589x, odmreg, BIT(pos), BIT(pos));
if (ret) if (ret)
return ret; return ret;
/* Enable open drain/source mode */ /* Enable open drain/source mode */
return tc3589x_set_bits(tc3589x, odereg, BIT(pos), BIT(pos)); return tc3589x_set_bits(tc3589x, odereg, BIT(pos), BIT(pos));
case LINE_MODE_PUSH_PULL: case PIN_CONFIG_DRIVE_PUSH_PULL:
/* Disable open drain/source mode */ /* Disable open drain/source mode */
return tc3589x_set_bits(tc3589x, odereg, BIT(pos), 0); return tc3589x_set_bits(tc3589x, odereg, BIT(pos), 0);
default: default:
...@@ -148,7 +147,7 @@ static const struct gpio_chip template_chip = { ...@@ -148,7 +147,7 @@ static const struct gpio_chip template_chip = {
.direction_output = tc3589x_gpio_direction_output, .direction_output = tc3589x_gpio_direction_output,
.direction_input = tc3589x_gpio_direction_input, .direction_input = tc3589x_gpio_direction_input,
.get_direction = tc3589x_gpio_get_direction, .get_direction = tc3589x_gpio_get_direction,
.set_single_ended = tc3589x_gpio_set_single_ended, .set_config = tc3589x_gpio_set_config,
.can_sleep = true, .can_sleep = true,
}; };
......
...@@ -238,6 +238,18 @@ static int tegra_gpio_set_debounce(struct gpio_chip *chip, unsigned int offset, ...@@ -238,6 +238,18 @@ static int tegra_gpio_set_debounce(struct gpio_chip *chip, unsigned int offset,
return 0; return 0;
} }
static int tegra_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
unsigned long config)
{
u32 debounce;
if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE)
return -ENOTSUPP;
debounce = pinconf_to_config_argument(config);
return tegra_gpio_set_debounce(chip, offset, debounce);
}
static int tegra_gpio_to_irq(struct gpio_chip *chip, unsigned offset) static int tegra_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
{ {
struct tegra_gpio_info *tgi = gpiochip_get_data(chip); struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
...@@ -615,7 +627,7 @@ static int tegra_gpio_probe(struct platform_device *pdev) ...@@ -615,7 +627,7 @@ static int tegra_gpio_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, tgi); platform_set_drvdata(pdev, tgi);
if (config->debounce_supported) if (config->debounce_supported)
tgi->gc.set_debounce = tegra_gpio_set_debounce; tgi->gc.set_config = tegra_gpio_set_config;
tgi->bank_info = devm_kzalloc(&pdev->dev, tgi->bank_count * tgi->bank_info = devm_kzalloc(&pdev->dev, tgi->bank_count *
sizeof(*tgi->bank_info), GFP_KERNEL); sizeof(*tgi->bank_info), GFP_KERNEL);
......
...@@ -139,28 +139,28 @@ static int tps65218_gpio_request(struct gpio_chip *gc, unsigned offset) ...@@ -139,28 +139,28 @@ static int tps65218_gpio_request(struct gpio_chip *gc, unsigned offset)
return 0; return 0;
} }