From 013080dbd272a9c7b47346c673431f49dc61a525 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Date: Sat, 8 Jan 2022 20:56:37 -0500 Subject: [PATCH] WIP: drm/panfrost: L2 MMU quirks for Valhall Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> --- drivers/gpu/drm/panfrost/panfrost_gpu.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c index c138020dd66b6..955c55b7a7934 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gpu.c +++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c @@ -132,13 +132,19 @@ static void panfrost_gpu_init_quirks(struct panfrost_device *pfdev) quirks = gpu_read(pfdev, GPU_L2_MMU_CONFIG); /* Limit read & write ID width for AXI */ - if (panfrost_has_hw_feature(pfdev, HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG)) + if (0 /* LBEX, TBEX */) + quirks &= ~(GENMASK(10, 5) | GENMASK(16, 12)); + else if (1 /* TTRX, TNAX -- see mali_kbase_l2_mmu_config.c */) + quirks &= ~(GENMASK(12, 7) | GENMASK(17, 13)); + else if (panfrost_has_hw_feature(pfdev, HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG)) quirks &= ~(L2_MMU_CONFIG_3BIT_LIMIT_EXTERNAL_READS | L2_MMU_CONFIG_3BIT_LIMIT_EXTERNAL_WRITES); else quirks &= ~(L2_MMU_CONFIG_LIMIT_EXTERNAL_READS | L2_MMU_CONFIG_LIMIT_EXTERNAL_WRITES); + // TODO: if coherency=ACE, allow snoop disparity + // see mali_kbase_l2_mmu_config gpu_write(pfdev, GPU_L2_MMU_CONFIG, quirks); quirks = 0; -- GitLab