• Hang Yuan's avatar
    drm/i915/gvt: support inconsecutive partial gtt entry write · bc0686ff
    Hang Yuan authored
    Previously we assumed two 4-byte writes to the same PTE coming in sequence.
    But recently we observed inconsecutive partial write happening as well. So
    this patch enhances the previous solution. It now uses a list to save more
    partial writes. If one partial write can be combined with another one in
    the list to construct a full PTE, update its shadow entry. Otherwise, save
    the partial write in the list.
    v2: invalidate old entry and flush ggtt (Zhenyu)
    v3: split old ggtt page unmap to another patch (Zhenyu)
    v4: refine codes (Zhenyu)
    Signed-off-by: default avatarHang Yuan <hang.yuan@linux.intel.com>
    Cc: Yan Zhao <yan.y.zhao@intel.com>
    Cc: Xiaolin Zhang <xiaolin.zhang@intel.com>
    Cc: Zhenyu Wang <zhenyu.z.wang@intel.com>
    Reviewed-by: default avatarXiaolin Zhang <xiaolin.zhang@intel.com>
    Signed-off-by: Zhenyu Wang's avatarZhenyu Wang <zhenyuw@linux.intel.com>
gtt.c 72 KB