• Russell King - ARM Linux's avatar
    Dove: Attempt to fix PMU/RTC interrupts · 5d3df935
    Russell King - ARM Linux authored
    Fix the acknowledgement of PMU interrupts on Dove: some Dove hardware
    has not been sensibly designed so that interrupts can be handled in a
    race free manner.  The PMU is one such instance.
    The pending (aka 'cause') register is a bunch of RW bits, meaning that
    these bits can be both cleared and set by software (confirmed on the
    Armada-510 on the cubox.)
    Hardware sets the appropriate bit when an interrupt is asserted, and
    software is required to clear the bits which are to be processed.  If
    we write ~(1 << bit), then we end up asserting every other interrupt
    except the one we're processing.  So, we need to do a read-modify-write
    cycle to clear the asserted bit.
    However, any interrupts which occur in the middle of this cycle will
    also be written back as zero, which will also clear the new interrupts.
    The upshot of this is: there is _no_ way to safely clear down interrupts
    in this register (and other similarly behaving interrupt pending
    registers on this device.)  The patch below at least stops us creating
    new interrupts.
    Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
    Cc: stable@vger.kernel.org
    Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
irq.c 3.01 KB