• shaoyunl's avatar
    drm/amdgpu: Add delay after enable RLC ucode · ad97d9de
    shaoyunl authored
    Driver shouldn't try to access any GFX registers until RLC is idle.
    During the test, it took 12 seconds for RLC to clear the BUSY bit
    in RLC_GPM_STAT register which is un-acceptable for driver.
    As per RLC engineer, it would take RLC Ucode less than 10,000 GFXCLK
    cycles to finish its critical section. In a lowest 300M enginer clock
    setting(default from vbios), 50 us delay is enough.
    This commit fix the hang when RLC introduce the work around for XGMI
    which requires more cycles to setup more registers than normal
    Signed-off-by: default avatarshaoyunl <shaoyun.liu@amd.com>
    Acked-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
    Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
gfx_v9_0.c 158 KB