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    perf/x86-ibs: Precise event sampling with IBS for AMD CPUs · 450bbd49
    Robert Richter authored and Ingo Molnar's avatar Ingo Molnar committed
    
    
    This patch adds support for precise event sampling with IBS. There are
    two counting modes to count either cycles or micro-ops. If the
    corresponding performance counter events (hw events) are setup with
    the precise flag set, the request is redirected to the ibs pmu:
    
     perf record -a -e cpu-cycles:p ...    # use ibs op counting cycle count
     perf record -a -e r076:p ...          # same as -e cpu-cycles:p
     perf record -a -e r0C1:p ...          # use ibs op counting micro-ops
    
    Each ibs sample contains a linear address that points to the
    instruction that was causing the sample to trigger. With ibs we have
    skid 0. Thus, ibs supports precise levels 1 and 2. Samples are marked
    with the PERF_EFLAGS_EXACT flag set. In rare cases the rip is invalid
    when IBS was not able to record the rip correctly. Then the
    PERF_EFLAGS_EXACT flag is cleared and the rip is taken from pt_regs.
    
    V2:
    * don't drop samples in precise level 2 if rip is invalid, instead
      support the PERF_EFLAGS_EXACT flag
    
    Signed-off-by: default avatarRobert Richter <robert.richter@amd.com>
    Signed-off-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
    Link: http://lkml.kernel.org/r/20120502103309.GP18810@erda.amd.com
    
    
    Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
    450bbd49