mpparse.c 25.4 KB
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/*
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 *	Intel Multiprocessor Specification 1.1 and 1.4
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 *	compliant MP-table parsing routines.
 *
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 *	(c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
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 *	(c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
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 *      (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
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 */

#include <linux/mm.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/bootmem.h>
#include <linux/kernel_stat.h>
#include <linux/mc146818rtc.h>
#include <linux/bitops.h>
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#include <linux/acpi.h>
#include <linux/module.h>
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#include <linux/smp.h>
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#include <linux/pci.h>
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#include <asm/mtrr.h>
#include <asm/mpspec.h>
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#include <asm/pgalloc.h>
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#include <asm/io_apic.h>
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#include <asm/proto.h>
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#include <asm/bios_ebda.h>
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#include <asm/e820.h>
#include <asm/trampoline.h>
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#include <asm/setup.h>
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#include <asm/smp.h>
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#include <asm/apic.h>
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/*
 * Checksum an MP configuration block.
 */

static int __init mpf_checksum(unsigned char *mp, int len)
{
	int sum = 0;

	while (len--)
		sum += *mp++;

	return sum & 0xFF;
}

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static void __init MP_processor_info(struct mpc_cpu *m)
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{
	int apicid;
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	char *bootup_cpu = "";
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	if (!(m->cpuflag & CPU_ENABLED)) {
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		disabled_cpus++;
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		return;
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	}
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	if (x86_quirks->mpc_apic_id)
		apicid = x86_quirks->mpc_apic_id(m);
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	else
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		apicid = m->apicid;
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	if (m->cpuflag & CPU_BOOTPROCESSOR) {
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		bootup_cpu = " (Bootup-CPU)";
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		boot_cpu_physical_apicid = m->apicid;
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	}

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	printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu);
	generic_processor_info(apicid, m->apicver);
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}

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#ifdef CONFIG_X86_IO_APIC
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static void __init MP_bus_info(struct mpc_bus *m)
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{
	char str[7];
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	memcpy(str, m->bustype, 6);
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	str[6] = 0;

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	if (x86_quirks->mpc_oem_bus_info)
		x86_quirks->mpc_oem_bus_info(m, str);
	else
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		apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
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#if MAX_MP_BUSSES < 256
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	if (m->busid >= MAX_MP_BUSSES) {
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		printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
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		       " is too large, max. supported is %d\n",
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		       m->busid, str, MAX_MP_BUSSES - 1);
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		return;
	}
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#endif
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	if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
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		set_bit(m->busid, mp_bus_not_pci);
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#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
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		mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
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#endif
	} else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
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		if (x86_quirks->mpc_oem_pci_bus)
			x86_quirks->mpc_oem_pci_bus(m);

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		clear_bit(m->busid, mp_bus_not_pci);
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#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
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		mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
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	} else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
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		mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
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	} else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
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		mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
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#endif
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	} else
		printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
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}
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static int bad_ioapic(unsigned long address)
{
	if (nr_ioapics >= MAX_IO_APICS) {
		printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
		       "(found %d)\n", MAX_IO_APICS, nr_ioapics);
		panic("Recompile kernel with bigger MAX_IO_APICS!\n");
	}
	if (!address) {
		printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
		       " found in table, skipping!\n");
		return 1;
	}
	return 0;
}

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static void __init MP_ioapic_info(struct mpc_ioapic *m)
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{
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	if (!(m->flags & MPC_APIC_USABLE))
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		return;

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	printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
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	       m->apicid, m->apicver, m->apicaddr);
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	if (bad_ioapic(m->apicaddr))
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		return;
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	mp_ioapics[nr_ioapics].apicaddr = m->apicaddr;
	mp_ioapics[nr_ioapics].apicid = m->apicid;
	mp_ioapics[nr_ioapics].type = m->type;
	mp_ioapics[nr_ioapics].apicver = m->apicver;
	mp_ioapics[nr_ioapics].flags = m->flags;
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	nr_ioapics++;
}

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static void print_MP_intsrc_info(struct mpc_intsrc *m)
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{
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	apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
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		" IRQ %02x, APIC ID %x, APIC INT %02x\n",
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		m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
		m->srcbusirq, m->dstapic, m->dstirq);
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}

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static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
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{
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	apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
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		" IRQ %02x, APIC ID %x, APIC INT %02x\n",
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		mp_irq->irqtype, mp_irq->irqflag & 3,
		(mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
		mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
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}

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static void __init assign_to_mp_irq(struct mpc_intsrc *m,
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				    struct mpc_intsrc *mp_irq)
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{
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	mp_irq->dstapic = m->dstapic;
	mp_irq->type = m->type;
	mp_irq->irqtype = m->irqtype;
	mp_irq->irqflag = m->irqflag;
	mp_irq->srcbus = m->srcbus;
	mp_irq->srcbusirq = m->srcbusirq;
	mp_irq->dstirq = m->dstirq;
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}

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static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq,
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					struct mpc_intsrc *m)
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{
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	m->dstapic = mp_irq->dstapic;
	m->type = mp_irq->type;
	m->irqtype = mp_irq->irqtype;
	m->irqflag = mp_irq->irqflag;
	m->srcbus = mp_irq->srcbus;
	m->srcbusirq = mp_irq->srcbusirq;
	m->dstirq = mp_irq->dstirq;
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}

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static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq,
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					struct mpc_intsrc *m)
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{
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	if (mp_irq->dstapic != m->dstapic)
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		return 1;
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	if (mp_irq->type != m->type)
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		return 2;
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	if (mp_irq->irqtype != m->irqtype)
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		return 3;
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	if (mp_irq->irqflag != m->irqflag)
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		return 4;
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	if (mp_irq->srcbus != m->srcbus)
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		return 5;
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	if (mp_irq->srcbusirq != m->srcbusirq)
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		return 6;
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	if (mp_irq->dstirq != m->dstirq)
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		return 7;

	return 0;
}

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static void __init MP_intsrc_info(struct mpc_intsrc *m)
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{
	int i;

	print_MP_intsrc_info(m);

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	for (i = 0; i < mp_irq_entries; i++) {
		if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
			return;
	}
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	assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
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	if (++mp_irq_entries == MAX_IRQ_SOURCES)
		panic("Max # of irq sources exceeded!!\n");
}
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#else /* CONFIG_X86_IO_APIC */
static inline void __init MP_bus_info(struct mpc_bus *m) {}
static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {}
static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {}
#endif /* CONFIG_X86_IO_APIC */
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static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
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{
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	apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
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		" IRQ %02x, APIC ID %x, APIC LINT %02x\n",
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		m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
		m->srcbusirq, m->destapic, m->destapiclint);
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}

/*
 * Read/parse the MPC
 */

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static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
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{

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	if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
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		printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
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		       mpc->signature[0], mpc->signature[1],
		       mpc->signature[2], mpc->signature[3]);
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		return 0;
	}
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	if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
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		printk(KERN_ERR "MPTABLE: checksum error!\n");
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		return 0;
	}
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	if (mpc->spec != 0x01 && mpc->spec != 0x04) {
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		printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
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		       mpc->spec);
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		return 0;
	}
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	if (!mpc->lapic) {
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		printk(KERN_ERR "MPTABLE: null local APIC address!\n");
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		return 0;
	}
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	memcpy(oem, mpc->oem, 8);
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	oem[8] = 0;
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	printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
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	memcpy(str, mpc->productid, 12);
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	str[12] = 0;
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	printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
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	printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
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	return 1;
}

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static void skip_entry(unsigned char **ptr, int *count, int size)
{
	*ptr += size;
	*count += size;
}

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static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
{
	printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"
		"type %x\n", *mpt);
	print_hex_dump(KERN_ERR, "  ", DUMP_PREFIX_ADDRESS, 16,
			1, mpc, mpc->length, 1);
}

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static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
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{
	char str[16];
	char oem[10];

	int count = sizeof(*mpc);
	unsigned char *mpt = ((unsigned char *)mpc) + count;

	if (!smp_check_mpc(mpc, oem, str))
		return 0;

#ifdef CONFIG_X86_32
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	generic_mps_oem_check(mpc, oem, str);
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#endif
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	/* save the local APIC address, it might be non-default */
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	if (!acpi_lapic)
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		mp_lapic_addr = mpc->lapic;
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	if (early)
		return 1;

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	if (mpc->oemptr && x86_quirks->smp_read_mpc_oem) {
		struct mpc_oemtable *oem_table = (void *)(long)mpc->oemptr;
		x86_quirks->smp_read_mpc_oem(oem_table, mpc->oemsize);
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	}

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	/*
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	 *      Now process the configuration blocks.
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	 */
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	if (x86_quirks->mpc_record)
		*x86_quirks->mpc_record = 0;

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	while (count < mpc->length) {
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		switch (*mpt) {
		case MP_PROCESSOR:
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			/* ACPI may have already provided this data */
			if (!acpi_lapic)
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				MP_processor_info((struct mpc_cpu *)mpt);
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			skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
			break;
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		case MP_BUS:
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			MP_bus_info((struct mpc_bus *)mpt);
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			skip_entry(&mpt, &count, sizeof(struct mpc_bus));
			break;
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		case MP_IOAPIC:
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			MP_ioapic_info((struct mpc_ioapic *)mpt);
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			skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
			break;
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		case MP_INTSRC:
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			MP_intsrc_info((struct mpc_intsrc *)mpt);
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			skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
			break;
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		case MP_LINTSRC:
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			MP_lintsrc_info((struct mpc_lintsrc *)mpt);
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			skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
			break;
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		default:
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			/* wrong mptable */
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			smp_dump_mptable(mpc, mpt);
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			count = mpc->length;
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			break;
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		}
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		if (x86_quirks->mpc_record)
			(*x86_quirks->mpc_record)++;
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	}
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#ifdef CONFIG_X86_BIGSMP
	generic_bigsmp_probe();
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#endif

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	if (apic->setup_apic_routing)
		apic->setup_apic_routing();

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	if (!num_processors)
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		printk(KERN_ERR "MPTABLE: no processors registered!\n");
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	return num_processors;
}

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#ifdef CONFIG_X86_IO_APIC

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static int __init ELCR_trigger(unsigned int irq)
{
	unsigned int port;

	port = 0x4d0 + (irq >> 3);
	return (inb(port) >> (irq & 7)) & 1;
}

static void __init construct_default_ioirq_mptable(int mpc_default_type)
{
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	struct mpc_intsrc intsrc;
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	int i;
	int ELCR_fallback = 0;

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	intsrc.type = MP_INTSRC;
	intsrc.irqflag = 0;	/* conforming */
	intsrc.srcbus = 0;
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	intsrc.dstapic = mp_ioapics[0].apicid;
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	intsrc.irqtype = mp_INT;
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	/*
	 *  If true, we have an ISA/PCI system with no IRQ entries
	 *  in the MP table. To prevent the PCI interrupts from being set up
	 *  incorrectly, we try to use the ELCR. The sanity check to see if
	 *  there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
	 *  never be level sensitive, so we simply see if the ELCR agrees.
	 *  If it does, we assume it's valid.
	 */
	if (mpc_default_type == 5) {
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		printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
		       "falling back to ELCR\n");
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		if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
		    ELCR_trigger(13))
			printk(KERN_ERR "ELCR contains invalid data... "
			       "not using ELCR\n");
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		else {
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			printk(KERN_INFO
			       "Using ELCR to identify PCI interrupts\n");
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			ELCR_fallback = 1;
		}
	}

	for (i = 0; i < 16; i++) {
		switch (mpc_default_type) {
		case 2:
			if (i == 0 || i == 13)
				continue;	/* IRQ0 & IRQ13 not connected */
			/* fall through */
		default:
			if (i == 2)
				continue;	/* IRQ2 is never connected */
		}

		if (ELCR_fallback) {
			/*
			 *  If the ELCR indicates a level-sensitive interrupt, we
			 *  copy that information over to the MP table in the
			 *  irqflag field (level sensitive, active high polarity).
			 */
			if (ELCR_trigger(i))
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				intsrc.irqflag = 13;
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			else
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				intsrc.irqflag = 0;
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		}

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		intsrc.srcbusirq = i;
		intsrc.dstirq = i ? i : 2;	/* IRQ0 to INTIN2 */
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		MP_intsrc_info(&intsrc);
	}

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	intsrc.irqtype = mp_ExtINT;
	intsrc.srcbusirq = 0;
	intsrc.dstirq = 0;	/* 8259A to INTIN0 */
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	MP_intsrc_info(&intsrc);
}

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static void __init construct_ioapic_table(int mpc_default_type)
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{
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	struct mpc_ioapic ioapic;
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	struct mpc_bus bus;
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	bus.type = MP_BUS;
	bus.busid = 0;
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	switch (mpc_default_type) {
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	default:
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		printk(KERN_ERR "???\nUnknown standard configuration %d\n",
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		       mpc_default_type);
		/* fall through */
	case 1:
	case 5:
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		memcpy(bus.bustype, "ISA   ", 6);
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		break;
	case 2:
	case 6:
	case 3:
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		memcpy(bus.bustype, "EISA  ", 6);
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		break;
	case 4:
	case 7:
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		memcpy(bus.bustype, "MCA   ", 6);
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	}
	MP_bus_info(&bus);
	if (mpc_default_type > 4) {
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		bus.busid = 1;
		memcpy(bus.bustype, "PCI   ", 6);
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		MP_bus_info(&bus);
	}

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	ioapic.type = MP_IOAPIC;
	ioapic.apicid = 2;
	ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
	ioapic.flags = MPC_APIC_USABLE;
	ioapic.apicaddr = 0xFEC00000;
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	MP_ioapic_info(&ioapic);

	/*
	 * We set up most of the low 16 IO-APIC pins according to MPS rules.
	 */
	construct_default_ioirq_mptable(mpc_default_type);
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}
#else
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static inline void __init construct_ioapic_table(int mpc_default_type) { }
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#endif
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static inline void __init construct_default_ISA_mptable(int mpc_default_type)
{
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	struct mpc_cpu processor;
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	struct mpc_lintsrc lintsrc;
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	int linttypes[2] = { mp_ExtINT, mp_NMI };
	int i;

	/*
	 * local APIC has default address
	 */
	mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;

	/*
	 * 2 CPUs, numbered 0 & 1.
	 */
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	processor.type = MP_PROCESSOR;
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	/* Either an integrated APIC or a discrete 82489DX. */
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	processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
	processor.cpuflag = CPU_ENABLED;
	processor.cpufeature = (boot_cpu_data.x86 << 8) |
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	    (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
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	processor.featureflag = boot_cpu_data.x86_capability[0];
	processor.reserved[0] = 0;
	processor.reserved[1] = 0;
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	for (i = 0; i < 2; i++) {
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		processor.apicid = i;
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		MP_processor_info(&processor);
	}

	construct_ioapic_table(mpc_default_type);

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	lintsrc.type = MP_LINTSRC;
	lintsrc.irqflag = 0;		/* conforming */
	lintsrc.srcbusid = 0;
	lintsrc.srcbusirq = 0;
	lintsrc.destapic = MP_APIC_ALL;
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	for (i = 0; i < 2; i++) {
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		lintsrc.irqtype = linttypes[i];
		lintsrc.destapiclint = i;
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		MP_lintsrc_info(&lintsrc);
	}
}

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static struct mpf_intel *mpf_found;
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static unsigned long __init get_mpc_size(unsigned long physptr)
{
	struct mpc_table *mpc;
	unsigned long size;

	mpc = early_ioremap(physptr, PAGE_SIZE);
	size = mpc->length;
	early_iounmap(mpc, PAGE_SIZE);
	apic_printk(APIC_VERBOSE, "  mpc: %lx-%lx\n", physptr, physptr + size);

	return size;
}

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static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
{
	struct mpc_table *mpc;
	unsigned long size;

	size = get_mpc_size(mpf->physptr);
	mpc = early_ioremap(mpf->physptr, size);
	/*
	 * Read the physical hardware table.  Anything here will
	 * override the defaults.
	 */
	if (!smp_read_mpc(mpc, early)) {
#ifdef CONFIG_X86_LOCAL_APIC
		smp_found_config = 0;
#endif
		printk(KERN_ERR "BIOS bug, MP table errors detected!...\n"
			"... disabling SMP support. (tell your hw vendor)\n");
		early_iounmap(mpc, size);
		return -1;
	}
	early_iounmap(mpc, size);

	if (early)
		return -1;

#ifdef CONFIG_X86_IO_APIC
	/*
	 * If there are no explicit MP IRQ entries, then we are
	 * broken.  We set up most of the low 16 IO-APIC pins to
	 * ISA defaults and hope it will work.
	 */
	if (!mp_irq_entries) {
		struct mpc_bus bus;

		printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
		       "using default mptable. (tell your hw vendor)\n");

		bus.type = MP_BUS;
		bus.busid = 0;
		memcpy(bus.bustype, "ISA   ", 6);
		MP_bus_info(&bus);

		construct_default_ioirq_mptable(0);
	}
#endif

	return 0;
}

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/*
 * Scan the memory blocks for an SMP configuration block.
 */
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static void __init __get_smp_config(unsigned int early)
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{
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	struct mpf_intel *mpf = mpf_found;
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	if (!mpf)
		return;

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	if (acpi_lapic && early)
		return;
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	/*
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	 * MPS doesn't support hyperthreading, aka only have
	 * thread 0 apic id in MPS table
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	 */
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	if (acpi_lapic && acpi_ioapic)
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		return;

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	if (x86_quirks->mach_get_smp_config) {
		if (x86_quirks->mach_get_smp_config(early))
			return;
	}
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	printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
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	       mpf->specification);
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#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
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	if (mpf->feature2 & (1 << 7)) {
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		printk(KERN_INFO "    IMCR and PIC compatibility mode.\n");
		pic_mode = 1;
	} else {
		printk(KERN_INFO "    Virtual Wire compatibility mode.\n");
		pic_mode = 0;
	}
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#endif
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	/*
	 * Now see if we need to read further.
	 */
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	if (mpf->feature1 != 0) {
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		if (early) {
			/*
			 * local APIC has default address
			 */
			mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
			return;
		}
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		printk(KERN_INFO "Default MP configuration #%d\n",
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		       mpf->feature1);
		construct_default_ISA_mptable(mpf->feature1);
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	} else if (mpf->physptr) {
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		if (check_physptr(mpf, early))
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			return;
	} else
		BUG();

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	if (!early)
		printk(KERN_INFO "Processors: %d\n", num_processors);
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	/*
	 * Only use the first configuration found.
	 */
}

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void __init early_get_smp_config(void)
{
	__get_smp_config(1);
}

void __init get_smp_config(void)
{
	__get_smp_config(0);
}

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static void __init smp_reserve_bootmem(struct mpf_intel *mpf)
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{
	unsigned long size = get_mpc_size(mpf->physptr);
#ifdef CONFIG_X86_32
	/*
	 * We cannot access to MPC table to compute table size yet,
	 * as only few megabytes from the bottom is mapped now.
	 * PC-9800's MPC table places on the very last of physical
	 * memory; so that simply reserving PAGE_SIZE from mpf->physptr
	 * yields BUG() in reserve_bootmem.
	 * also need to make sure physptr is below than max_low_pfn
	 * we don't need reserve the area above max_low_pfn
	 */
	unsigned long end = max_low_pfn * PAGE_SIZE;

	if (mpf->physptr < end) {
		if (mpf->physptr + size > end)
			size = end - mpf->physptr;
		reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT);
	}
#else
	reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT);
#endif
}

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static int __init smp_scan_config(unsigned long base, unsigned long length,
				  unsigned reserve)
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{
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	unsigned int *bp = phys_to_virt(base);
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	struct mpf_intel *mpf;
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	apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
			bp, length);
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	BUILD_BUG_ON(sizeof(*mpf) != 16);
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	while (length > 0) {
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		mpf = (struct mpf_intel *)bp;
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		if ((*bp == SMP_MAGIC_IDENT) &&
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		    (mpf->length == 1) &&
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		    !mpf_checksum((unsigned char *)bp, 16) &&
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		    ((mpf->specification == 1)
		     || (mpf->specification == 4))) {
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#ifdef CONFIG_X86_LOCAL_APIC
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			smp_found_config = 1;
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#endif
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			mpf_found = mpf;
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			printk(KERN_INFO "found SMP MP-table at [%p] %llx\n",
			       mpf, (u64)virt_to_phys(mpf));
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			if (!reserve)
				return 1;
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			reserve_bootmem_generic(virt_to_phys(mpf), sizeof(*mpf),
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						BOOTMEM_DEFAULT);
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			if (mpf->physptr)
				smp_reserve_bootmem(mpf);
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			return 1;
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		}
		bp += 4;
		length -= 16;
	}
	return 0;
}

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static void __init __find_smp_config(unsigned int reserve)
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{
	unsigned int address;

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	if (x86_quirks->mach_find_smp_config) {
		if (x86_quirks->mach_find_smp_config(reserve))
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			return;
	}
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	/*
	 * FIXME: Linux assumes you have 640K of base ram..
	 * this continues the error...
	 *
	 * 1) Scan the bottom 1K for a signature
	 * 2) Scan the top 1K of base RAM
	 * 3) Scan the 64K of bios
	 */
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	if (smp_scan_config(0x0, 0x400, reserve) ||
	    smp_scan_config(639 * 0x400, 0x400, reserve) ||
	    smp_scan_config(0xF0000, 0x10000, reserve))
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		return;
	/*
	 * If it is an SMP machine we should know now, unless the
	 * configuration is in an EISA/MCA bus machine with an
	 * extended bios data area.
	 *
	 * there is a real-mode segmented pointer pointing to the
	 * 4K EBDA area at 0x40E, calculate and scan it here.
	 *
	 * NOTE! There are Linux loaders that will corrupt the EBDA
	 * area, and as such this kind of SMP config may be less
	 * trustworthy, simply because the SMP table may have been
	 * stomped on during early boot. These loaders are buggy and
	 * should be fixed.
	 *
	 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
	 */

	address = get_bios_ebda();
	if (address)
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		smp_scan_config(address, 0x400, reserve);
}

void __init early_find_smp_config(void)
{
	__find_smp_config(0);
}

void __init find_smp_config(void)
{
	__find_smp_config(1);
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}
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#ifdef CONFIG_X86_IO_APIC
static u8 __initdata irq_used[MAX_IRQ_SOURCES];

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static int  __init get_MP_intsrc_index(struct mpc_intsrc *m)
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{
	int i;

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	if (m->irqtype != mp_INT)
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		return 0;

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	if (m->irqflag != 0x0f)
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		return 0;

	/* not legacy */

	for (i = 0; i < mp_irq_entries; i++) {
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		if (mp_irqs[i].irqtype != mp_INT)
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			continue;

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		if (mp_irqs[i].irqflag != 0x0f)
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			continue;

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		if (mp_irqs[i].srcbus != m->srcbus)
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			continue;
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		if (mp_irqs[i].srcbusirq != m->srcbusirq)
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			continue;
		if (irq_used[i]) {
			/* already claimed */
			return -2;
		}
		irq_used[i] = 1;
		return i;
	}

	/* not found */
	return -1;
}

#define SPARE_SLOT_NUM 20

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static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
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static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
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{
	int i;

	apic_printk(APIC_VERBOSE, "OLD ");
	print_MP_intsrc_info(m);

	i = get_MP_intsrc_index(m);
	if (i > 0) {
		assign_to_mpc_intsrc(&mp_irqs[i], m);
		apic_printk(APIC_VERBOSE, "NEW ");
		print_mp_irq_info(&mp_irqs[i]);
		return;
	}
	if (!i) {
		/* legacy, do nothing */
		return;
	}
	if (*nr_m_spare < SPARE_SLOT_NUM) {
		/*
		 * not found (-1), or duplicated (-2) are invalid entries,
		 * we need to use the slot later
		 */
		m_spare[*nr_m_spare] = m;
		*nr_m_spare += 1;
	}
}
#else /* CONFIG_X86_IO_APIC */
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static
inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
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#endif /* CONFIG_X86_IO_APIC */

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static int
check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count)
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{
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	int ret = 0;

	if (!mpc_new_phys || count <= mpc_new_length) {
		WARN(1, "update_mptable: No spare slots (length: %x)\n", count);
		return -1;
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	}

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	return ret;
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}
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static int  __init replace_intsrc_all(struct mpc_table *mpc,
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					unsigned long mpc_new_phys,
					unsigned long mpc_new_length)
{
#ifdef CONFIG_X86_IO_APIC
	int i;
#endif
	int count = sizeof(*mpc);
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	int nr_m_spare = 0;
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	unsigned char *mpt = ((unsigned char *)mpc) + count;

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	printk(KERN_INFO "mpc_length %x\n", mpc->length);
	while (count < mpc->length) {
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		switch (*mpt) {
		case MP_PROCESSOR:
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			skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
			break;
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		case MP_BUS:
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			skip_entry(&mpt, &count, sizeof(struct mpc_bus));
			break;
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		case MP_IOAPIC:
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			skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
			break;
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		case MP_INTSRC:
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			check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare);
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			skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
			break;
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		case MP_LINTSRC:
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			skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
			break;
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		default:
			/* wrong mptable */
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			smp_dump_mptable(mpc, mpt);
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			goto out;
		}
	}

#ifdef CONFIG_X86_IO_APIC
	for (i = 0; i < mp_irq_entries; i++) {
		if (irq_used[i])
			continue;