nsimosci.dts 1.85 KB
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/*
 * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

/include/ "skeleton.dtsi"

/ {
	compatible = "snps,nsimosci";
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	clock-frequency = <20000000>;	/* 20 MHZ */
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	#address-cells = <1>;
	#size-cells = <1>;
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	interrupt-parent = <&core_intc>;
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	chosen {
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		/* this is for console on PGU */
		/* bootargs = "console=tty0 consoleblank=0"; */
		/* this is for console on serial */
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		bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug video=640x480-24";
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	};

	aliases {
		serial0 = &uart0;
	};

	fpga {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;

		/* child and parent address space 1:1 mapped */
		ranges;

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		core_clk: core_clk {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <20000000>;
		};

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		core_intc: interrupt-controller {
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			compatible = "snps,arc700-intc";
			interrupt-controller;
			#interrupt-cells = <1>;
		};

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		uart0: serial@f0000000 {
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			compatible = "ns8250";
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			reg = <0xf0000000 0x2000>;
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			interrupts = <11>;
			clock-frequency = <3686400>;
			baud = <115200>;
			reg-shift = <2>;
			reg-io-width = <4>;
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			no-loopback-test = <1>;
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		};

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		pguclk: pguclk {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <25175000>;
		};

		pgu@f9000000 {
			compatible = "snps,arcpgu";
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			reg = <0xf9000000 0x400>;
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			clocks = <&pguclk>;
			clock-names = "pxlclk";
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		};

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		ps2: ps2@f9001000 {
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			compatible = "snps,arc_ps2";
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			reg = <0xf9000400 0x14>;
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			interrupts = <13>;
			interrupt-names = "arc_ps2_irq";
		};

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		eth0: ethernet@f0003000 {
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			compatible = "ezchip,nps-mgt-enet";
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			reg = <0xf0003000 0x44>;
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			interrupts = <7>;
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		};
	};
};