Having more than two stages makes SSO interface matching a lot more
interesting.  However, the five-stage variant won't run on i965 for
a while.  So, this patch adds a three-stage variant (VS/GS/FS, but
no tessellation).

Beyond that, this test is a little meaner: I made the VS have more
outputs than the GS has inputs, with the locations specified to have a
gap.  An implementation that lays out VS outputs and GS inputs
contiguously would fail; they have to match up properly.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>