Running Steam on manjarolinux 18.1.5 64-bit STEAM_RUNTIME is enabled automatically Pins up-to-date! /home/daniel/.local/share/Steam/ubuntu12_32/steam Installing breakpad exception handler for appid(steam)/version(1576550254) Installing breakpad exception handler for appid(steam)/version(1576550254) /usr/share/themes/Breath-Dark/gtk-2.0/widgets/entry:70: error: unexpected identifier 'direction', expected character '}' (steam:19981): Gtk-WARNING **: 13:27:13.569: Unable to locate theme engine in module_path: "adwaita", /usr/share/themes/Breath-Dark/gtk-2.0/widgets/styles:36: error: invalid string constant "combobox_entry", expected valid string constant /usr/share/themes/Breath-Dark/gtk-2.0/widgets/entry:70: error: unexpected identifier 'direction', expected character '}' (steam:19981): Gtk-WARNING **: 13:27:13.576: Unable to locate theme engine in module_path: "adwaita", /usr/share/themes/Breath-Dark/gtk-2.0/widgets/styles:36: error: invalid string constant "combobox_entry", expected valid string constant Installing breakpad exception handler for appid(steam)/version(1576550254) STEAM_RUNTIME_HEAVY: ./steam-runtime-heavy [0118/132713.791327:INFO:crash_reporting.cc(247)] Crash reporting enabled for process: browser [0118/132713.812271:WARNING:crash_reporting.cc(286)] Failed to set crash key: UserID with value: 0 [0118/132713.812313:WARNING:crash_reporting.cc(286)] Failed to set crash key: BuildID with value: 1576515270 [0118/132713.812317:WARNING:crash_reporting.cc(286)] Failed to set crash key: SteamUniverse with value: Public [0118/132713.812320:WARNING:crash_reporting.cc(286)] Failed to set crash key: Vendor with value: Valve [0118/132713.840214:WARNING:crash_reporting.cc(286)] Failed to set crash key: UserID with value: 0 [0118/132713.840256:WARNING:crash_reporting.cc(286)] Failed to set crash key: BuildID with value: 1576515270 [0118/132713.840261:WARNING:crash_reporting.cc(286)] Failed to set crash key: SteamUniverse with value: Public [0118/132713.840265:WARNING:crash_reporting.cc(286)] Failed to set crash key: Vendor with value: Valve [0118/132713.840697:INFO:crash_reporting.cc(247)] Crash reporting enabled for process: gpu-process [0118/132713.916842:ERROR:sandbox_linux.cc(369)] InitializeSandbox() called with multiple threads in process gpu-process. [0118/132713.937546:WARNING:crash_reporting.cc(286)] Failed to set crash key: UserID with value: 0 [0118/132713.937589:WARNING:crash_reporting.cc(286)] Failed to set crash key: BuildID with value: 1576515270 [0118/132713.937593:WARNING:crash_reporting.cc(286)] Failed to set crash key: SteamUniverse with value: Public [0118/132713.937596:WARNING:crash_reporting.cc(286)] Failed to set crash key: Vendor with value: Valve [0118/132713.938061:INFO:crash_reporting.cc(247)] Crash reporting enabled for process: utility Installing breakpad exception handler for appid(steam)/version(1576550254) Installing breakpad exception handler for appid(steam)/version(1576550254) Installing breakpad exception handler for appid(steam)/version(1576550254) Installing breakpad exception handler for appid(steam)/version(1576550254) Installing breakpad exception handler for appid(steam)/version(1576550254) Installing breakpad exception handler for appid(steam)/version(1576550254) Installing breakpad exception handler for appid(steam)/version(1576550254) Installing breakpad exception handler for appid(steam)/version(1576550254) Installing breakpad exception handler for appid(steam)/version(1576550254) Installing breakpad exception handler for appid(steam)/version(1576550254) Installing breakpad exception handler for appid(steam)/version(1576550254) Installing breakpad exception handler for appid(steam)/version(1576550254) CAppInfoCacheReadFromDiskThread took 171 milliseconds to initialize CApplicationManagerPopulateThread took 290 milliseconds to initialize (will have waited on CAppInfoCacheReadFromDiskThread) Installing breakpad exception handler for appid(steam)/version(1576550254) Installing breakpad exception handler for appid(steam)/version(1576550254) Installing breakpad exception handler for appid(steam)/version(1576550254) ** (steam:19981): WARNING **: 13:27:14.376: Unknown device type 16 ** (steam:19981): WARNING **: 13:27:14.376: Could not create object for /org/freedesktop/NetworkManager/Devices/5: unknown object type ** (steam:19981): WARNING **: 13:27:14.376: handle_property_changed: failed to update property 'devices' of object type NMActiveConnection. ** (steam:19981): WARNING **: 13:27:14.385: Unknown device type 16 ** (steam:19981): WARNING **: 13:27:14.385: Could not create object for /org/freedesktop/NetworkManager/Devices/3: unknown object type ** (steam:19981): WARNING **: 13:27:14.385: handle_property_changed: failed to update property 'devices' of object type NMActiveConnection. ** (steam:19981): WARNING **: 13:27:14.386: Unknown device type 14 ** (steam:19981): WARNING **: 13:27:14.386: Could not create object for /org/freedesktop/NetworkManager/Devices/1: unknown object type ** (steam:19981): WARNING **: 13:27:14.386: Unknown device type 16 ** (steam:19981): WARNING **: 13:27:14.386: Could not create object for /org/freedesktop/NetworkManager/Devices/3: unknown object type ** (steam:19981): WARNING **: 13:27:14.387: Unknown device type 16 ** (steam:19981): WARNING **: 13:27:14.387: Could not create object for /org/freedesktop/NetworkManager/Devices/5: unknown object type Installing breakpad exception handler for appid(steam)/version(1576550254) Opted-in Controller Mask for AppId 0: 0 Installing breakpad exception handler for appid(steam)/version(1576550254) ** (steam:19981): WARNING **: 13:27:14.627: Unknown setting 'proxy' ** (steam:19981): WARNING **: 13:27:14.627: Ignoring invalid property 'route-data' ** (steam:19981): WARNING **: 13:27:14.627: Ignoring invalid property 'address-data' ** (steam:19981): WARNING **: 13:27:14.627: Ignoring invalid property 'route-data' ** (steam:19981): WARNING **: 13:27:14.627: Ignoring invalid property 'address-data' ** (steam:19981): WARNING **: 13:27:14.627: Unknown setting 'proxy' ** (steam:19981): WARNING **: 13:27:14.628: Ignoring invalid property 'route-data' ** (steam:19981): WARNING **: 13:27:14.628: Ignoring invalid property 'address-data' ** (steam:19981): WARNING **: 13:27:14.628: Ignoring invalid property 'route-data' ** (steam:19981): WARNING **: 13:27:14.628: Ignoring invalid property 'address-data' ** (steam:19981): WARNING **: 13:27:14.628: Ignoring invalid property 'metered' ** (steam:19981): WARNING **: 13:27:14.628: Unknown setting 'proxy' ** (steam:19981): WARNING **: 13:27:14.628: Ignoring invalid property 'route-data' ** (steam:19981): WARNING **: 13:27:14.628: Ignoring invalid property 'address-data' ** (steam:19981): WARNING **: 13:27:14.628: Ignoring invalid property 'route-data' ** (steam:19981): WARNING **: 13:27:14.628: Ignoring invalid property 'address-data' ** (steam:19981): WARNING **: 13:27:14.628: Ignoring invalid property 'interface-name' ** (steam:19981): WARNING **: 13:27:14.628: Unknown setting 'proxy' ** (steam:19981): WARNING **: 13:27:14.628: Unknown setting 'tun' ** (steam:19981): WARNING **: 13:27:14.628: Ignoring invalid property 'address-data' ** (steam:19981): WARNING **: 13:27:14.628: Ignoring invalid property 'dns-priority' ** (steam:19981): WARNING **: 13:27:14.628: Ignoring invalid property 'route-data' ** (steam:19981): WARNING **: 13:27:14.628: Ignoring invalid property 'address-data' ** (steam:19981): WARNING **: 13:27:14.628: Ignoring invalid property 'dns-priority' ** (steam:19981): WARNING **: 13:27:14.628: Ignoring invalid property 'route-data' ** (steam:19981): WARNING **: 13:27:14.628: replace_settings: error updating connection /org/freedesktop/NetworkManager/Settings/4 settings: (1) method ** (steam:19981): WARNING **: 13:27:14.629: Ignoring invalid property 'interface-name' ** (steam:19981): WARNING **: 13:27:14.629: Unknown setting 'proxy' ** (steam:19981): WARNING **: 13:27:14.629: Unknown setting 'tun' ** (steam:19981): WARNING **: 13:27:14.629: Ignoring invalid property 'address-data' ** (steam:19981): WARNING **: 13:27:14.629: Ignoring invalid property 'dns-priority' ** (steam:19981): WARNING **: 13:27:14.629: Ignoring invalid property 'route-data' ** (steam:19981): WARNING **: 13:27:14.629: Ignoring invalid property 'address-data' ** (steam:19981): WARNING **: 13:27:14.629: Ignoring invalid property 'dns-priority' ** (steam:19981): WARNING **: 13:27:14.629: Ignoring invalid property 'route-data' ** (steam:19981): WARNING **: 13:27:14.629: replace_settings: error updating connection /org/freedesktop/NetworkManager/Settings/6 settings: (1) method Local Device Found type: 0000 0000 path: sdl://0 serial_number: - 0 Manufacturer: Product: Xbox Gamepad (userspace driver) Release: 0 Interface: -1 !! Steam controller device opened for index 0. Steam Controller reserving XInput slot 0 Local Device Found type: 0000 0000 path: sdl://1 serial_number: - 1 Manufacturer: Product: Xbox Gamepad (userspace driver) Release: 0 Interface: -1 !! Steam controller device opened for index 1. Steam Controller reserving XInput slot 1 Installing breakpad exception handler for appid(steam)/version(1576550254) (steam:19981): Gtk-WARNING **: 13:27:14.696: gtk_disable_setlocale() must be called before gtk_init() Controller 0 connected, configuring it now... Installing breakpad exception handler for appid(steam)/version(1576550254) Controller 1 connected, configuring it now... Controller has an Invalid or missing unit serial number, setting to '0-0-bee9a55' Controller has an Invalid or missing unit serial number, setting to '0-0-bee9a55g' (steam:19981): LIBDBUSMENU-GLIB-WARNING **: 13:27:14.760: Trying to remove a child that doesn't believe we're it's parent. (steam:19981): LIBDBUSMENU-GLIB-WARNING **: 13:27:14.760: Trying to remove a child that doesn't believe we're it's parent. (steam:19981): LIBDBUSMENU-GLIB-WARNING **: 13:27:14.760: Trying to remove a child that doesn't believe we're it's parent. (steam:19981): LIBDBUSMENU-GLIB-WARNING **: 13:27:14.760: Trying to remove a child that doesn't believe we're it's parent. (steam:19981): LIBDBUSMENU-GLIB-WARNING **: 13:27:14.761: Trying to remove a child that doesn't believe we're it's parent. (steam:19981): LIBDBUSMENU-GLIB-WARNING **: 13:27:14.761: Trying to remove a child that doesn't believe we're it's parent. (steam:19981): LIBDBUSMENU-GLIB-WARNING **: 13:27:14.761: Trying to remove a child that doesn't believe we're it's parent. (steam:19981): LIBDBUSMENU-GLIB-WARNING **: 13:27:14.761: Trying to remove a child that doesn't believe we're it's parent. (steam:19981): LIBDBUSMENU-GLIB-WARNING **: 13:27:14.761: Trying to remove a child that doesn't believe we're it's parent. (steam:19981): LIBDBUSMENU-GLIB-WARNING **: 13:27:14.761: Trying to remove a child that doesn't believe we're it's parent. (steam:19981): LIBDBUSMENU-GLIB-WARNING **: 13:27:14.761: Trying to remove a child that doesn't believe we're it's parent. (steam:19981): LIBDBUSMENU-GLIB-WARNING **: 13:27:14.761: Trying to remove a child that doesn't believe we're it's parent. (steam:19981): LIBDBUSMENU-GLIB-WARNING **: 13:27:14.761: Trying to remove a child that doesn't believe we're it's parent. Controller device closed after hid_read failure !! Controller 0 attributes: Type: 31 ProductID: 0 Serial: 0-0-bee9a55 Capabilities: 001843ff Firmware Version: 0 Firmware Build Time: 2147483647 (Tue, 19 Jan 2038 03:14:07 GMT) Bootloader Build Time: 2147483647 (Tue, 19 Jan 2038 03:14:07 GMT) Could not load local selection (), local override (/home/daniel/.local/share/Steam//controller_config/bigpicture_gamepad.vdf), or user path (/home/daniel/.local/share/Steam/userdata/200186453/config/controller_configs/bigpicture_gamepad.vdf), checking last resort path: /home/daniel/.local/share/Steam//controller_base/bigpicture_gamepad.vdf Loaded Config for Last Resort Path for App ID 413090, Controller 0: /home/daniel/.local/share/Steam//controller_base/bigpicture_gamepad.vdf [413090]Non-Steam Controller Configs Enabled: 1 Controller device closed after hid_read failure Could not load local selection (), local override (/home/daniel/.local/share/Steam//controller_config/bigpicture_gamepad.vdf), or user path (/home/daniel/.local/share/Steam/userdata/200186453/config/controller_configs/bigpicture_gamepad.vdf), checking last resort path: /home/daniel/.local/share/Steam//controller_base/bigpicture_gamepad.vdf Loaded Config for Last Resort Path for App ID 413090, Controller 0: /home/daniel/.local/share/Steam//controller_base/bigpicture_gamepad.vdf Loaded Config for Local Override Path for App ID 413080, Controller 0: /home/daniel/.local/share/Steam//controller_base/empty.vdf [413080]Non-Steam Controller Configs Enabled: 1 Controller 0 disconnected !! Controller 1 attributes: Type: 31 ProductID: 0 Serial: 0-0-bee9a55g Capabilities: 001843ff Firmware Version: 0 Firmware Build Time: 2147483647 (Tue, 19 Jan 2038 03:14:07 GMT) Bootloader Build Time: 2147483647 (Tue, 19 Jan 2038 03:14:07 GMT) Loaded Config for Local Selection Path for App ID 413090, Controller 1: /home/daniel/.local/share/Steam/steamapps/workshop/content/241100/1689651975/1007024772344596662_legacy.bin Could not load local selection (), local override (/home/daniel/.local/share/Steam//controller_config/bigpicture_gamepad.vdf), or user path (/home/daniel/.local/share/Steam/userdata/200186453/config/controller_configs/bigpicture_gamepad.vdf), checking last resort path: /home/daniel/.local/share/Steam//controller_base/bigpicture_gamepad.vdf Loaded Config for Last Resort Path for App ID 413090, Controller 1: /home/daniel/.local/share/Steam//controller_base/bigpicture_gamepad.vdf Loaded Config for Local Override Path for App ID 413080, Controller 1: /home/daniel/.local/share/Steam//controller_base/empty.vdf Controller 1 disconnected WARNING: Experimental compiler backend enabled. Here be dragons! Incorrect rendering, GPU hangs and/or resets are likely WARNING: radv is not a conformant vulkan implementation, testing use only. WARNING: disabling NGG because ACO is used. Local Device Found type: 0000 0000 path: sdl://0 serial_number: - 0 Manufacturer: Product: Xbox Gamepad (userspace driver) Release: 0 Interface: -1 !! Steam controller device opened for index 0. Steam Controller reserving XInput slot 0 Local Device Found type: 0000 0000 path: sdl://1 serial_number: - 1 Manufacturer: Product: Xbox Gamepad (userspace driver) Release: 0 Interface: -1 !! Steam controller device opened for index 1. Steam Controller reserving XInput slot 1 dmesg: read kernel buffer failed: Operation not permitted ***************************************************************************** * WARNING: RADV_TRACE_FILE is costly and should only be used for debugging! * ***************************************************************************** Trace file will be dumped to /home/daniel/trace Enabled perftest options: aco, Controller 0 connected, configuring it now... Controller has an Invalid or missing unit serial number, setting to '0-0-bee9a55' Controller 1 connected, configuring it now... Controller has an Invalid or missing unit serial number, setting to '0-0-bee9a55g' Installing breakpad exception handler for appid(steam)/version(1576550254) Fossilize INFO: Overriding serialization path: "/home/daniel/.local/share/Steam/shader_cache_temp_dir_vk_64/fozpipelinesv4/steamapprun_pipeline_cache". Installing breakpad exception handler for appid(steam)/version(1576550254) !! Controller 0 attributes: Type: 31 ProductID: 0 Serial: 0-0-bee9a55 Capabilities: 001843ff Firmware Version: 0 Firmware Build Time: 2147483647 (Tue, 19 Jan 2038 03:14:07 GMT) Bootloader Build Time: 2147483647 (Tue, 19 Jan 2038 03:14:07 GMT) Loaded Config for Local Selection Path for App ID 413090, Controller 0: /home/daniel/.local/share/Steam/steamapps/workshop/content/241100/1689651975/1007024772344596662_legacy.bin BYieldingQueryAccountsRegisteredToController BYieldingQueryAccountsRegisteredToController Loaded Config for Local Selection Path for App ID 413090, Controller 0: /home/daniel/.local/share/Steam/steamapps/workshop/content/241100/1557881022/956347096063773104_legacy.bin Opted-in Controller Mask for AppId 413080: 0 Loaded Config for Local Override Path for App ID 413080, Controller 0: /home/daniel/.local/share/Steam//controller_base/empty.vdf !! Controller 1 attributes: Type: 31 ProductID: 0 Serial: 0-0-bee9a55g Capabilities: 001843ff Firmware Version: 0 Firmware Build Time: 2147483647 (Tue, 19 Jan 2038 03:14:07 GMT) Bootloader Build Time: 2147483647 (Tue, 19 Jan 2038 03:14:07 GMT) Loaded Config for Local Selection Path for App ID 413090, Controller 0: /home/daniel/.local/share/Steam/steamapps/workshop/content/241100/1689651975/1007024772344596662_legacy.bin Loaded Config for Local Selection Path for App ID 413090, Controller 1: /home/daniel/.local/share/Steam/steamapps/workshop/content/241100/1689651975/1007024772344596662_legacy.bin Loaded Config for Local Selection Path for App ID 413090, Controller 0: /home/daniel/.local/share/Steam/steamapps/workshop/content/241100/1557881022/956347096063773104_legacy.bin Loaded Config for Local Selection Path for App ID 413090, Controller 1: /home/daniel/.local/share/Steam/steamapps/workshop/content/241100/1557881022/956347096063773104_legacy.bin Loaded Config for Local Override Path for App ID 413080, Controller 1: /home/daniel/.local/share/Steam//controller_base/empty.vdf Loaded Config for Local Override Path for App ID 413080, Controller 0: /home/daniel/.local/share/Steam//controller_base/empty.vdf Loaded Config for Local Override Path for App ID 413080, Controller 1: /home/daniel/.local/share/Steam//controller_base/empty.vdf Fetching Config Sets 0 CClientJobFetchPersonalizationFileID Fetching Config Sets 1 CClientJobFetchPersonalizationFileID Installing breakpad exception handler for appid(steam)/version(1576550254) roaming config store loaded successfully - 792 bytes. migrating temporary roaming config store BRefreshApplicationsInLibrary 1: 20ms [0118/132725.512506:INFO:crash_reporting.cc(270)] Crash reporting enabled for process: renderer [0118/132725.563654:INFO:crash_reporting.cc(270)] Crash reporting enabled for process: renderer [0118/132725.638441:INFO:crash_reporting.cc(270)] Crash reporting enabled for process: renderer Installing breakpad exception handler for appid(steam)/version(1576550254) Failed to init SteamVR because it isn't installed ExecCommandLine: "'/home/daniel/.local/share/Steam/ubuntu12_32/steam'" System startup time: 13.09 seconds !! Controller 0 attributes: Type: 31 ProductID: 0 Serial: 0-0-bee9a55 Capabilities: 001843ff Firmware Version: 0 Firmware Build Time: 2147483647 (Tue, 19 Jan 2038 03:14:07 GMT) Bootloader Build Time: 2147483647 (Tue, 19 Jan 2038 03:14:07 GMT) OnFocusWindowChanged to window type: k_nGameIDControllerConfigs_Desktop, AppID 413080 Loaded Config for Local Override Path for App ID 413080, Controller 0: /home/daniel/.local/share/Steam//controller_base/empty.vdf [413080]Non-Steam Controller Configs Enabled: 1 Loaded Config for Local Override Path for App ID 413080, Controller 1: /home/daniel/.local/share/Steam//controller_base/empty.vdf OnFocusWindowChanged to window type: k_nGameIDControllerConfigs_Desktop, AppID 413080 Loaded Config for Local Override Path for App ID 413080, Controller 0: /home/daniel/.local/share/Steam//controller_base/empty.vdf Loaded Config for Local Override Path for App ID 413080, Controller 1: /home/daniel/.local/share/Steam//controller_base/empty.vdf [0118/132726.033607:INFO:crash_reporting.cc(270)] Crash reporting enabled for process: renderer [0118/132726.036978:INFO:crash_reporting.cc(270)] Crash reporting enabled for process: renderer [0118/132726.041024:INFO:crash_reporting.cc(270)] Crash reporting enabled for process: renderer Installing breakpad exception handler for appid(steam)/version(1576550254) !! Controller 1 attributes: Type: 31 ProductID: 0 Serial: 0-0-bee9a55g Capabilities: 001843ff Firmware Version: 0 Firmware Build Time: 2147483647 (Tue, 19 Jan 2038 03:14:07 GMT) Bootloader Build Time: 2147483647 (Tue, 19 Jan 2038 03:14:07 GMT) Set Account Config Sets 1 1 1 Set Account Config Sets 0 1 1 BuildCompleteAppOverviewChange: 354 RegisterForAppOverview 1: 23ms RegisterForAppOverview 2: 24ms [0118/132734.033690:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 37 [0118/132734.042963:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 39 [0118/132734.044483:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 41 [0118/132734.047690:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 43 [0118/132734.049178:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 45 [0118/132734.059224:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 47 [0118/132734.060499:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 49 [0118/132734.253232:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 51 [0118/132734.262813:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 53 [0118/132734.769592:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 55 [0118/132734.769654:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 57 [0118/132734.769677:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 59 [0118/132734.769708:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 61 [0118/132734.769729:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 63 [0118/132734.823351:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 65 [0118/132734.875813:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 67 [0118/132734.875865:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 69 [0118/132734.875889:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 71 [0118/132734.875912:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 73 [0118/132734.875933:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 75 [0118/132735.277140:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 77 [0118/132735.277196:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 79 [0118/132735.277208:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 81 [0118/132735.277220:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 83 [0118/132735.277377:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 85 [0118/132735.681907:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 87 [0118/132735.681988:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 89 [0118/132735.682225:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 91 [0118/132735.930297:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 93 [0118/132735.930607:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 95 [0118/132735.976712:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 97 [0118/132736.159244:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 101 [0118/132736.167057:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 99 [0118/132736.540177:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 103 [0118/132736.540365:WARNING:spdy_session.cc(3304)] Received HEADERS for invalid stream 105 [20920]Non-Steam Controller Configs Enabled: 1 Opted-in Controller Mask for AppId 20920: 0 Loaded Config for Local Override Path for App ID 20920, Controller 0: /home/daniel/.local/share/Steam//controller_base/empty.vdf Loaded Config for Local Override Path for App ID 20920, Controller 1: /home/daniel/.local/share/Steam//controller_base/empty.vdf GameAction [AppID 20920, ActionID 1] : LaunchApp changed task to ProcessingInstallScript with "" esync: up and running. Installing breakpad exception handler for appid(steam)/version(1576550254) Installing breakpad exception handler for appid(steam)/version(1576550254) GameAction [AppID 20920, ActionID 1] : LaunchApp changed task to SynchronizingCloud with "" GameAction [AppID 20920, ActionID 1] : LaunchApp changed task to SiteLicenseSeatCheckout with "" GameAction [AppID 20920, ActionID 1] : LaunchApp changed task to CreatingProcess with "" GameAction [AppID 20920, ActionID 1] : LaunchApp waiting for user response to CreatingProcess "" GameAction [AppID 20920, ActionID 1] : LaunchApp continues with user response "CreatingProcess" Game update: AppID 20920 "", ProcID 20642, IP 0.0.0.0:0 Starting app 20920 Loaded Config for Local Override Path for App ID 20920, Controller 0: /home/daniel/.local/share/Steam//controller_base/empty.vdf Loaded Config for Local Override Path for App ID 20920, Controller 1: /home/daniel/.local/share/Steam//controller_base/empty.vdf >>> Adding process 20642 for game ID 20920 GameAction [AppID 20920, ActionID 1] : LaunchApp changed task to WaitingGameWindow with "" ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. GameAction [AppID 20920, ActionID 1] : LaunchApp changed task to Completed with "" ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. >>> Adding process 20643 for game ID 20920 ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_64/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS64): ignored. ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_64/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS64): ignored. >>> Adding process 20644 for game ID 20920 >>> Adding process 20645 for game ID 20920 ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. esync: up and running. ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. >>> Adding process 20647 for game ID 20920 >>> Adding process 20650 for game ID 20920 ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. >>> Adding process 20652 for game ID 20920 ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. >>> Adding process 20655 for game ID 20920 >>> Adding process 20662 for game ID 20920 ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. >>> Adding process 20671 for game ID 20920 Game update: AppID 20920 "", ProcID 20645, IP 0.0.0.0:0 RecordSteamInterfaceCreation (PID 20645): SteamUtils009 / Utils Setting breakpad minidump AppID = 20920 RecordSteamInterfaceCreation (PID 20645): SteamUser019 / User Steam_SetMinidumpSteamID: Caching Steam ID: 76561198160452181 [API loaded no] RecordSteamInterfaceCreation (PID 20645): SteamUser019 / User RecordSteamInterfaceCreation (PID 20645): SteamFriends015 / Friends RecordSteamInterfaceCreation (PID 20645): SteamUtils009 / Utils RecordSteamInterfaceCreation (PID 20645): SteamMatchMaking009 / Matchmaking RecordSteamInterfaceCreation (PID 20645): SteamMatchMakingServers002 / MatchmakingServers RecordSteamInterfaceCreation (PID 20645): STEAMUSERSTATS_INTERFACE_VERSION011 / UserStats RecordSteamInterfaceCreation (PID 20645): STEAMAPPS_INTERFACE_VERSION008 / Apps RecordSteamInterfaceCreation (PID 20645): SteamNetworking005 / Networking RecordSteamInterfaceCreation (PID 20645): STEAMREMOTESTORAGE_INTERFACE_VERSION014 / RemoteStorage RecordSteamInterfaceCreation (PID 20645): STEAMSCREENSHOTS_INTERFACE_VERSION003 / Screenshots RecordSteamInterfaceCreation (PID 20645): STEAMHTTP_INTERFACE_VERSION002 / HTTP RecordSteamInterfaceCreation (PID 20645): SteamController006 / Controller RecordSteamInterfaceCreation (PID 20645): STEAMUGC_INTERFACE_VERSION010 / UGC RecordSteamInterfaceCreation (PID 20645): STEAMAPPLIST_INTERFACE_VERSION001 / AppList RecordSteamInterfaceCreation (PID 20645): STEAMMUSIC_INTERFACE_VERSION001 / Music RecordSteamInterfaceCreation (PID 20645): STEAMMUSICREMOTE_INTERFACE_VERSION001 / MusicRemote RecordSteamInterfaceCreation (PID 20645): STEAMHTMLSURFACE_INTERFACE_VERSION_004 / HTMLSurface RecordSteamInterfaceCreation (PID 20645): STEAMINVENTORY_INTERFACE_V002 / Inventory RecordSteamInterfaceCreation (PID 20645): STEAMVIDEO_INTERFACE_V002 / Video RecordSteamInterfaceCreation (PID 20645): STEAMPARENTALSETTINGS_INTERFACE_VERSION001 / ParentalSettings ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_64/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS64): ignored. >>> Adding process 20692 for game ID 20920 Installing breakpad exception handler for appid(steam)/version(1576550254) Installing breakpad exception handler for appid(steam)/version(1576550254) Installing breakpad exception handler for appid(steam)/version(1576550254) ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_64/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS64): ignored. >>> Adding process 20705 for game ID 20920 ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_64/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS64): ignored. >>> Adding process 20724 for game ID 20920 Game update: AppID 20920 "", ProcID 20724, IP 0.0.0.0:0 RecordSteamInterfaceCreation (PID 20724): SteamUtils005 / Utils RecordSteamInterfaceCreation (PID 20724): SteamUser016 / User RecordSteamInterfaceCreation (PID 20724): STEAMAPPTICKET_INTERFACE_VERSION001 / Game update: AppID 20920 "", ProcID 20724, IP 0.0.0.0:0 RecordSteamInterfaceCreation (PID 20724): SteamUser014 / User RecordSteamInterfaceCreation (PID 20724): SteamFriends008 / Friends RecordSteamInterfaceCreation (PID 20724): SteamUtils005 / Utils RecordSteamInterfaceCreation (PID 20724): SteamMatchMaking008 / Matchmaking RecordSteamInterfaceCreation (PID 20724): SteamMatchMakingServers002 / MatchmakingServers RecordSteamInterfaceCreation (PID 20724): STEAMUSERSTATS_INTERFACE_VERSION009 / UserStats RecordSteamInterfaceCreation (PID 20724): STEAMAPPS_INTERFACE_VERSION004 / Apps RecordSteamInterfaceCreation (PID 20724): SteamNetworking004 / Networking RecordSteamInterfaceCreation (PID 20724): STEAMREMOTESTORAGE_INTERFACE_VERSION004 / RemoteStorage WARNING: Experimental compiler backend enabled. Here be dragons! Incorrect rendering, GPU hangs and/or resets are likely WARNING: radv is not a conformant vulkan implementation, testing use only. WARNING: disabling NGG because ACO is used. ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. dmesg: read kernel buffer failed: Operation not permitted ***************************************************************************** * WARNING: RADV_TRACE_FILE is costly and should only be used for debugging! * ***************************************************************************** Trace file will be dumped to /home/daniel/trace Enabled perftest options: aco, Fossilize INFO: Overriding serialization path: "/run/media/daniel/O/SteamLibrary/steamapps/shadercache/20920/fozpipelinesv4/steamapprun_pipeline_cache". >>> Adding process 20754 for game ID 20920 Installing breakpad exception handler for appid(gameoverlayui)/version(20191216164847) Installing breakpad exception handler for appid(gameoverlayui)/version(1.0) Installing breakpad exception handler for appid(gameoverlayui)/version(1.0) RecordSteamInterfaceCreation (PID 20724): SteamUtils005 / Utils [0118/132835.993543:INFO:crash_reporting.cc(270)] Crash reporting enabled for process: renderer Installing breakpad exception handler for appid(gameoverlayui)/version(1.0) OnFocusWindowChanged to game window type: AppID 20920, 20920 Controller 0 mapping uses xinput : false Loaded Config for Local Override Path for App ID 20920, Controller 0: /home/daniel/.local/share/Steam//controller_base/empty.vdf Controller 0 mapping uses xinput : false Controller 1 mapping uses xinput : false Loaded Config for Local Override Path for App ID 20920, Controller 1: /home/daniel/.local/share/Steam//controller_base/empty.vdf Controller 1 mapping uses xinput : false [0118/132836.193301:ERROR:frame_sink_video_capturer_impl.cc(197)] Invalid resolutions constraints: 0x0 must not be greater than 0x0; and also within media::limits. Installing breakpad exception handler for appid(steam)/version(1576550254) GPU hang report: Device name: AMD Radeon RX 5700 XT (AMD RADV/ACO NAVI10 (LLVM 10.0.0) DRM 3.36.0 / 5.5.0-1-MANJARO, LLVM 10.0.0) Enabled perftest options: aco, Last 60 lines of dmesg: ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. dmesg: read kernel buffer failed: Operation not permitted Memory-mapped registers: 0x08010 <- 0xa2710028 0x08008 <- 0x50000008 0x08014 <- 0x0d000000 0x08018 <- 0x0d000000 0x08038 <- 0x00000006 0x0803c <- 0x00000006 0x08680 <- 0x94078600 0x08674 <- 0x00000c00 0x08678 <- 0x00210802 0x08670 <- 0x00000800 0x08210 <- 0x00000000 0x08214 <- 0x00000000 0x08218 <- 0x00000000 0x0821c <- 0xb4000263 0x08220 <- 0x00000006 0x08224 <- 0x00000003 RING_GFX: Vertex Shader as VS: SPIRV (sha1: d09e644b5482c517dd3a7c167bcd92a0eada697c): ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. >>> Adding process 20907 for game ID 20920 ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. ; SPIR-V ; Version: 1.3 ; Generator: Khronos; 0 ; Bound: 415 ; Schema: 0 OpCapability Shader OpCapability ImageQuery OpCapability ClipDistance OpCapability DrawParameters OpExtension "SPV_KHR_shader_draw_parameters" %1 = OpExtInstImport "GLSL.std.450" OpMemoryModel Logical GLSL450 OpEntryPoint Vertex %main "main" %in_Position0 %in_Normal0 %in_Binormal0 %in_Tangent0 %in_Texcoord0 %oPos %out_Texcoord0 %out_Texcoord1 %out_Texcoord2 %out_Texcoord3 %out_Color0_default %out_Color1_default %oPSize %gl_ClipDistance %3 = OpString "VS_281af221896be97c268d8306abbbb00da31c0a97" OpSource Unknown 0 %3 OpName %cbuffer_t "cbuffer_t" OpMemberName %cbuffer_t 0 "f" OpMemberName %cbuffer_t 1 "i" OpMemberName %cbuffer_t 2 "b" OpName %c "c" OpName %v "v" OpName %o "o" OpName %vs_main "vs_main" OpName %render_state_t "render_state_t" OpMemberName %render_state_t 0 "fog_color" OpMemberName %render_state_t 1 "fog_scale" OpMemberName %render_state_t 2 "fog_end" OpMemberName %render_state_t 3 "fog_density" OpMemberName %render_state_t 4 "alpha_ref" OpMemberName %render_state_t 5 "point_size" OpMemberName %render_state_t 6 "point_size_min" OpMemberName %render_state_t 7 "point_size_max" OpMemberName %render_state_t 8 "point_scale_a" OpMemberName %render_state_t 9 "point_scale_b" OpMemberName %render_state_t 10 "point_scale_c" OpName %render_state "render_state" OpName %cF3_def "cF3_def" OpName %r0 "r0" OpName %r1 "r1" OpName %in_Position0 "in_Position0" OpName %in_Normal0 "in_Normal0" OpName %in_Binormal0 "in_Binormal0" OpName %in_Tangent0 "in_Tangent0" OpName %in_Texcoord0 "in_Texcoord0" OpName %oPos "oPos" OpName %out_Texcoord0 "out_Texcoord0" OpName %out_Texcoord1 "out_Texcoord1" OpName %out_Texcoord2 "out_Texcoord2" OpName %out_Texcoord3 "out_Texcoord3" OpName %out_Color0_default "out_Color0_default" OpName %out_Color1_default "out_Color1_default" OpName %point_mode "point_mode" OpName %oPSize "oPSize" OpName %clip_info_t "clip_info_t" OpMemberName %clip_info_t 0 "clip_planes" OpName %clip_info "clip_info" OpName %main "main" OpDecorate %_arr_v4float_uint_256 ArrayStride 16 OpDecorate %_arr_v4int_uint_16 ArrayStride 16 OpDecorate %cbuffer_t Block OpMemberDecorate %cbuffer_t 0 Offset 0 OpMemberDecorate %cbuffer_t 1 Offset 4096 OpMemberDecorate %cbuffer_t 2 Offset 4352 OpDecorate %c DescriptorSet 0 OpDecorate %c Binding 0 OpDecorate %render_state_t Block OpMemberDecorate %render_state_t 0 Offset 0 OpMemberDecorate %render_state_t 1 Offset 12 OpMemberDecorate %render_state_t 2 Offset 16 OpMemberDecorate %render_state_t 3 Offset 20 OpMemberDecorate %render_state_t 4 Offset 24 OpMemberDecorate %render_state_t 5 Offset 28 OpMemberDecorate %render_state_t 6 Offset 32 OpMemberDecorate %render_state_t 7 Offset 36 OpMemberDecorate %render_state_t 8 Offset 40 OpMemberDecorate %render_state_t 9 Offset 44 OpMemberDecorate %render_state_t 10 Offset 48 OpDecorate %in_Position0 Location 0 OpDecorate %in_Normal0 Location 1 OpDecorate %in_Binormal0 Location 2 OpDecorate %in_Tangent0 Location 3 OpDecorate %in_Texcoord0 Location 4 OpDecorate %oPos BuiltIn Position OpDecorate %out_Texcoord0 Location 0 OpDecorate %out_Texcoord1 Location 4 OpDecorate %out_Texcoord2 Location 3 OpDecorate %out_Texcoord3 Location 5 OpDecorate %out_Color0_default Location 1 OpDecorate %out_Color1_default Location 2 OpDecorate %point_mode SpecId 1255 OpDecorate %oPSize BuiltIn PointSize OpDecorate %_arr_v4float_uint_6 ArrayStride 16 OpDecorate %clip_info_t Block OpMemberDecorate %clip_info_t 0 Offset 0 OpDecorate %clip_info DescriptorSet 0 OpDecorate %clip_info Binding 1 OpDecorate %gl_ClipDistance BuiltIn ClipDistance %uint = OpTypeInt 32 0 %uint_256 = OpConstant %uint 256 %float = OpTypeFloat 32 %v4float = OpTypeVector %float 4 %_arr_v4float_uint_256 = OpTypeArray %v4float %uint_256 %uint_16 = OpConstant %uint 16 %int = OpTypeInt 32 1 %v4int = OpTypeVector %int 4 %_arr_v4int_uint_16 = OpTypeArray %v4int %uint_16 %cbuffer_t = OpTypeStruct %_arr_v4float_uint_256 %_arr_v4int_uint_16 %uint %_ptr_Uniform_cbuffer_t = OpTypePointer Uniform %cbuffer_t %_arr_v4float_uint_16 = OpTypeArray %v4float %uint_16 %_ptr_Private__arr_v4float_uint_16 = OpTypePointer Private %_arr_v4float_uint_16 %v3float = OpTypeVector %float 3 %render_state_t = OpTypeStruct %v3float %float %float %float %float %float %float %float %float %float %float %_ptr_PushConstant_render_state_t = OpTypePointer PushConstant %render_state_t %void = OpTypeVoid %26 = OpTypeFunction %void %float_1 = OpConstant %float 1 %float_0 = OpConstant %float 0 %float_2 = OpConstant %float 2 %float_n1 = OpConstant %float -1 %cF3_def = OpConstantComposite %v4float %float_1 %float_0 %float_2 %float_n1 %33 = OpConstantComposite %v4float %float_0 %float_0 %float_0 %float_0 %_ptr_Private_v4float = OpTypePointer Private %v4float %int_0 = OpConstant %int 0 %uint_0 = OpConstant %uint 0 %_ptr_Uniform_v4float = OpTypePointer Uniform %v4float %int_1 = OpConstant %int 1 %int_2 = OpConstant %int 2 %int_3 = OpConstant %int 3 %int_10 = OpConstant %int 10 %int_4 = OpConstant %int 4 %int_5 = OpConstant %int 5 %int_6 = OpConstant %int 6 %int_7 = OpConstant %int 7 %float_3_40282347e_38 = OpConstant %float 3.40282347e+38 %v2float = OpTypeVector %float 2 %int_41 = OpConstant %int 41 %_ptr_Input_v4float = OpTypePointer Input %v4float %uint_1 = OpConstant %uint 1 %uint_2 = OpConstant %uint 2 %uint_3 = OpConstant %uint 3 %uint_4 = OpConstant %uint 4 %_ptr_Output_v4float = OpTypePointer Output %v4float %341 = OpConstantComposite %v4float %float_1 %float_1 %float_1 %float_1 %_ptr_PushConstant_float = OpTypePointer PushConstant %float %bool = OpTypeBool %point_mode = OpSpecConstant %uint 0 %uint_5 = OpConstant %uint 5 %uint_10 = OpConstant %uint 10 %uint_9 = OpConstant %uint 9 %uint_8 = OpConstant %uint 8 %uint_6 = OpConstant %uint 6 %uint_7 = OpConstant %uint 7 %_ptr_Output_float = OpTypePointer Output %float %_arr_v4float_uint_6 = OpTypeArray %v4float %uint_6 %clip_info_t = OpTypeStruct %_arr_v4float_uint_6 %_ptr_Uniform_clip_info_t = OpTypePointer Uniform %clip_info_t %_arr_float_uint_6 = OpTypeArray %float %uint_6 %_ptr_Output__arr_float_uint_6 = OpTypePointer Output %_arr_float_uint_6 %c = OpVariable %_ptr_Uniform_cbuffer_t Uniform %v = OpVariable %_ptr_Private__arr_v4float_uint_16 Private %o = OpVariable %_ptr_Private__arr_v4float_uint_16 Private %render_state = OpVariable %_ptr_PushConstant_render_state_t PushConstant %r0 = OpVariable %_ptr_Private_v4float Private %33 %r1 = OpVariable %_ptr_Private_v4float Private %33 %in_Position0 = OpVariable %_ptr_Input_v4float Input %in_Normal0 = OpVariable %_ptr_Input_v4float Input %in_Binormal0 = OpVariable %_ptr_Input_v4float Input %in_Tangent0 = OpVariable %_ptr_Input_v4float Input %in_Texcoord0 = OpVariable %_ptr_Input_v4float Input %oPos = OpVariable %_ptr_Output_v4float Output %33 %out_Texcoord0 = OpVariable %_ptr_Output_v4float Output %33 %out_Texcoord1 = OpVariable %_ptr_Output_v4float Output %33 %out_Texcoord2 = OpVariable %_ptr_Output_v4float Output %33 %out_Texcoord3 = OpVariable %_ptr_Output_v4float Output %33 %out_Color0_default = OpVariable %_ptr_Output_v4float Output %341 %out_Color1_default = OpVariable %_ptr_Output_v4float Output %33 %oPSize = OpVariable %_ptr_Output_float Output %clip_info = OpVariable %_ptr_Uniform_clip_info_t Uniform %gl_ClipDistance = OpVariable %_ptr_Output__arr_float_uint_6 Output %vs_main = OpFunction %void None %26 %27 = OpLabel %36 = OpVectorShuffle %v4float %cF3_def %cF3_def 1 1 1 0 %37 = OpVectorShuffle %v4float %cF3_def %cF3_def 0 0 0 1 %39 = OpAccessChain %_ptr_Private_v4float %v %int_0 %40 = OpLoad %v4float %39 %41 = OpVectorShuffle %v4float %40 %40 0 1 2 0 %42 = OpExtInst %v4float %1 Fma %41 %37 %36 OpStore %r0 %42 %46 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_0 %47 = OpLoad %v4float %46 %48 = OpLoad %v4float %r0 %49 = OpDot %float %48 %47 %50 = OpLoad %v4float %r1 %51 = OpCompositeInsert %v4float %49 %50 0 OpStore %r1 %51 %53 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_1 %54 = OpLoad %v4float %53 %55 = OpLoad %v4float %r0 %56 = OpDot %float %55 %54 %57 = OpLoad %v4float %r1 %58 = OpCompositeInsert %v4float %56 %57 1 OpStore %r1 %58 %60 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_2 %61 = OpLoad %v4float %60 %62 = OpLoad %v4float %r0 %63 = OpDot %float %62 %61 %64 = OpLoad %v4float %r1 %65 = OpCompositeInsert %v4float %63 %64 2 OpStore %r1 %65 %66 = OpCompositeExtract %float %cF3_def 0 %67 = OpLoad %v4float %r1 %68 = OpCompositeInsert %v4float %66 %67 3 OpStore %r1 %68 %70 = OpAccessChain %_ptr_Private_v4float %o %int_3 %72 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_10 %73 = OpLoad %v4float %72 %74 = OpLoad %v4float %r1 %75 = OpDot %float %74 %73 %76 = OpLoad %v4float %70 %77 = OpCompositeInsert %v4float %75 %76 3 OpStore %70 %77 %78 = OpAccessChain %_ptr_Private_v4float %o %int_0 %80 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_4 %81 = OpLoad %v4float %80 %82 = OpLoad %v4float %r1 %83 = OpDot %float %82 %81 %84 = OpLoad %v4float %78 %85 = OpCompositeInsert %v4float %83 %84 0 OpStore %78 %85 %86 = OpAccessChain %_ptr_Private_v4float %o %int_0 %88 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_5 %89 = OpLoad %v4float %88 %90 = OpLoad %v4float %r1 %91 = OpDot %float %90 %89 %92 = OpLoad %v4float %86 %93 = OpCompositeInsert %v4float %91 %92 1 OpStore %86 %93 %94 = OpAccessChain %_ptr_Private_v4float %o %int_0 %96 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_6 %97 = OpLoad %v4float %96 %98 = OpLoad %v4float %r1 %99 = OpDot %float %98 %97 %100 = OpLoad %v4float %94 %101 = OpCompositeInsert %v4float %99 %100 2 OpStore %94 %101 %102 = OpAccessChain %_ptr_Private_v4float %o %int_0 %104 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_7 %105 = OpLoad %v4float %104 %106 = OpLoad %v4float %r1 %107 = OpDot %float %106 %105 %108 = OpLoad %v4float %102 %109 = OpCompositeInsert %v4float %107 %108 3 OpStore %102 %109 %110 = OpVectorShuffle %v3float %cF3_def %cF3_def 3 3 3 %111 = OpVectorShuffle %v3float %cF3_def %cF3_def 2 2 2 %112 = OpAccessChain %_ptr_Private_v4float %v %int_1 %113 = OpLoad %v4float %112 %114 = OpVectorShuffle %v3float %113 %113 0 1 2 %115 = OpExtInst %v3float %1 Fma %114 %111 %110 %116 = OpLoad %v4float %r0 %117 = OpVectorShuffle %v4float %116 %115 4 5 6 3 OpStore %r0 %117 %118 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_0 %119 = OpLoad %v4float %118 %120 = OpVectorShuffle %v3float %119 %119 0 1 2 %121 = OpLoad %v4float %r0 %122 = OpVectorShuffle %v3float %121 %121 0 1 2 %123 = OpDot %float %122 %120 %124 = OpLoad %v4float %r1 %125 = OpCompositeInsert %v4float %123 %124 0 OpStore %r1 %125 %126 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_1 %127 = OpLoad %v4float %126 %128 = OpVectorShuffle %v3float %127 %127 0 1 2 %129 = OpLoad %v4float %r0 %130 = OpVectorShuffle %v3float %129 %129 0 1 2 %131 = OpDot %float %130 %128 %132 = OpLoad %v4float %r1 %133 = OpCompositeInsert %v4float %131 %132 1 OpStore %r1 %133 %134 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_2 %135 = OpLoad %v4float %134 %136 = OpVectorShuffle %v3float %135 %135 0 1 2 %137 = OpLoad %v4float %r0 %138 = OpVectorShuffle %v3float %137 %137 0 1 2 %139 = OpDot %float %138 %136 %140 = OpLoad %v4float %r1 %141 = OpCompositeInsert %v4float %139 %140 2 OpStore %r1 %141 %142 = OpLoad %v4float %r1 %143 = OpVectorShuffle %v3float %142 %142 0 1 2 %144 = OpLoad %v4float %r1 %145 = OpVectorShuffle %v3float %144 %144 0 1 2 %146 = OpDot %float %145 %143 %147 = OpLoad %v4float %r0 %148 = OpCompositeInsert %v4float %146 %147 0 OpStore %r0 %148 %149 = OpLoad %v4float %r0 %150 = OpCompositeExtract %float %149 0 %151 = OpExtInst %float %1 FAbs %150 %152 = OpExtInst %float %1 InverseSqrt %151 %154 = OpExtInst %float %1 NMin %152 %float_3_40282347e_38 %155 = OpLoad %v4float %r0 %156 = OpCompositeInsert %v4float %154 %155 0 OpStore %r0 %156 %157 = OpAccessChain %_ptr_Private_v4float %o %int_2 %158 = OpLoad %v4float %r0 %159 = OpVectorShuffle %v3float %158 %158 0 0 0 %160 = OpLoad %v4float %r1 %161 = OpVectorShuffle %v3float %160 %160 0 1 2 %162 = OpFMul %v3float %161 %159 %163 = OpLoad %v4float %157 %164 = OpVectorShuffle %v4float %163 %162 4 5 6 3 OpStore %157 %164 %165 = OpVectorShuffle %v3float %cF3_def %cF3_def 3 3 3 %166 = OpVectorShuffle %v3float %cF3_def %cF3_def 2 2 2 %167 = OpAccessChain %_ptr_Private_v4float %v %int_2 %168 = OpLoad %v4float %167 %169 = OpVectorShuffle %v3float %168 %168 0 1 2 %170 = OpExtInst %v3float %1 Fma %169 %166 %165 %171 = OpLoad %v4float %r0 %172 = OpVectorShuffle %v4float %171 %170 4 5 6 3 OpStore %r0 %172 %173 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_0 %174 = OpLoad %v4float %173 %175 = OpVectorShuffle %v3float %174 %174 0 1 2 %176 = OpLoad %v4float %r0 %177 = OpVectorShuffle %v3float %176 %176 0 1 2 %178 = OpDot %float %177 %175 %179 = OpLoad %v4float %r1 %180 = OpCompositeInsert %v4float %178 %179 0 OpStore %r1 %180 %181 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_1 %182 = OpLoad %v4float %181 %183 = OpVectorShuffle %v3float %182 %182 0 1 2 %184 = OpLoad %v4float %r0 %185 = OpVectorShuffle %v3float %184 %184 0 1 2 %186 = OpDot %float %185 %183 %187 = OpLoad %v4float %r1 %188 = OpCompositeInsert %v4float %186 %187 1 OpStore %r1 %188 %189 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_2 %190 = OpLoad %v4float %189 %191 = OpVectorShuffle %v3float %190 %190 0 1 2 %192 = OpLoad %v4float %r0 %193 = OpVectorShuffle %v3float %192 %192 0 1 2 %194 = OpDot %float %193 %191 %195 = OpLoad %v4float %r1 %196 = OpCompositeInsert %v4float %194 %195 2 OpStore %r1 %196 %197 = OpLoad %v4float %r1 %198 = OpVectorShuffle %v3float %197 %197 0 1 2 %199 = OpLoad %v4float %r1 %200 = OpVectorShuffle %v3float %199 %199 0 1 2 %201 = OpDot %float %200 %198 %202 = OpLoad %v4float %r0 %203 = OpCompositeInsert %v4float %201 %202 0 OpStore %r0 %203 %204 = OpLoad %v4float %r0 %205 = OpCompositeExtract %float %204 0 %206 = OpExtInst %float %1 FAbs %205 %207 = OpExtInst %float %1 InverseSqrt %206 %208 = OpExtInst %float %1 NMin %207 %float_3_40282347e_38 %209 = OpLoad %v4float %r0 %210 = OpCompositeInsert %v4float %208 %209 0 OpStore %r0 %210 %211 = OpAccessChain %_ptr_Private_v4float %o %int_4 %212 = OpLoad %v4float %r0 %213 = OpVectorShuffle %v3float %212 %212 0 0 0 %214 = OpLoad %v4float %r1 %215 = OpVectorShuffle %v3float %214 %214 0 1 2 %216 = OpFMul %v3float %215 %213 %217 = OpLoad %v4float %211 %218 = OpVectorShuffle %v4float %217 %216 4 5 6 3 OpStore %211 %218 %219 = OpVectorShuffle %v3float %cF3_def %cF3_def 3 3 3 %220 = OpVectorShuffle %v3float %cF3_def %cF3_def 2 2 2 %221 = OpAccessChain %_ptr_Private_v4float %v %int_3 %222 = OpLoad %v4float %221 %223 = OpVectorShuffle %v3float %222 %222 0 1 2 %224 = OpExtInst %v3float %1 Fma %223 %220 %219 %225 = OpLoad %v4float %r0 %226 = OpVectorShuffle %v4float %225 %224 4 5 6 3 OpStore %r0 %226 %227 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_0 %228 = OpLoad %v4float %227 %229 = OpVectorShuffle %v3float %228 %228 0 1 2 %230 = OpLoad %v4float %r0 %231 = OpVectorShuffle %v3float %230 %230 0 1 2 %232 = OpDot %float %231 %229 %233 = OpLoad %v4float %r1 %234 = OpCompositeInsert %v4float %232 %233 0 OpStore %r1 %234 %235 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_1 %236 = OpLoad %v4float %235 %237 = OpVectorShuffle %v3float %236 %236 0 1 2 %238 = OpLoad %v4float %r0 %239 = OpVectorShuffle %v3float %238 %238 0 1 2 %240 = OpDot %float %239 %237 %241 = OpLoad %v4float %r1 %242 = OpCompositeInsert %v4float %240 %241 1 OpStore %r1 %242 %243 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_2 %244 = OpLoad %v4float %243 %245 = OpVectorShuffle %v3float %244 %244 0 1 2 %246 = OpLoad %v4float %r0 %247 = OpVectorShuffle %v3float %246 %246 0 1 2 %248 = OpDot %float %247 %245 %249 = OpLoad %v4float %r1 %250 = OpCompositeInsert %v4float %248 %249 2 OpStore %r1 %250 %251 = OpLoad %v4float %r1 %252 = OpVectorShuffle %v3float %251 %251 0 1 2 %253 = OpLoad %v4float %r1 %254 = OpVectorShuffle %v3float %253 %253 0 1 2 %255 = OpDot %float %254 %252 %256 = OpLoad %v4float %r0 %257 = OpCompositeInsert %v4float %255 %256 0 OpStore %r0 %257 %258 = OpLoad %v4float %r0 %259 = OpCompositeExtract %float %258 0 %260 = OpExtInst %float %1 FAbs %259 %261 = OpExtInst %float %1 InverseSqrt %260 %262 = OpExtInst %float %1 NMin %261 %float_3_40282347e_38 %263 = OpLoad %v4float %r0 %264 = OpCompositeInsert %v4float %262 %263 0 OpStore %r0 %264 %265 = OpAccessChain %_ptr_Private_v4float %o %int_3 %266 = OpLoad %v4float %r0 %267 = OpVectorShuffle %v3float %266 %266 0 0 0 %268 = OpLoad %v4float %r1 %269 = OpVectorShuffle %v3float %268 %268 0 1 2 %270 = OpFMul %v3float %269 %267 %271 = OpLoad %v4float %265 %272 = OpVectorShuffle %v4float %271 %270 4 5 6 3 OpStore %265 %272 %273 = OpAccessChain %_ptr_Private_v4float %o %int_1 %274 = OpAccessChain %_ptr_Private_v4float %v %int_4 %275 = OpLoad %v4float %274 %277 = OpVectorShuffle %v2float %275 %275 0 1 %278 = OpLoad %v4float %273 %279 = OpVectorShuffle %v4float %278 %277 4 5 2 3 OpStore %273 %279 %280 = OpAccessChain %_ptr_Private_v4float %o %int_1 %282 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_41 %283 = OpLoad %v4float %282 %284 = OpVectorShuffle %v2float %283 %283 0 1 %285 = OpLoad %v4float %280 %286 = OpVectorShuffle %v4float %285 %284 0 1 4 5 OpStore %280 %286 %287 = OpAccessChain %_ptr_Private_v4float %o %int_2 %288 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_41 %289 = OpLoad %v4float %288 %290 = OpCompositeExtract %float %289 2 %291 = OpLoad %v4float %287 %292 = OpCompositeInsert %v4float %290 %291 3 OpStore %287 %292 OpReturn OpFunctionEnd %main = OpFunction %void None %26 %293 = OpLabel %296 = OpAccessChain %_ptr_Private_v4float %v %uint_0 %297 = OpLoad %v4float %in_Position0 %298 = OpVectorShuffle %v4float %33 %297 4 5 6 7 OpStore %296 %298 %301 = OpAccessChain %_ptr_Private_v4float %v %uint_1 %302 = OpLoad %v4float %in_Normal0 %303 = OpVectorShuffle %v4float %33 %302 4 5 6 7 OpStore %301 %303 %306 = OpAccessChain %_ptr_Private_v4float %v %uint_2 %307 = OpLoad %v4float %in_Binormal0 %308 = OpVectorShuffle %v4float %33 %307 4 5 6 7 OpStore %306 %308 %311 = OpAccessChain %_ptr_Private_v4float %v %uint_3 %312 = OpLoad %v4float %in_Tangent0 %313 = OpVectorShuffle %v4float %33 %312 4 5 6 7 OpStore %311 %313 %316 = OpAccessChain %_ptr_Private_v4float %v %uint_4 %317 = OpLoad %v4float %in_Texcoord0 %318 = OpVectorShuffle %v4float %33 %317 4 5 6 7 OpStore %316 %318 %319 = OpFunctionCall %void %vs_main %322 = OpAccessChain %_ptr_Private_v4float %o %uint_0 %323 = OpLoad %v4float %322 %324 = OpVectorShuffle %v4float %33 %323 4 5 6 7 OpStore %oPos %324 %326 = OpAccessChain %_ptr_Private_v4float %o %uint_1 %327 = OpLoad %v4float %326 %328 = OpVectorShuffle %v4float %33 %327 4 5 6 7 OpStore %out_Texcoord0 %328 %330 = OpAccessChain %_ptr_Private_v4float %o %uint_2 %331 = OpLoad %v4float %330 %332 = OpVectorShuffle %v4float %33 %331 4 5 6 7 OpStore %out_Texcoord1 %332 %334 = OpAccessChain %_ptr_Private_v4float %o %uint_3 %335 = OpLoad %v4float %334 %336 = OpVectorShuffle %v4float %33 %335 4 5 6 7 OpStore %out_Texcoord2 %336 %338 = OpAccessChain %_ptr_Private_v4float %o %uint_4 %339 = OpLoad %v4float %338 %340 = OpVectorShuffle %v4float %33 %339 4 5 6 3 OpStore %out_Texcoord3 %340 %347 = OpBitFieldUExtract %uint %point_mode %int_0 %int_1 %348 = OpIEqual %bool %347 %uint_1 %350 = OpAccessChain %_ptr_PushConstant_float %render_state %uint_5 %351 = OpLoad %float %350 %353 = OpAccessChain %_ptr_PushConstant_float %render_state %uint_10 %354 = OpLoad %float %353 %356 = OpAccessChain %_ptr_PushConstant_float %render_state %uint_9 %357 = OpLoad %float %356 %359 = OpAccessChain %_ptr_PushConstant_float %render_state %uint_8 %360 = OpLoad %float %359 %361 = OpLoad %v4float %oPos %362 = OpCompositeExtract %float %361 3 %363 = OpFDiv %float %float_1 %362 %364 = OpVectorShuffle %v3float %361 %361 0 1 2 %365 = OpVectorTimesScalar %v3float %364 %363 %366 = OpDot %float %365 %365 %367 = OpExtInst %float %1 Sqrt %366 %368 = OpFMul %float %354 %366 %369 = OpExtInst %float %1 Fma %357 %367 %368 %370 = OpFAdd %float %360 %369 %371 = OpExtInst %float %1 Sqrt %370 %372 = OpFDiv %float %351 %371 %373 = OpSelect %float %348 %372 %351 %375 = OpAccessChain %_ptr_PushConstant_float %render_state %uint_6 %376 = OpLoad %float %375 %378 = OpAccessChain %_ptr_PushConstant_float %render_state %uint_7 %379 = OpLoad %float %378 %382 = OpExtInst %float %1 FClamp %373 %376 %379 OpStore %oPSize %382 %390 = OpLoad %v4float %oPos %391 = OpAccessChain %_ptr_Uniform_v4float %clip_info %uint_0 %uint_0 %392 = OpLoad %v4float %391 %393 = OpDot %float %390 %392 %394 = OpAccessChain %_ptr_Output_float %gl_ClipDistance %uint_0 OpStore %394 %393 %395 = OpAccessChain %_ptr_Uniform_v4float %clip_info %uint_0 %uint_1 %396 = OpLoad %v4float %395 %397 = OpDot %float %390 %396 %398 = OpAccessChain %_ptr_Output_float %gl_ClipDistance %uint_1 OpStore %398 %397 %399 = OpAccessChain %_ptr_Uniform_v4float %clip_info %uint_0 %uint_2 %400 = OpLoad %v4float %399 %401 = OpDot %float %390 %400 %402 = OpAccessChain %_ptr_Output_float %gl_ClipDistance %uint_2 OpStore %402 %401 %403 = OpAccessChain %_ptr_Uniform_v4float %clip_info %uint_0 %uint_3 %404 = OpLoad %v4float %403 %405 = OpDot %float %390 %404 %406 = OpAccessChain %_ptr_Output_float %gl_ClipDistance %uint_3 OpStore %406 %405 %407 = OpAccessChain %_ptr_Uniform_v4float %clip_info %uint_0 %uint_4 %408 = OpLoad %v4float %407 %409 = OpDot %float %390 %408 %410 = OpAccessChain %_ptr_Output_float %gl_ClipDistance %uint_4 OpStore %410 %409 %411 = OpAccessChain %_ptr_Uniform_v4float %clip_info %uint_0 %uint_5 %412 = OpLoad %v4float %411 %413 = OpDot %float %390 %412 %414 = OpAccessChain %_ptr_Output_float %gl_ClipDistance %uint_5 OpStore %414 %413 OpReturn OpFunctionEnd NIR: shader: MESA_SHADER_VERTEX inputs: 0 outputs: 0 uniforms: 52 shared: 0 decl_var ubo INTERP_MODE_NONE cbuffer_t c (429, 0, 0) decl_var ubo INTERP_MODE_NONE clip_info_t clip_info (429, 0, 1) decl_var shader_in INTERP_MODE_NONE vec4 in_Position0 (VERT_ATTRIB_GENERIC0.xyzw, 64, 0) decl_var shader_in INTERP_MODE_NONE vec4 in_Normal0 (VERT_ATTRIB_GENERIC1.xyzw, 68, 0) decl_var shader_in INTERP_MODE_NONE vec4 in_Binormal0 (VERT_ATTRIB_GENERIC2.xyzw, 72, 0) decl_var shader_in INTERP_MODE_NONE vec4 in_Tangent0 (VERT_ATTRIB_GENERIC3.xyzw, 76, 0) decl_var shader_in INTERP_MODE_NONE vec4 in_Texcoord0 (VERT_ATTRIB_GENERIC4.xyzw, 80, 0) decl_var shader_out INTERP_MODE_NONE vec4 oPos (VARYING_SLOT_POS.xyzw, 0, 0) decl_var shader_out INTERP_MODE_NONE float oPSize (VARYING_SLOT_PSIZ.x, 48, 0) decl_var shader_out INTERP_MODE_NONE float[6] @0 (VARYING_SLOT_CLIP_DIST0.x, 68, 0) compact decl_var shader_out INTERP_MODE_NONE float out_Texcoord0 (VARYING_SLOT_VAR0.x, 124, 0) decl_var shader_out INTERP_MODE_NONE float out_Texcoord0@1 (VARYING_SLOT_VAR0.y, 124, 0) decl_var shader_out INTERP_MODE_NONE float out_Texcoord0@2 (VARYING_SLOT_VAR0.z, 124, 0) decl_var shader_out INTERP_MODE_NONE float out_Texcoord0@3 (VARYING_SLOT_VAR0.w, 124, 0) decl_var shader_out INTERP_MODE_NONE float out_Texcoord1 (VARYING_SLOT_VAR2.x, 132, 0) decl_var shader_out INTERP_MODE_NONE float out_Texcoord1@4 (VARYING_SLOT_VAR2.y, 132, 0) decl_var shader_out INTERP_MODE_NONE float out_Texcoord1@5 (VARYING_SLOT_VAR2.z, 132, 0) decl_var shader_out INTERP_MODE_NONE float out_Texcoord1@6 (VARYING_SLOT_VAR2.w, 132, 0) decl_var shader_out INTERP_MODE_NONE float out_Texcoord2 (VARYING_SLOT_VAR1.x, 128, 0) decl_var shader_out INTERP_MODE_NONE float out_Texcoord2@7 (VARYING_SLOT_VAR1.y, 128, 0) decl_var shader_out INTERP_MODE_NONE float out_Texcoord2@8 (VARYING_SLOT_VAR1.z, 128, 0) decl_var shader_out INTERP_MODE_NONE float out_Texcoord2@9 (VARYING_SLOT_VAR1.w, 128, 0) decl_var shader_out INTERP_MODE_NONE float out_Texcoord3 (VARYING_SLOT_VAR3.x, 136, 0) decl_var shader_out INTERP_MODE_NONE float out_Texcoord3@10 (VARYING_SLOT_VAR3.y, 136, 0) decl_var shader_out INTERP_MODE_NONE float out_Texcoord3@11 (VARYING_SLOT_VAR3.z, 136, 0) decl_function main (0 params) impl main { block block_0: /* preds: */ vec1 32 ssa_0 = load_const (0x00000000 /* 0.000000 */) vec1 32 ssa_1 = intrinsic vulkan_resource_index (ssa_0) (0, 0, 6) /* desc-set=0 */ /* binding=0 */ /* desc_type=UBO */ vec4 32 ssa_2 = intrinsic load_ubo (ssa_1, ssa_0) (0, 4, 0) /* access=0 */ /* align_mul=4 */ /* align_offset=0 */ vec4 32 ssa_3 = intrinsic load_input (ssa_0) (64, 0, 160) /* base=64 */ /* component=0 */ /* type=float32 */ /* in_Position0 */ vec1 32 ssa_4 = fmul ssa_3.x, ssa_2.x vec1 32 ssa_5 = fmul ssa_3.y, ssa_2.y vec1 32 ssa_6 = fadd ssa_4, ssa_5 vec1 32 ssa_7 = fmul ssa_3.z, ssa_2.z vec1 32 ssa_8 = fadd ssa_6, ssa_7 vec1 32 ssa_9 = fadd ssa_8, ssa_2.w vec1 32 ssa_10 = load_const (0x00000010 /* 0.000000 */) vec4 32 ssa_11 = intrinsic load_ubo (ssa_1, ssa_10) (0, 16, 0) /* access=0 */ /* align_mul=16 */ /* align_offset=0 */ vec1 32 ssa_12 = fmul ssa_3.x, ssa_11.x vec1 32 ssa_13 = fmul ssa_3.y, ssa_11.y vec1 32 ssa_14 = fadd ssa_12, ssa_13 vec1 32 ssa_15 = fmul ssa_3.z, ssa_11.z vec1 32 ssa_16 = fadd ssa_14, ssa_15 vec1 32 ssa_17 = fadd ssa_16, ssa_11.w vec1 32 ssa_18 = load_const (0x00000020 /* 0.000000 */) vec4 32 ssa_19 = intrinsic load_ubo (ssa_1, ssa_18) (0, 32, 0) /* access=0 */ /* align_mul=32 */ /* align_offset=0 */ vec1 32 ssa_20 = fmul ssa_3.x, ssa_19.x vec1 32 ssa_21 = fmul ssa_3.y, ssa_19.y vec1 32 ssa_22 = fadd ssa_20, ssa_21 vec1 32 ssa_23 = fmul ssa_3.z, ssa_19.z vec1 32 ssa_24 = fadd ssa_22, ssa_23 vec1 32 ssa_25 = fadd ssa_24, ssa_19.w vec1 32 ssa_26 = load_const (0x000000a0 /* 0.000000 */) vec4 32 ssa_27 = intrinsic load_ubo (ssa_1, ssa_26) (0, 32, 0) /* access=0 */ /* align_mul=32 */ /* align_offset=0 */ vec1 32 ssa_28 = fmul ssa_9, ssa_27.x vec1 32 ssa_29 = fmul ssa_17, ssa_27.y vec1 32 ssa_30 = fadd ssa_28, ssa_29 vec1 32 ssa_31 = fmul ssa_25, ssa_27.z vec1 32 ssa_32 = fadd ssa_30, ssa_31 vec1 32 ssa_33 = fadd ssa_32, ssa_27.w vec1 32 ssa_34 = load_const (0x00000040 /* 0.000000 */) vec4 32 ssa_35 = intrinsic load_ubo (ssa_1, ssa_34) (0, 64, 0) /* access=0 */ /* align_mul=64 */ /* align_offset=0 */ vec1 32 ssa_36 = fmul ssa_9, ssa_35.x vec1 32 ssa_37 = fmul ssa_17, ssa_35.y vec1 32 ssa_38 = fadd ssa_36, ssa_37 vec1 32 ssa_39 = fmul ssa_25, ssa_35.z vec1 32 ssa_40 = fadd ssa_38, ssa_39 vec1 32 ssa_41 = fadd ssa_40, ssa_35.w vec1 32 ssa_42 = load_const (0x00000050 /* 0.000000 */) vec4 32 ssa_43 = intrinsic load_ubo (ssa_1, ssa_42) (0, 16, 0) /* access=0 */ /* align_mul=16 */ /* align_offset=0 */ vec1 32 ssa_44 = fmul ssa_9, ssa_43.x vec1 32 ssa_45 = fmul ssa_17, ssa_43.y vec1 32 ssa_46 = fadd ssa_44, ssa_45 vec1 32 ssa_47 = fmul ssa_25, ssa_43.z vec1 32 ssa_48 = fadd ssa_46, ssa_47 vec1 32 ssa_49 = fadd ssa_48, ssa_43.w vec1 32 ssa_50 = load_const (0x00000060 /* 0.000000 */) vec4 32 ssa_51 = intrinsic load_ubo (ssa_1, ssa_50) (0, 32, 0) /* access=0 */ /* align_mul=32 */ /* align_offset=0 */ vec1 32 ssa_52 = fmul ssa_9, ssa_51.x vec1 32 ssa_53 = fmul ssa_17, ssa_51.y vec1 32 ssa_54 = fadd ssa_52, ssa_53 vec1 32 ssa_55 = fmul ssa_25, ssa_51.z vec1 32 ssa_56 = fadd ssa_54, ssa_55 vec1 32 ssa_57 = fadd ssa_56, ssa_51.w vec1 32 ssa_58 = load_const (0x00000070 /* 0.000000 */) vec4 32 ssa_59 = intrinsic load_ubo (ssa_1, ssa_58) (0, 16, 0) /* access=0 */ /* align_mul=16 */ /* align_offset=0 */ vec1 32 ssa_60 = fmul ssa_9, ssa_59.x vec1 32 ssa_61 = fmul ssa_17, ssa_59.y vec1 32 ssa_62 = fadd ssa_60, ssa_61 vec1 32 ssa_63 = fmul ssa_25, ssa_59.z vec1 32 ssa_64 = fadd ssa_62, ssa_63 vec1 32 ssa_65 = fadd ssa_64, ssa_59.w vec1 32 ssa_66 = load_const (0x40000000 /* 2.000000 */) vec4 32 ssa_67 = intrinsic load_input (ssa_0) (68, 0, 160) /* base=68 */ /* component=0 */ /* type=float32 */ /* in_Normal0 */ vec1 32 ssa_68 = fmul ssa_67.x, ssa_66 vec1 32 ssa_69 = load_const (0xbf800000 /* -1.000000 */) vec1 32 ssa_70 = fadd ssa_68, ssa_69 vec1 32 ssa_71 = fmul ssa_67.y, ssa_66 vec1 32 ssa_72 = fadd ssa_71, ssa_69 vec1 32 ssa_73 = fmul ssa_67.z, ssa_66 vec1 32 ssa_74 = fadd ssa_73, ssa_69 vec1 32 ssa_75 = fmul ssa_70, ssa_2.x vec1 32 ssa_76 = fmul ssa_72, ssa_2.y vec1 32 ssa_77 = fadd ssa_75, ssa_76 vec1 32 ssa_78 = fmul ssa_74, ssa_2.z vec1 32 ssa_79 = fadd ssa_77, ssa_78 vec1 32 ssa_80 = fmul ssa_70, ssa_11.x vec1 32 ssa_81 = fmul ssa_72, ssa_11.y vec1 32 ssa_82 = fadd ssa_80, ssa_81 vec1 32 ssa_83 = fmul ssa_74, ssa_11.z vec1 32 ssa_84 = fadd ssa_82, ssa_83 vec1 32 ssa_85 = fmul ssa_70, ssa_19.x vec1 32 ssa_86 = fmul ssa_72, ssa_19.y vec1 32 ssa_87 = fadd ssa_85, ssa_86 vec1 32 ssa_88 = fmul ssa_74, ssa_19.z vec1 32 ssa_89 = fadd ssa_87, ssa_88 vec1 32 ssa_90 = fmul ssa_79, ssa_79 vec1 32 ssa_91 = fmul ssa_84, ssa_84 vec1 32 ssa_92 = fadd ssa_90, ssa_91 vec1 32 ssa_93 = fmul ssa_89, ssa_89 vec1 32 ssa_94 = fadd ssa_92, ssa_93 vec1 32 ssa_95 = frsq ssa_94 vec1 32 ssa_96 = load_const (0x7f7fffff /* 340282346638528859811704183484516925440.000000 */) vec1 32 ssa_97 = fmin ssa_95, ssa_96 vec1 32 ssa_98 = fmul ssa_79, ssa_97 vec1 32 ssa_99 = fmul ssa_84, ssa_97 vec1 32 ssa_100 = fmul ssa_89, ssa_97 vec4 32 ssa_101 = intrinsic load_input (ssa_0) (72, 0, 160) /* base=72 */ /* component=0 */ /* type=float32 */ /* in_Binormal0 */ vec1 32 ssa_102 = fmul ssa_101.x, ssa_66 vec1 32 ssa_103 = fadd ssa_102, ssa_69 vec1 32 ssa_104 = fmul ssa_101.y, ssa_66 vec1 32 ssa_105 = fadd ssa_104, ssa_69 vec1 32 ssa_106 = fmul ssa_101.z, ssa_66 vec1 32 ssa_107 = fadd ssa_106, ssa_69 vec1 32 ssa_108 = fmul ssa_103, ssa_2.x vec1 32 ssa_109 = fmul ssa_105, ssa_2.y vec1 32 ssa_110 = fadd ssa_108, ssa_109 vec1 32 ssa_111 = fmul ssa_107, ssa_2.z vec1 32 ssa_112 = fadd ssa_110, ssa_111 vec1 32 ssa_113 = fmul ssa_103, ssa_11.x vec1 32 ssa_114 = fmul ssa_105, ssa_11.y vec1 32 ssa_115 = fadd ssa_113, ssa_114 vec1 32 ssa_116 = fmul ssa_107, ssa_11.z vec1 32 ssa_117 = fadd ssa_115, ssa_116 vec1 32 ssa_118 = fmul ssa_103, ssa_19.x vec1 32 ssa_119 = fmul ssa_105, ssa_19.y vec1 32 ssa_120 = fadd ssa_118, ssa_119 vec1 32 ssa_121 = fmul ssa_107, ssa_19.z vec1 32 ssa_122 = fadd ssa_120, ssa_121 vec1 32 ssa_123 = fmul ssa_112, ssa_112 vec1 32 ssa_124 = fmul ssa_117, ssa_117 vec1 32 ssa_125 = fadd ssa_123, ssa_124 vec1 32 ssa_126 = fmul ssa_122, ssa_122 vec1 32 ssa_127 = fadd ssa_125, ssa_126 vec1 32 ssa_128 = frsq ssa_127 vec1 32 ssa_129 = fmin ssa_128, ssa_96 vec1 32 ssa_130 = fmul ssa_112, ssa_129 vec1 32 ssa_131 = fmul ssa_117, ssa_129 vec1 32 ssa_132 = fmul ssa_122, ssa_129 vec4 32 ssa_133 = intrinsic load_input (ssa_0) (76, 0, 160) /* base=76 */ /* component=0 */ /* type=float32 */ /* in_Tangent0 */ vec1 32 ssa_134 = fmul ssa_133.x, ssa_66 vec1 32 ssa_135 = fadd ssa_134, ssa_69 vec1 32 ssa_136 = fmul ssa_133.y, ssa_66 vec1 32 ssa_137 = fadd ssa_136, ssa_69 vec1 32 ssa_138 = fmul ssa_133.z, ssa_66 vec1 32 ssa_139 = fadd ssa_138, ssa_69 vec1 32 ssa_140 = fmul ssa_135, ssa_2.x vec1 32 ssa_141 = fmul ssa_137, ssa_2.y vec1 32 ssa_142 = fadd ssa_140, ssa_141 vec1 32 ssa_143 = fmul ssa_139, ssa_2.z vec1 32 ssa_144 = fadd ssa_142, ssa_143 vec1 32 ssa_145 = fmul ssa_135, ssa_11.x vec1 32 ssa_146 = fmul ssa_137, ssa_11.y vec1 32 ssa_147 = fadd ssa_145, ssa_146 vec1 32 ssa_148 = fmul ssa_139, ssa_11.z vec1 32 ssa_149 = fadd ssa_147, ssa_148 vec1 32 ssa_150 = fmul ssa_135, ssa_19.x vec1 32 ssa_151 = fmul ssa_137, ssa_19.y vec1 32 ssa_152 = fadd ssa_150, ssa_151 vec1 32 ssa_153 = fmul ssa_139, ssa_19.z vec1 32 ssa_154 = fadd ssa_152, ssa_153 vec1 32 ssa_155 = fmul ssa_144, ssa_144 vec1 32 ssa_156 = fmul ssa_149, ssa_149 vec1 32 ssa_157 = fadd ssa_155, ssa_156 vec1 32 ssa_158 = fmul ssa_154, ssa_154 vec1 32 ssa_159 = fadd ssa_157, ssa_158 vec1 32 ssa_160 = frsq ssa_159 vec1 32 ssa_161 = fmin ssa_160, ssa_96 vec1 32 ssa_162 = fmul ssa_144, ssa_161 vec1 32 ssa_163 = fmul ssa_149, ssa_161 vec1 32 ssa_164 = fmul ssa_154, ssa_161 vec1 32 ssa_165 = load_const (0x0000001c /* 0.000000 */) vec3 32 ssa_166 = intrinsic load_push_constant (ssa_165) (0, 52) /* base=0 */ /* range=52 */ vec1 32 ssa_167 = fmax ssa_166.x, ssa_166.y vec1 32 ssa_168 = fmin ssa_167, ssa_166.z vec1 32 ssa_169 = intrinsic vulkan_resource_index (ssa_0) (0, 1, 6) /* desc-set=0 */ /* binding=1 */ /* desc_type=UBO */ vec4 32 ssa_170 = intrinsic load_ubo (ssa_169, ssa_0) (0, 4, 0) /* access=0 */ /* align_mul=4 */ /* align_offset=0 */ vec1 32 ssa_171 = fmul ssa_41, ssa_170.x vec1 32 ssa_172 = fmul ssa_49, ssa_170.y vec1 32 ssa_173 = fadd ssa_171, ssa_172 vec1 32 ssa_174 = fmul ssa_57, ssa_170.z vec1 32 ssa_175 = fadd ssa_173, ssa_174 vec1 32 ssa_176 = fmul ssa_65, ssa_170.w vec1 32 ssa_177 = fadd ssa_175, ssa_176 vec4 32 ssa_178 = intrinsic load_ubo (ssa_169, ssa_10) (0, 16, 0) /* access=0 */ /* align_mul=16 */ /* align_offset=0 */ vec1 32 ssa_179 = fmul ssa_41, ssa_178.x vec1 32 ssa_180 = fmul ssa_49, ssa_178.y vec1 32 ssa_181 = fadd ssa_179, ssa_180 vec1 32 ssa_182 = fmul ssa_57, ssa_178.z vec1 32 ssa_183 = fadd ssa_181, ssa_182 vec1 32 ssa_184 = fmul ssa_65, ssa_178.w vec1 32 ssa_185 = fadd ssa_183, ssa_184 vec4 32 ssa_186 = intrinsic load_ubo (ssa_169, ssa_18) (0, 32, 0) /* access=0 */ /* align_mul=32 */ /* align_offset=0 */ vec1 32 ssa_187 = fmul ssa_41, ssa_186.x vec1 32 ssa_188 = fmul ssa_49, ssa_186.y vec1 32 ssa_189 = fadd ssa_187, ssa_188 vec1 32 ssa_190 = fmul ssa_57, ssa_186.z vec1 32 ssa_191 = fadd ssa_189, ssa_190 vec1 32 ssa_192 = fmul ssa_65, ssa_186.w vec1 32 ssa_193 = fadd ssa_191, ssa_192 vec1 32 ssa_194 = load_const (0x00000030 /* 0.000000 */) vec4 32 ssa_195 = intrinsic load_ubo (ssa_169, ssa_194) (0, 16, 0) /* access=0 */ /* align_mul=16 */ /* align_offset=0 */ vec1 32 ssa_196 = fmul ssa_41, ssa_195.x vec1 32 ssa_197 = fmul ssa_49, ssa_195.y vec1 32 ssa_198 = fadd ssa_196, ssa_197 vec1 32 ssa_199 = fmul ssa_57, ssa_195.z vec1 32 ssa_200 = fadd ssa_198, ssa_199 vec1 32 ssa_201 = fmul ssa_65, ssa_195.w vec1 32 ssa_202 = fadd ssa_200, ssa_201 vec4 32 ssa_203 = intrinsic load_ubo (ssa_169, ssa_34) (0, 64, 0) /* access=0 */ /* align_mul=64 */ /* align_offset=0 */ vec1 32 ssa_204 = fmul ssa_41, ssa_203.x vec1 32 ssa_205 = fmul ssa_49, ssa_203.y vec1 32 ssa_206 = fadd ssa_204, ssa_205 vec1 32 ssa_207 = fmul ssa_57, ssa_203.z vec1 32 ssa_208 = fadd ssa_206, ssa_207 vec1 32 ssa_209 = fmul ssa_65, ssa_203.w vec1 32 ssa_210 = fadd ssa_208, ssa_209 vec4 32 ssa_211 = intrinsic load_ubo (ssa_169, ssa_42) (0, 16, 0) /* access=0 */ /* align_mul=16 */ /* align_offset=0 */ vec1 32 ssa_212 = fmul ssa_41, ssa_211.x vec1 32 ssa_213 = fmul ssa_49, ssa_211.y vec1 32 ssa_214 = fadd ssa_212, ssa_213 vec1 32 ssa_215 = fmul ssa_57, ssa_211.z vec1 32 ssa_216 = fadd ssa_214, ssa_215 vec1 32 ssa_217 = fmul ssa_65, ssa_211.w vec1 32 ssa_218 = fadd ssa_216, ssa_217 vec4 32 ssa_219 = vec4 ssa_41, ssa_49, ssa_57, ssa_65 intrinsic store_output (ssa_219, ssa_0) (0, 15, 0, 160) /* base=0 */ /* wrmask=xyzw */ /* component=0 */ /* type=float32 */ /* oPos */ vec4 32 ssa_220 = intrinsic load_input (ssa_0) (80, 0, 160) /* base=80 */ /* component=0 */ /* type=float32 */ /* in_Texcoord0 */ vec1 32 ssa_221 = mov ssa_220.x intrinsic store_output (ssa_221, ssa_0) (124, 1, 0, 160) /* base=124 */ /* wrmask=x */ /* component=0 */ /* type=float32 */ /* out_Texcoord0 */ vec1 32 ssa_222 = mov ssa_220.y intrinsic store_output (ssa_222, ssa_0) (124, 1, 1, 160) /* base=124 */ /* wrmask=x */ /* component=1 */ /* type=float32 */ /* out_Texcoord0 */ vec1 32 ssa_223 = load_const (0x00000290 /* 0.000000 */) vec4 32 ssa_224 = intrinsic load_ubo (ssa_1, ssa_223) (0, 16, 0) /* access=0 */ /* align_mul=16 */ /* align_offset=0 */ vec1 32 ssa_225 = mov ssa_224.x intrinsic store_output (ssa_225, ssa_0) (124, 1, 2, 160) /* base=124 */ /* wrmask=x */ /* component=2 */ /* type=float32 */ /* out_Texcoord0 */ vec1 32 ssa_226 = mov ssa_224.y intrinsic store_output (ssa_226, ssa_0) (124, 1, 3, 160) /* base=124 */ /* wrmask=x */ /* component=3 */ /* type=float32 */ /* out_Texcoord0 */ intrinsic store_output (ssa_98, ssa_0) (132, 1, 0, 160) /* base=132 */ /* wrmask=x */ /* component=0 */ /* type=float32 */ /* out_Texcoord1 */ intrinsic store_output (ssa_99, ssa_0) (132, 1, 1, 160) /* base=132 */ /* wrmask=x */ /* component=1 */ /* type=float32 */ /* out_Texcoord1 */ intrinsic store_output (ssa_100, ssa_0) (132, 1, 2, 160) /* base=132 */ /* wrmask=x */ /* component=2 */ /* type=float32 */ /* out_Texcoord1 */ vec1 32 ssa_227 = mov ssa_224.z intrinsic store_output (ssa_227, ssa_0) (132, 1, 3, 160) /* base=132 */ /* wrmask=x */ /* component=3 */ /* type=float32 */ /* out_Texcoord1 */ intrinsic store_output (ssa_162, ssa_0) (128, 1, 0, 160) /* base=128 */ /* wrmask=x */ /* component=0 */ /* type=float32 */ /* out_Texcoord2 */ intrinsic store_output (ssa_163, ssa_0) (128, 1, 1, 160) /* base=128 */ /* wrmask=x */ /* component=1 */ /* type=float32 */ /* out_Texcoord2 */ intrinsic store_output (ssa_164, ssa_0) (128, 1, 2, 160) /* base=128 */ /* wrmask=x */ /* component=2 */ /* type=float32 */ /* out_Texcoord2 */ intrinsic store_output (ssa_33, ssa_0) (128, 1, 3, 160) /* base=128 */ /* wrmask=x */ /* component=3 */ /* type=float32 */ /* out_Texcoord2 */ intrinsic store_output (ssa_130, ssa_0) (136, 1, 0, 160) /* base=136 */ /* wrmask=x */ /* component=0 */ /* type=float32 */ /* out_Texcoord3 */ intrinsic store_output (ssa_131, ssa_0) (136, 1, 1, 160) /* base=136 */ /* wrmask=x */ /* component=1 */ /* type=float32 */ /* out_Texcoord3 */ intrinsic store_output (ssa_132, ssa_0) (136, 1, 2, 160) /* base=136 */ /* wrmask=x */ /* component=2 */ /* type=float32 */ /* out_Texcoord3 */ intrinsic store_output (ssa_168, ssa_0) (48, 1, 0, 160) /* base=48 */ /* wrmask=x */ /* component=0 */ /* type=float32 */ /* oPSize */ intrinsic store_output (ssa_177, ssa_0) (68, 1, 0, 160) /* base=68 */ /* wrmask=x */ /* component=0 */ /* type=float32 */ intrinsic store_output (ssa_185, ssa_0) (68, 1, 1, 160) /* base=68 */ /* wrmask=x */ /* component=1 */ /* type=float32 */ intrinsic store_output (ssa_193, ssa_0) (68, 1, 2, 160) /* base=68 */ /* wrmask=x */ /* component=2 */ /* type=float32 */ intrinsic store_output (ssa_202, ssa_0) (68, 1, 3, 160) /* base=68 */ /* wrmask=x */ /* component=3 */ /* type=float32 */ vec1 32 ssa_228 = load_const (0x00000001 /* 0.000000 */) intrinsic store_output (ssa_210, ssa_228) (68, 1, 0, 160) /* base=68 */ /* wrmask=x */ /* component=0 */ /* type=float32 */ intrinsic store_output (ssa_218, ssa_228) (68, 1, 1, 160) /* base=68 */ /* wrmask=x */ /* component=1 */ /* type=float32 */ /* succs: block_1 */ block block_1: } LLVM IR: BB0 /* logical preds: / linear preds: / kind: uniform, top-level, */ s2: %230:s[0-1], s1: %231:s[2], s1: %232:s[3], s1: %233:s[4], s1: %234:s[5], s1: %235:s[6], s1: %236:s[7], s1: %237:s[8], s1: %238:s[9], s1: %239:s[10], v1: %240:v[0], v1: %241:v[1], v1: %242:v[2], v1: %243:v[3], s2: %244:exec = p_startpgm p_logical_start s2: %253 = p_create_vector %236, 0xffff8000 s4: %254 = s_load_dwordx4 %253, 0 reorder v1: %255 = v_add_u32 %237, %240 v3: %256 = tbuffer_load_format_xyz %255, %254, 0 dfmt:32_32_32 nfmt:float idxen reorder v3: %309 = tbuffer_load_format_xyz %255, %254, 0 dfmt:8_8_8_8 nfmt:unorm offset:12 idxen reorder v3: %320 = tbuffer_load_format_xyz %255, %254, 0 dfmt:8_8_8_8 nfmt:unorm offset:32 idxen reorder v3: %331 = tbuffer_load_format_xyz %255, %254, 0 dfmt:8_8_8_8 nfmt:unorm offset:28 idxen reorder v2: %381 = tbuffer_load_format_xy %255, %254, 0 dfmt:32_32 nfmt:float offset:20 idxen reorder s1: %246, s1: %245:scc = s_add_i32 48, %232 s2: %247 = p_create_vector %246, 0xffff8000 s4: %248 = s_load_dwordx4 %247, 0 reorder s4: %3 = s_buffer_load_dwordx4 %248, 0 s4: %12 = s_buffer_load_dwordx4 %248, 16 s4: %20 = s_buffer_load_dwordx4 %248, 32 s4: %28 = s_buffer_load_dwordx4 %248, 0xa0 s4: %36 = s_buffer_load_dwordx4 %248, 64 s4: %44 = s_buffer_load_dwordx4 %248, 0x50 s4: %52 = s_buffer_load_dwordx4 %248, 0x60 s4: %60 = s_buffer_load_dwordx4 %248, 0x70 v1: %168 = v_max_f32 %233, %234 v1: %169 = v_min_f32 %235, %168 s1: %341, s1: %340:scc = s_add_i32 64, %232 s2: %342 = p_create_vector %341, 0xffff8000 s4: %343 = s_load_dwordx4 %342, 0 reorder s4: %171 = s_buffer_load_dwordx4 %343, 0 s4: %179 = s_buffer_load_dwordx4 %343, 16 s4: %187 = s_buffer_load_dwordx4 %343, 32 s4: %196 = s_buffer_load_dwordx4 %343, 48 s4: %204 = s_buffer_load_dwordx4 %343, 64 s4: %212 = s_buffer_load_dwordx4 %343, 0x50 s4: %225 = s_buffer_load_dwordx4 %248, 0x290 s1: %249, s1: %250, s1: %251, s1: %252 = p_split_vector %3 v1: %257, v1: %258, v1: %259 = p_split_vector %256 s1: %266, s1: %267, s1: %268, s1: %269 = p_split_vector %12 v1: %6 = v_mul_f32 %250, %258 s1: %272, s1: %273, s1: %274, s1: %275 = p_split_vector %20 v1: %7 = v_mad_f32 %249, %257, %6 s1: %278, s1: %279, s1: %280, s1: %281 = p_split_vector %28 v1: %9 = v_mad_f32 %251, %259, %7 s1: %284, s1: %285, s1: %286, s1: %287 = p_split_vector %36 v1: %10 = v_add_f32 %252, %9 s1: %290, s1: %291, s1: %292, s1: %293 = p_split_vector %44 v1: %14 = v_mul_f32 %267, %258 s1: %296, s1: %297, s1: %298, s1: %299 = p_split_vector %52 v1: %15 = v_mad_f32 %266, %257, %14 s1: %302, s1: %303, s1: %304, s1: %305 = p_split_vector %60 v1: %17 = v_mad_f32 %268, %259, %15 v1: %18 = v_add_f32 %269, %17 v1: %22 = v_mul_f32 %273, %258 v1: %23 = v_mad_f32 %272, %257, %22 v1: %25 = v_mad_f32 %274, %259, %23 v1: %26 = v_add_f32 %275, %25 v1: %30 = v_mul_f32 %279, %18 v1: %31 = v_mad_f32 %278, %10, %30 v1: %33 = v_mad_f32 %280, %26, %31 s1: %344, s1: %345, s1: %346, s1: %347 = p_split_vector %171 s1: %350, s1: %351, s1: %352, s1: %353 = p_split_vector %179 v1: %38 = v_mul_f32 %285, %18 s1: %356, s1: %357, s1: %358, s1: %359 = p_split_vector %187 v1: %39 = v_mad_f32 %284, %10, %38 s1: %362, s1: %363, s1: %364, s1: %365 = p_split_vector %196 v1: %41 = v_mad_f32 %286, %26, %39 s1: %368, s1: %369, s1: %370, s1: %371 = p_split_vector %204 v1: %42 = v_add_f32 %287, %41 s1: %374, s1: %375, s1: %376, s1: %377 = p_split_vector %212 v1: %46 = v_mul_f32 %291, %18 v1: %47 = v_mad_f32 %290, %10, %46 v1: %49 = v_mad_f32 %292, %26, %47 v1: %50 = v_add_f32 %293, %49 v1: %54 = v_mul_f32 %297, %18 v1: %55 = v_mad_f32 %296, %10, %54 v1: %57 = v_mad_f32 %298, %26, %55 v1: %58 = v_add_f32 %299, %57 v1: %62 = v_mul_f32 %303, %18 v1: %63 = v_mad_f32 %302, %10, %62 v1: %65 = v_mad_f32 %304, %26, %63 v1: %66 = v_add_f32 %305, %65 v1: %173 = v_mul_f32 %345, %50 v1: %174 = v_mad_f32 %344, %42, %173 v1: %176 = v_mad_f32 %346, %58, %174 v1: %178 = v_mad_f32 %347, %66, %176 v1: %181 = v_mul_f32 %351, %50 v1: %182 = v_mad_f32 %350, %42, %181 v1: %184 = v_mad_f32 %352, %58, %182 v1: %186 = v_mad_f32 %353, %66, %184 v1: %189 = v_mul_f32 %357, %50 v1: %190 = v_mad_f32 %356, %42, %189 v1: %192 = v_mad_f32 %358, %58, %190 v1: %194 = v_mad_f32 %359, %66, %192 v1: %198 = v_mul_f32 %363, %50 v1: %199 = v_mad_f32 %362, %42, %198 v1: %201 = v_mad_f32 %364, %58, %199 v1: %203 = v_mad_f32 %365, %66, %201 v1: %206 = v_mul_f32 %369, %50 v1: %207 = v_mad_f32 %368, %42, %206 v1: %209 = v_mad_f32 %370, %58, %207 v1: %211 = v_mad_f32 %371, %66, %209 v1: %214 = v_mul_f32 %375, %50 v1: %215 = v_mad_f32 %374, %42, %214 v1: %217 = v_mad_f32 %376, %58, %215 v1: %219 = v_mad_f32 %377, %66, %217 exp %42, %50, %58, %66 vm pos0 exp %169, v1: undef, v1: undef, v1: undef en:r*** pos1 exp %178, %186, %194, %203 pos2 exp %211, %219, v1: undef, v1: undef en:rg** pos3 v1: %34 = v_add_f32 %281, %33 s1: %390, s1: %391, s1: %392, s1: %393 = p_split_vector %225 v1: %394 = v_mov_b32 %390 v1: %395 = v_mov_b32 %391 v1: %396 = v_mov_b32 %392 v1: %310, v1: %311, v1: %312 = p_split_vector %309 v1: %71 = v_mad_f32 2.0, %310, -1.0 v1: %73 = v_mad_f32 2.0, %311, -1.0 v1: %75 = v_mad_f32 2.0, %312, -1.0 v1: %77 = v_mul_f32 %250, %73 v1: %78 = v_mad_f32 %249, %71, %77 v1: %80 = v_mad_f32 %251, %75, %78 v1: %82 = v_mul_f32 %267, %73 v1: %83 = v_mad_f32 %266, %71, %82 v1: %85 = v_mad_f32 %268, %75, %83 v1: %87 = v_mul_f32 %273, %73 v1: %88 = v_mad_f32 %272, %71, %87 v1: %90 = v_mad_f32 %274, %75, %88 v1: %92 = v_mul_f32 %85, %85 v1: %93 = v_mad_f32 %80, %80, %92 v1: %95 = v_mad_f32 %90, %90, %93 v1: %96 = v_rsq_f32 %95 v1: %98 = v_min_f32 0x7f7fffff, %96 v1: %99 = v_mul_f32 %80, %98 v1: %100 = v_mul_f32 %85, %98 v1: %101 = v_mul_f32 %90, %98 v1: %321, v1: %322, v1: %323 = p_split_vector %320 v1: %104 = v_mad_f32 2.0, %321, -1.0 v1: %106 = v_mad_f32 2.0, %322, -1.0 v1: %108 = v_mad_f32 2.0, %323, -1.0 v1: %110 = v_mul_f32 %250, %106 v1: %111 = v_mad_f32 %249, %104, %110 v1: %113 = v_mad_f32 %251, %108, %111 v1: %115 = v_mul_f32 %267, %106 v1: %116 = v_mad_f32 %266, %104, %115 v1: %118 = v_mad_f32 %268, %108, %116 v1: %120 = v_mul_f32 %273, %106 v1: %121 = v_mad_f32 %272, %104, %120 v1: %123 = v_mad_f32 %274, %108, %121 v1: %125 = v_mul_f32 %118, %118 v1: %126 = v_mad_f32 %113, %113, %125 v1: %128 = v_mad_f32 %123, %123, %126 v1: %129 = v_rsq_f32 %128 v1: %130 = v_min_f32 0x7f7fffff, %129 v1: %131 = v_mul_f32 %113, %130 v1: %132 = v_mul_f32 %118, %130 v1: %133 = v_mul_f32 %123, %130 v1: %332, v1: %333, v1: %334 = p_split_vector %331 v1: %136 = v_mad_f32 2.0, %332, -1.0 v1: %138 = v_mad_f32 2.0, %333, -1.0 v1: %140 = v_mad_f32 2.0, %334, -1.0 v1: %142 = v_mul_f32 %250, %138 v1: %143 = v_mad_f32 %249, %136, %142 v1: %145 = v_mad_f32 %251, %140, %143 v1: %147 = v_mul_f32 %267, %138 v1: %148 = v_mad_f32 %266, %136, %147 v1: %150 = v_mad_f32 %268, %140, %148 v1: %152 = v_mul_f32 %273, %138 v1: %153 = v_mad_f32 %272, %136, %152 v1: %155 = v_mad_f32 %274, %140, %153 v1: %157 = v_mul_f32 %150, %150 v1: %158 = v_mad_f32 %145, %145, %157 v1: %160 = v_mad_f32 %155, %155, %158 v1: %161 = v_rsq_f32 %160 v1: %162 = v_min_f32 0x7f7fffff, %161 v1: %163 = v_mul_f32 %145, %162 v1: %164 = v_mul_f32 %150, %162 v1: %165 = v_mul_f32 %155, %162 v1: %382, v1: %383 = p_split_vector %381 exp %382, %383, %394, %395 param0 exp %163, %164, %165, %34 param2 exp %99, %100, %101, %396 param1 exp %131, %132, %133, v1: undef en:rgb* param3 p_logical_end s_endpgm DISASM: BB0: s_mov_b32 s0, s7 ; be800307 s_movk_i32 s1, 0x8000 ; b0018000 s_load_dwordx4 s[12:15], s[0:1], 0x0 ; f4080300 fa000000 v_add_nc_u32_e32 v0, s8, v0 ; 4a000008 s_waitcnt lgkmcnt(0) ; bf8cc07f tbuffer_load_format_xyz v[1:3], v0, s[12:15], format:74, 0 idxen ; ea522000 80030100 tbuffer_load_format_xyz v[4:6], v0, s[12:15], format:56, 0 idxen offset:12 ; e9c2200c 80030400 tbuffer_load_format_xyz v[7:9], v0, s[12:15], format:56, 0 idxen offset:32 ; e9c22020 80030700 tbuffer_load_format_xyz v[10:12], v0, s[12:15], format:56, 0 idxen offset:28 ; e9c2201c 80030a00 tbuffer_load_format_xy v[13:14], v0, s[12:15], format:64, 0 idxen offset:20 ; ea012014 80030d00 s_add_i32 s0, 48, s3 ; 810003b0 s_movk_i32 s1, 0x8000 ; b0018000 s_load_dwordx4 s[8:11], s[0:1], 0x0 ; f4080200 fa000000 s_waitcnt lgkmcnt(0) ; bf8cc07f v_nop ; 7e000000 s_buffer_load_dwordx4 s[12:15], s[8:11], 0x0 ; f4280304 fa000000 s_buffer_load_dwordx4 s[16:19], s[8:11], 0x10 ; f4280404 fa000010 s_buffer_load_dwordx4 s[20:23], s[8:11], 0x20 ; f4280504 fa000020 s_buffer_load_dwordx4 s[24:27], s[8:11], 0xa0 ; f4280604 fa0000a0 s_buffer_load_dwordx4 s[28:31], s[8:11], 0x40 ; f4280704 fa000040 s_buffer_load_dwordx4 s[32:35], s[8:11], 0x50 ; f4280804 fa000050 s_buffer_load_dwordx4 s[36:39], s[8:11], 0x60 ; f4280904 fa000060 s_buffer_load_dwordx4 s[40:43], s[8:11], 0x70 ; f4280a04 fa000070 v_max_f32_e64 v0, s4, s5 ; d5100000 00000a04 v_min_f32_e32 v0, s6, v0 ; 1e000006 s_add_i32 s0, 64, s3 ; 810003c0 s_movk_i32 s1, 0x8000 ; b0018000 s_load_dwordx4 s[0:3], s[0:1], 0x0 ; f4080000 fa000000 s_waitcnt lgkmcnt(0) ; bf8cc07f s_buffer_load_dwordx4 s[4:7], s[0:3], 0x0 ; f4280100 fa000000 s_buffer_load_dwordx4 s[44:47], s[0:3], 0x10 ; f4280b00 fa000010 s_buffer_load_dwordx4 s[48:51], s[0:3], 0x20 ; f4280c00 fa000020 s_buffer_load_dwordx4 s[52:55], s[0:3], 0x30 ; f4280d00 fa000030 s_buffer_load_dwordx4 s[56:59], s[0:3], 0x40 ; f4280e00 fa000040 s_buffer_load_dwordx4 s[0:3], s[0:3], 0x50 ; f4280000 fa000050 s_buffer_load_dwordx4 s[8:11], s[8:11], 0x290 ; f4280204 fa000290 s_waitcnt vmcnt(4) ; bf8c3f74 v_mul_f32_e32 v15, s13, v2 ; 101e040d v_mac_f32_e32 v15, s12, v1 ; 3e1e020c v_mac_f32_e32 v15, s14, v3 ; 3e1e060e v_add_f32_e32 v15, s15, v15 ; 061e1e0f v_mul_f32_e32 v16, s17, v2 ; 10200411 v_mac_f32_e32 v16, s16, v1 ; 3e200210 v_mac_f32_e32 v16, s18, v3 ; 3e200612 v_add_f32_e32 v16, s19, v16 ; 06202013 v_mul_f32_e32 v2, s21, v2 ; 10040415 v_mac_f32_e32 v2, s20, v1 ; 3e040214 v_mac_f32_e32 v2, s22, v3 ; 3e040616 v_add_f32_e32 v1, s23, v2 ; 06020417 v_mul_f32_e32 v2, s25, v16 ; 10042019 v_mac_f32_e32 v2, s24, v15 ; 3e041e18 v_mac_f32_e32 v2, s26, v1 ; 3e04021a v_mul_f32_e32 v3, s29, v16 ; 1006201d v_mac_f32_e32 v3, s28, v15 ; 3e061e1c v_mac_f32_e32 v3, s30, v1 ; 3e06021e v_add_f32_e32 v3, s31, v3 ; 0606061f v_mul_f32_e32 v17, s33, v16 ; 10222021 v_mac_f32_e32 v17, s32, v15 ; 3e221e20 v_mac_f32_e32 v17, s34, v1 ; 3e220222 v_add_f32_e32 v17, s35, v17 ; 06222223 v_mul_f32_e32 v18, s37, v16 ; 10242025 v_mac_f32_e32 v18, s36, v15 ; 3e241e24 v_mac_f32_e32 v18, s38, v1 ; 3e240226 v_add_f32_e32 v18, s39, v18 ; 06242427 v_mul_f32_e32 v16, s41, v16 ; 10202029 v_mac_f32_e32 v16, s40, v15 ; 3e201e28 v_mac_f32_e32 v16, s42, v1 ; 3e20022a v_add_f32_e32 v1, s43, v16 ; 0602202b s_waitcnt lgkmcnt(0) ; bf8cc07f v_mul_f32_e32 v15, s5, v17 ; 101e2205 v_mac_f32_e32 v15, s4, v3 ; 3e1e0604 v_mac_f32_e32 v15, s6, v18 ; 3e1e2406 v_mac_f32_e32 v15, s7, v1 ; 3e1e0207 v_mul_f32_e32 v16, s45, v17 ; 1020222d v_mac_f32_e32 v16, s44, v3 ; 3e20062c v_mac_f32_e32 v16, s46, v18 ; 3e20242e v_mac_f32_e32 v16, s47, v1 ; 3e20022f v_mul_f32_e32 v19, s49, v17 ; 10262231 v_mac_f32_e32 v19, s48, v3 ; 3e260630 v_mac_f32_e32 v19, s50, v18 ; 3e262432 v_mac_f32_e32 v19, s51, v1 ; 3e260233 v_mul_f32_e32 v20, s53, v17 ; 10282235 v_mac_f32_e32 v20, s52, v3 ; 3e280634 v_mac_f32_e32 v20, s54, v18 ; 3e282436 v_mac_f32_e32 v20, s55, v1 ; 3e280237 v_mul_f32_e32 v21, s57, v17 ; 102a2239 v_mac_f32_e32 v21, s56, v3 ; 3e2a0638 v_mac_f32_e32 v21, s58, v18 ; 3e2a243a v_mac_f32_e32 v21, s59, v1 ; 3e2a023b v_mul_f32_e32 v22, s1, v17 ; 102c2201 v_mac_f32_e32 v22, s0, v3 ; 3e2c0600 v_mac_f32_e32 v22, s2, v18 ; 3e2c2402 v_mac_f32_e32 v22, s3, v1 ; 3e2c0203 exp pos0 v3, v17, v18, v1 vm ; f80010cf 01121103 exp pos1 v0, off, off, off ; f80000d1 80808000 exp pos2 v15, v16, v19, v20 ; f80000ef 1413100f exp pos3 v21, v22, off, off done ; f80008f3 80801615 v_add_f32_e32 v2, s27, v2 ; 0604041b v_mov_b32_e32 v23, s8 ; 7e2e0208 s_waitcnt expcnt(2) ; bf8cff2f v_mov_b32_e32 v0, s9 ; 7e000209 v_mov_b32_e32 v1, s10 ; 7e02020a s_waitcnt vmcnt(3) ; bf8c3f73 v_mad_f32 v4, 2.0, v4, -1.0 ; d5410004 03ce08f4 v_mad_f32 v5, 2.0, v5, -1.0 ; d5410005 03ce0af4 v_mad_f32 v6, 2.0, v6, -1.0 ; d5410006 03ce0cf4 v_mul_f32_e32 v3, s13, v5 ; 10060a0d v_mac_f32_e32 v3, s12, v4 ; 3e06080c v_mac_f32_e32 v3, s14, v6 ; 3e060c0e s_waitcnt expcnt(1) ; bf8cff1f v_mul_f32_e32 v15, s17, v5 ; 101e0a11 v_mac_f32_e32 v15, s16, v4 ; 3e1e0810 v_mac_f32_e32 v15, s18, v6 ; 3e1e0c12 v_mul_f32_e32 v5, s21, v5 ; 100a0a15 v_mac_f32_e32 v5, s20, v4 ; 3e0a0814 v_mac_f32_e32 v5, s22, v6 ; 3e0a0c16 v_mul_f32_e32 v4, v15, v15 ; 10081f0f v_mac_f32_e32 v4, v3, v3 ; 3e080703 v_mac_f32_e32 v4, v5, v5 ; 3e080b05 v_rsq_f32_e32 v4, v4 ; 7e085d04 v_min_f32_e32 v4, 0x7f7fffff, v4 ; 1e0808ff 7f7fffff v_mul_f32_e32 v6, v3, v4 ; 100c0903 v_mul_f32_e32 v15, v15, v4 ; 101e090f v_mul_f32_e32 v4, v5, v4 ; 10080905 s_waitcnt vmcnt(2) ; bf8c3f72 v_mad_f32 v5, 2.0, v7, -1.0 ; d5410005 03ce0ef4 v_mad_f32 v7, 2.0, v8, -1.0 ; d5410007 03ce10f4 v_mad_f32 v8, 2.0, v9, -1.0 ; d5410008 03ce12f4 v_mul_f32_e32 v9, s13, v7 ; 10120e0d v_mac_f32_e32 v9, s12, v5 ; 3e120a0c v_mac_f32_e32 v9, s14, v8 ; 3e12100e v_mul_f32_e32 v3, s17, v7 ; 10060e11 v_mac_f32_e32 v3, s16, v5 ; 3e060a10 v_mac_f32_e32 v3, s18, v8 ; 3e061012 v_mul_f32_e32 v7, s21, v7 ; 100e0e15 v_mac_f32_e32 v7, s20, v5 ; 3e0e0a14 v_mac_f32_e32 v7, s22, v8 ; 3e0e1016 v_mul_f32_e32 v5, v3, v3 ; 100a0703 v_mac_f32_e32 v5, v9, v9 ; 3e0a1309 v_mac_f32_e32 v5, v7, v7 ; 3e0a0f07 v_rsq_f32_e32 v5, v5 ; 7e0a5d05 v_min_f32_e32 v5, 0x7f7fffff, v5 ; 1e0a0aff 7f7fffff v_mul_f32_e32 v8, v9, v5 ; 10100b09 v_mul_f32_e32 v9, v3, v5 ; 10120b03 v_mul_f32_e32 v5, v7, v5 ; 100a0b07 s_waitcnt vmcnt(1) ; bf8c3f71 v_mad_f32 v7, 2.0, v10, -1.0 ; d5410007 03ce14f4 v_mad_f32 v10, 2.0, v11, -1.0 ; d541000a 03ce16f4 v_mad_f32 v11, 2.0, v12, -1.0 ; d541000b 03ce18f4 v_mul_f32_e32 v12, s13, v10 ; 1018140d v_mac_f32_e32 v12, s12, v7 ; 3e180e0c v_mac_f32_e32 v12, s14, v11 ; 3e18160e v_mul_f32_e32 v3, s17, v10 ; 10061411 v_mac_f32_e32 v3, s16, v7 ; 3e060e10 v_mac_f32_e32 v3, s18, v11 ; 3e061612 v_mul_f32_e32 v10, s21, v10 ; 10141415 v_mac_f32_e32 v10, s20, v7 ; 3e140e14 v_mac_f32_e32 v10, s22, v11 ; 3e141616 v_mul_f32_e32 v7, v3, v3 ; 100e0703 v_mac_f32_e32 v7, v12, v12 ; 3e0e190c v_mac_f32_e32 v7, v10, v10 ; 3e0e150a v_rsq_f32_e32 v7, v7 ; 7e0e5d07 v_min_f32_e32 v7, 0x7f7fffff, v7 ; 1e0e0eff 7f7fffff v_mul_f32_e32 v11, v12, v7 ; 10160f0c v_mul_f32_e32 v12, v3, v7 ; 10180f03 v_mul_f32_e32 v7, v10, v7 ; 100e0f0a s_waitcnt vmcnt(0) ; bf8c3f70 exp param0 v13, v14, v23, v0 ; f800020f 00170e0d exp param2 v11, v12, v7, v2 ; f800022f 02070c0b exp param1 v6, v15, v4, v1 ; f800021f 01040f06 exp param3 v8, v9, v5, off ; f8000237 80050908 s_endpgm ; bf810000 Vertex Shader as VS: *** SHADER STATS *** SGPRS: 64 VGPRS: 24 Spilled SGPRs: 0 Spilled VGPRs: 0 PrivMem VGPRS: 0 Code Size: 864 bytes LDS: 0 blocks Scratch: 0 bytes per wave Max Waves: 10 ******************** Pixel Shader: SPIRV (sha1: 82ab2dcf0d35372d63a56ed84ca062cc5b835d6c): ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. >>> Adding process 20909 for game ID 20920 >>> Adding process 20908 for game ID 20920 >>> Adding process 20910 for game ID 20920 ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. ; SPIR-V ; Version: 1.3 ; Generator: Khronos; 0 ; Bound: 507 ; Schema: 0 OpCapability Shader OpCapability ImageQuery OpCapability DerivativeControl OpCapability GroupNonUniform OpCapability GroupNonUniformBallot %1 = OpExtInstImport "GLSL.std.450" OpMemoryModel Logical GLSL450 OpEntryPoint Fragment %main "main" %fLaneId %oC0 %oC1 %oC2 %oC3 %gl_PointCoord %in_Texcoord0 %in_Texcoord1 %in_Texcoord2 %in_Texcoord3 OpExecutionMode %main OriginUpperLeft %3 = OpString "FS_57bfc78065521ab6b795333ea152a21f82e79557" OpSource Unknown 0 %3 OpName %cbuffer_t "cbuffer_t" OpMemberName %cbuffer_t 0 "f" OpMemberName %cbuffer_t 1 "i" OpMemberName %cbuffer_t 2 "b" OpName %c "c" OpName %v "v" OpName %ps_main "ps_main" OpName %render_state_t "render_state_t" OpMemberName %render_state_t 0 "fog_color" OpMemberName %render_state_t 1 "fog_scale" OpMemberName %render_state_t 2 "fog_end" OpMemberName %render_state_t 3 "fog_density" OpMemberName %render_state_t 4 "alpha_ref" OpMemberName %render_state_t 5 "point_size" OpMemberName %render_state_t 6 "point_size_min" OpMemberName %render_state_t 7 "point_size_max" OpMemberName %render_state_t 8 "point_scale_a" OpMemberName %render_state_t 9 "point_scale_b" OpMemberName %render_state_t 10 "point_scale_c" OpName %render_state "render_state" OpName %D3D9SharedPS "D3D9SharedPS" OpName %ps_kill "ps_kill" OpName %fLaneId "fLaneId" OpName %cF0_def "cF0_def" OpName %cF1_def "cF1_def" OpName %s0_2d "s0_2d" OpName %s0_2d_shadow "s0_2d_shadow" OpName %s0_useShadow "s0_useShadow" OpName %s1_2d "s1_2d" OpName %s1_2d_shadow "s1_2d_shadow" OpName %s1_useShadow "s1_useShadow" OpName %s2_2d "s2_2d" OpName %s2_2d_shadow "s2_2d_shadow" OpName %s2_useShadow "s2_useShadow" OpName %s3_2d "s3_2d" OpName %s3_2d_shadow "s3_2d_shadow" OpName %s3_useShadow "s3_useShadow" OpName %s6_2d "s6_2d" OpName %s6_2d_shadow "s6_2d_shadow" OpName %s6_useShadow "s6_useShadow" OpName %r0 "r0" OpName %r1 "r1" OpName %oC0 "oC0" OpName %oC1 "oC1" OpName %r2 "r2" OpName %oC2 "oC2" OpName %oC3 "oC3" OpName %point_mode "point_mode" OpName %in_Texcoord0 "in_Texcoord0" OpName %in_Texcoord1 "in_Texcoord1" OpName %in_Texcoord2 "in_Texcoord2" OpName %in_Texcoord3 "in_Texcoord3" OpName %alpha_test "alpha_test" OpName %alpha_func "alpha_func" OpName %main "main" OpDecorate %_arr_v4float_uint_224 ArrayStride 16 OpDecorate %_arr_v4int_uint_16 ArrayStride 16 OpDecorate %cbuffer_t Block OpMemberDecorate %cbuffer_t 0 Offset 0 OpMemberDecorate %cbuffer_t 1 Offset 3584 OpMemberDecorate %cbuffer_t 2 Offset 3840 OpDecorate %c DescriptorSet 0 OpDecorate %c Binding 2 OpDecorate %render_state_t Block OpMemberDecorate %render_state_t 0 Offset 0 OpMemberDecorate %render_state_t 1 Offset 12 OpMemberDecorate %render_state_t 2 Offset 16 OpMemberDecorate %render_state_t 3 Offset 20 OpMemberDecorate %render_state_t 4 Offset 24 OpMemberDecorate %render_state_t 5 Offset 28 OpMemberDecorate %render_state_t 6 Offset 32 OpMemberDecorate %render_state_t 7 Offset 36 OpMemberDecorate %render_state_t 8 Offset 40 OpMemberDecorate %render_state_t 9 Offset 44 OpMemberDecorate %render_state_t 10 Offset 48 OpDecorate %_struct_25 Block OpMemberDecorate %_struct_25 0 Offset 0 OpMemberDecorate %_struct_25 1 Offset 16 OpMemberDecorate %_struct_25 2 Offset 24 OpMemberDecorate %_struct_25 3 Offset 32 OpMemberDecorate %_struct_25 4 Offset 36 OpMemberDecorate %_struct_25 5 Offset 48 OpMemberDecorate %_struct_25 6 Offset 64 OpMemberDecorate %_struct_25 7 Offset 72 OpMemberDecorate %_struct_25 8 Offset 80 OpMemberDecorate %_struct_25 9 Offset 84 OpMemberDecorate %_struct_25 10 Offset 96 OpMemberDecorate %_struct_25 11 Offset 112 OpMemberDecorate %_struct_25 12 Offset 120 OpMemberDecorate %_struct_25 13 Offset 128 OpMemberDecorate %_struct_25 14 Offset 132 OpMemberDecorate %_struct_25 15 Offset 144 OpMemberDecorate %_struct_25 16 Offset 160 OpMemberDecorate %_struct_25 17 Offset 168 OpMemberDecorate %_struct_25 18 Offset 176 OpMemberDecorate %_struct_25 19 Offset 180 OpMemberDecorate %_struct_25 20 Offset 192 OpMemberDecorate %_struct_25 21 Offset 208 OpMemberDecorate %_struct_25 22 Offset 216 OpMemberDecorate %_struct_25 23 Offset 224 OpMemberDecorate %_struct_25 24 Offset 228 OpMemberDecorate %_struct_25 25 Offset 240 OpMemberDecorate %_struct_25 26 Offset 256 OpMemberDecorate %_struct_25 27 Offset 264 OpMemberDecorate %_struct_25 28 Offset 272 OpMemberDecorate %_struct_25 29 Offset 276 OpMemberDecorate %_struct_25 30 Offset 288 OpMemberDecorate %_struct_25 31 Offset 304 OpMemberDecorate %_struct_25 32 Offset 312 OpMemberDecorate %_struct_25 33 Offset 320 OpMemberDecorate %_struct_25 34 Offset 324 OpMemberDecorate %_struct_25 35 Offset 336 OpMemberDecorate %_struct_25 36 Offset 352 OpMemberDecorate %_struct_25 37 Offset 360 OpMemberDecorate %_struct_25 38 Offset 368 OpMemberDecorate %_struct_25 39 Offset 372 OpDecorate %D3D9SharedPS DescriptorSet 0 OpDecorate %D3D9SharedPS Binding 3 OpDecorate %fLaneId BuiltIn SubgroupLocalInvocationId OpDecorate %fLaneId Flat OpDecorate %s0_2d DescriptorSet 0 OpDecorate %s0_2d Binding 4 OpDecorate %s0_2d_shadow DescriptorSet 0 OpDecorate %s0_2d_shadow Binding 5 OpDecorate %s0_useShadow SpecId 5 OpDecorate %s1_2d DescriptorSet 0 OpDecorate %s1_2d Binding 6 OpDecorate %s1_2d_shadow DescriptorSet 0 OpDecorate %s1_2d_shadow Binding 7 OpDecorate %s1_useShadow SpecId 7 OpDecorate %s2_2d DescriptorSet 0 OpDecorate %s2_2d Binding 8 OpDecorate %s2_2d_shadow DescriptorSet 0 OpDecorate %s2_2d_shadow Binding 9 OpDecorate %s2_useShadow SpecId 9 OpDecorate %s3_2d DescriptorSet 0 OpDecorate %s3_2d Binding 10 OpDecorate %s3_2d_shadow DescriptorSet 0 OpDecorate %s3_2d_shadow Binding 11 OpDecorate %s3_useShadow SpecId 11 OpDecorate %s6_2d DescriptorSet 0 OpDecorate %s6_2d Binding 12 OpDecorate %s6_2d_shadow DescriptorSet 0 OpDecorate %s6_2d_shadow Binding 13 OpDecorate %s6_useShadow SpecId 13 OpDecorate %oC0 Location 0 OpDecorate %oC0 Index 0 OpDecorate %oC1 Location 1 OpDecorate %oC1 Index 0 OpDecorate %oC2 Location 2 OpDecorate %oC2 Index 0 OpDecorate %oC3 Location 3 OpDecorate %oC3 Index 0 OpDecorate %gl_PointCoord BuiltIn PointCoord OpDecorate %point_mode SpecId 1255 OpDecorate %in_Texcoord0 Location 0 OpDecorate %in_Texcoord1 Location 4 OpDecorate %in_Texcoord2 Location 3 OpDecorate %in_Texcoord3 Location 5 OpDecorate %alpha_test SpecId 1249 OpDecorate %alpha_func SpecId 1250 %uint = OpTypeInt 32 0 %uint_224 = OpConstant %uint 224 %float = OpTypeFloat 32 %v4float = OpTypeVector %float 4 %_arr_v4float_uint_224 = OpTypeArray %v4float %uint_224 %uint_16 = OpConstant %uint 16 %int = OpTypeInt 32 1 %v4int = OpTypeVector %int 4 %_arr_v4int_uint_16 = OpTypeArray %v4int %uint_16 %cbuffer_t = OpTypeStruct %_arr_v4float_uint_224 %_arr_v4int_uint_16 %uint %_ptr_Uniform_cbuffer_t = OpTypePointer Uniform %cbuffer_t %_arr_v4float_uint_16 = OpTypeArray %v4float %uint_16 %_ptr_Private__arr_v4float_uint_16 = OpTypePointer Private %_arr_v4float_uint_16 %v3float = OpTypeVector %float 3 %render_state_t = OpTypeStruct %v3float %float %float %float %float %float %float %float %float %float %float %_ptr_PushConstant_render_state_t = OpTypePointer PushConstant %render_state_t %v2float = OpTypeVector %float 2 %_struct_25 = OpTypeStruct %v4float %v2float %v2float %float %float %v4float %v2float %v2float %float %float %v4float %v2float %v2float %float %float %v4float %v2float %v2float %float %float %v4float %v2float %v2float %float %float %v4float %v2float %v2float %float %float %v4float %v2float %v2float %float %float %v4float %v2float %v2float %float %float %_ptr_Uniform__struct_25 = OpTypePointer Uniform %_struct_25 %void = OpTypeVoid %29 = OpTypeFunction %void %bool = OpTypeBool %false = OpConstantFalse %bool %_ptr_Private_bool = OpTypePointer Private %bool %_ptr_Input_uint = OpTypePointer Input %uint %float_n0_330000013 = OpConstant %float -0.330000013 %float_2 = OpConstant %float 2 %float_n1 = OpConstant %float -1 %float_1 = OpConstant %float 1 %cF0_def = OpConstantComposite %v4float %float_n0_330000013 %float_2 %float_n1 %float_1 %float_0_5 = OpConstant %float 0.5 %float_0_00499999989 = OpConstant %float 0.00499999989 %float_0 = OpConstant %float 0 %cF1_def = OpConstantComposite %v4float %float_0_5 %float_0_00499999989 %float_0 %float_0 %46 = OpTypeImage %float 2D 0 0 0 1 Unknown %47 = OpTypeSampledImage %46 %_ptr_UniformConstant_47 = OpTypePointer UniformConstant %47 %50 = OpTypeImage %float 2D 1 0 0 1 Unknown %51 = OpTypeSampledImage %50 %_ptr_UniformConstant_51 = OpTypePointer UniformConstant %51 %s0_useShadow = OpSpecConstantTrue %bool %s1_useShadow = OpSpecConstantTrue %bool %s2_useShadow = OpSpecConstantTrue %bool %s3_useShadow = OpSpecConstantTrue %bool %s6_useShadow = OpSpecConstantTrue %bool %67 = OpConstantComposite %v4float %float_0 %float_0 %float_0 %float_0 %_ptr_Private_v4float = OpTypePointer Private %v4float %int_0 = OpConstant %int 0 %v4bool = OpTypeVector %bool 4 %uint_3 = OpConstant %uint 3 %v4uint = OpTypeVector %uint 4 %uint_5 = OpConstant %uint 5 %uint_28 = OpConstant %uint 28 %uint_15 = OpConstant %uint 15 %int_1 = OpConstant %int 1 %_ptr_Output_v4float = OpTypePointer Output %v4float %float_3_40282347e_38 = OpConstant %float 3.40282347e+38 %int_3 = OpConstant %int 3 %int_2 = OpConstant %int 2 %int_12 = OpConstant %int 12 %uint_0 = OpConstant %uint 0 %_ptr_Uniform_v4float = OpTypePointer Uniform %v4float %int_14 = OpConstant %int 14 %int_13 = OpConstant %int 13 %v2bool = OpTypeVector %bool 2 %332 = OpConstantComposite %v2float %float_0 %float_0 %int_88 = OpConstant %int 88 %int_89 = OpConstant %int 89 %_ptr_Input_v2float = OpTypePointer Input %v2float %point_mode = OpSpecConstant %uint 0 %uint_1 = OpConstant %uint 1 %_ptr_Input_v4float = OpTypePointer Input %v4float %uint_2 = OpConstant %uint 2 %_ptr_PushConstant_float = OpTypePointer PushConstant %float %alpha_test = OpSpecConstantFalse %bool %alpha_func = OpSpecConstant %uint 7 %uint_4 = OpConstant %uint 4 %true = OpConstantTrue %bool %c = OpVariable %_ptr_Uniform_cbuffer_t Uniform %v = OpVariable %_ptr_Private__arr_v4float_uint_16 Private %render_state = OpVariable %_ptr_PushConstant_render_state_t PushConstant %D3D9SharedPS = OpVariable %_ptr_Uniform__struct_25 Uniform %ps_kill = OpVariable %_ptr_Private_bool Private %false %fLaneId = OpVariable %_ptr_Input_uint Input %s0_2d = OpVariable %_ptr_UniformConstant_47 UniformConstant %s0_2d_shadow = OpVariable %_ptr_UniformConstant_51 UniformConstant %s1_2d = OpVariable %_ptr_UniformConstant_47 UniformConstant %s1_2d_shadow = OpVariable %_ptr_UniformConstant_51 UniformConstant %s2_2d = OpVariable %_ptr_UniformConstant_47 UniformConstant %s2_2d_shadow = OpVariable %_ptr_UniformConstant_51 UniformConstant %s3_2d = OpVariable %_ptr_UniformConstant_47 UniformConstant %s3_2d_shadow = OpVariable %_ptr_UniformConstant_51 UniformConstant %s6_2d = OpVariable %_ptr_UniformConstant_47 UniformConstant %s6_2d_shadow = OpVariable %_ptr_UniformConstant_51 UniformConstant %r0 = OpVariable %_ptr_Private_v4float Private %67 %r1 = OpVariable %_ptr_Private_v4float Private %67 %oC0 = OpVariable %_ptr_Output_v4float Output %67 %oC1 = OpVariable %_ptr_Output_v4float Output %67 %r2 = OpVariable %_ptr_Private_v4float Private %67 %oC2 = OpVariable %_ptr_Output_v4float Output %67 %oC3 = OpVariable %_ptr_Output_v4float Output %67 %gl_PointCoord = OpVariable %_ptr_Input_v2float Input %in_Texcoord0 = OpVariable %_ptr_Input_v4float Input %in_Texcoord1 = OpVariable %_ptr_Input_v4float Input %in_Texcoord2 = OpVariable %_ptr_Input_v4float Input %in_Texcoord3 = OpVariable %_ptr_Input_v4float Input %ps_main = OpFunction %void None %29 %30 = OpLabel %71 = OpAccessChain %_ptr_Private_v4float %v %int_0 %72 = OpLoad %v4float %71 OpSelectionMerge %75 None OpBranchConditional %s0_useShadow %74 %73 %73 = OpLabel %76 = OpLoad %47 %s0_2d %77 = OpImageSampleImplicitLod %v4float %76 %72 OpStore %r0 %77 OpBranch %75 %74 = OpLabel %78 = OpLoad %51 %s0_2d_shadow %79 = OpCompositeExtract %float %72 2 %80 = OpImageSampleDrefImplicitLod %float %78 %72 %79 %81 = OpCompositeConstruct %v4float %80 %80 %80 %80 OpStore %r0 %81 OpBranch %75 %75 = OpLabel %82 = OpVectorShuffle %v4float %cF0_def %cF0_def 0 0 0 0 %83 = OpLoad %v4float %r0 %84 = OpVectorShuffle %v4float %83 %83 0 0 0 0 %85 = OpFAdd %v4float %84 %82 OpStore %r0 %85 %86 = OpLoad %v4float %r0 %88 = OpFOrdLessThan %v4bool %86 %67 %89 = OpAny %bool %88 %90 = OpLoad %bool %ps_kill %91 = OpLogicalOr %bool %90 %89 OpStore %ps_kill %91 %94 = OpGroupNonUniformBallot %v4uint %uint_3 %91 %95 = OpLoad %uint %fLaneId %97 = OpShiftRightLogical %uint %95 %uint_5 %98 = OpVectorExtractDynamic %uint %94 %97 %100 = OpBitwiseAnd %uint %95 %uint_28 %101 = OpShiftRightLogical %uint %98 %100 %103 = OpBitwiseAnd %uint %101 %uint_15 %104 = OpIEqual %bool %103 %uint_15 OpSelectionMerge %106 None OpBranchConditional %104 %105 %106 %105 = OpLabel OpKill %106 = OpLabel %107 = OpAccessChain %_ptr_Private_v4float %v %int_0 %108 = OpLoad %v4float %107 OpSelectionMerge %111 None OpBranchConditional %s1_useShadow %110 %109 %109 = OpLabel %112 = OpLoad %47 %s1_2d %113 = OpImageSampleImplicitLod %v4float %112 %108 OpStore %r0 %113 OpBranch %111 %110 = OpLabel %114 = OpLoad %51 %s1_2d_shadow %115 = OpCompositeExtract %float %108 2 %116 = OpImageSampleDrefImplicitLod %float %114 %108 %115 %117 = OpCompositeConstruct %v4float %116 %116 %116 %116 OpStore %r0 %117 OpBranch %111 %111 = OpLabel %119 = OpAccessChain %_ptr_Private_v4float %v %int_0 %120 = OpLoad %v4float %119 %121 = OpVectorShuffle %v2float %120 %120 2 3 %122 = OpLoad %v4float %r1 %123 = OpVectorShuffle %v4float %122 %121 4 5 2 3 OpStore %r1 %123 %125 = OpAccessChain %_ptr_Private_v4float %v %int_1 %126 = OpLoad %v4float %125 %127 = OpCompositeExtract %float %126 3 %128 = OpLoad %v4float %r1 %129 = OpCompositeInsert %v4float %127 %128 2 OpStore %r1 %129 %132 = OpLoad %v4float %r1 %133 = OpVectorShuffle %v3float %132 %132 0 1 2 %134 = OpLoad %v4float %r0 %135 = OpVectorShuffle %v3float %134 %134 0 1 2 %136 = OpFMul %v3float %135 %133 %137 = OpLoad %v4float %oC0 %138 = OpVectorShuffle %v4float %137 %136 4 5 6 3 OpStore %oC0 %138 %139 = OpAccessChain %_ptr_Private_v4float %v %int_0 %140 = OpLoad %v4float %139 OpSelectionMerge %143 None OpBranchConditional %s3_useShadow %142 %141 %141 = OpLabel %144 = OpLoad %47 %s3_2d %145 = OpImageSampleImplicitLod %v4float %144 %140 OpStore %r0 %145 OpBranch %143 %142 = OpLabel %146 = OpLoad %51 %s3_2d_shadow %147 = OpCompositeExtract %float %140 2 %148 = OpImageSampleDrefImplicitLod %float %146 %140 %147 %149 = OpCompositeConstruct %v4float %148 %148 %148 %148 OpStore %r0 %149 OpBranch %143 %143 = OpLabel %151 = OpLoad %v4float %r0 %152 = OpVectorShuffle %v3float %151 %151 0 0 0 %153 = OpLoad %v4float %r0 %154 = OpVectorShuffle %v3float %153 %153 0 0 0 %155 = OpFMul %v3float %154 %152 %156 = OpLoad %v4float %oC1 %157 = OpVectorShuffle %v4float %156 %155 4 5 6 3 OpStore %oC1 %157 %158 = OpAccessChain %_ptr_Private_v4float %v %int_0 %159 = OpLoad %v4float %158 OpSelectionMerge %162 None OpBranchConditional %s2_useShadow %161 %160 %160 = OpLabel %163 = OpLoad %47 %s2_2d %164 = OpImageSampleImplicitLod %v4float %163 %159 OpStore %r0 %164 OpBranch %162 %161 = OpLabel %165 = OpLoad %51 %s2_2d_shadow %166 = OpCompositeExtract %float %159 2 %167 = OpImageSampleDrefImplicitLod %float %165 %159 %166 %168 = OpCompositeConstruct %v4float %167 %167 %167 %167 OpStore %r0 %168 OpBranch %162 %162 = OpLabel %169 = OpVectorShuffle %v3float %cF0_def %cF0_def 2 2 2 %170 = OpVectorShuffle %v3float %cF0_def %cF0_def 1 1 1 %171 = OpLoad %v4float %r0 %172 = OpVectorShuffle %v3float %171 %171 0 3 1 %173 = OpExtInst %v3float %1 Fma %172 %170 %169 %174 = OpLoad %v4float %r0 %175 = OpVectorShuffle %v4float %174 %173 4 5 2 6 OpStore %r0 %175 %176 = OpLoad %v4float %r0 %177 = OpCompositeExtract %float %176 0 %178 = OpLoad %v4float %r0 %179 = OpCompositeExtract %float %178 1 %180 = OpFMul %float %179 %177 %181 = OpLoad %v4float %r0 %182 = OpCompositeInsert %v4float %180 %181 0 OpStore %r0 %182 %183 = OpCompositeExtract %float %cF0_def 3 %184 = OpLoad %v4float %r0 %185 = OpCompositeExtract %float %184 0 %186 = OpFNegate %float %185 %187 = OpLoad %v4float %r0 %188 = OpCompositeExtract %float %187 0 %189 = OpExtInst %float %1 Fma %188 %186 %183 %190 = OpLoad %v4float %r0 %191 = OpCompositeInsert %v4float %189 %190 1 OpStore %r0 %191 %192 = OpLoad %v4float %r0 %193 = OpCompositeExtract %float %192 1 %194 = OpLoad %v4float %r0 %195 = OpCompositeExtract %float %194 3 %196 = OpFNegate %float %195 %197 = OpLoad %v4float %r0 %198 = OpCompositeExtract %float %197 3 %199 = OpExtInst %float %1 Fma %198 %196 %193 %200 = OpLoad %v4float %r0 %201 = OpCompositeInsert %v4float %199 %200 1 OpStore %r0 %201 %202 = OpLoad %v4float %r0 %203 = OpCompositeExtract %float %202 1 %204 = OpExtInst %float %1 FAbs %203 %205 = OpExtInst %float %1 InverseSqrt %204 %207 = OpExtInst %float %1 NMin %205 %float_3_40282347e_38 %208 = OpLoad %v4float %r0 %209 = OpCompositeInsert %v4float %207 %208 1 OpStore %r0 %209 %210 = OpLoad %v4float %r0 %211 = OpCompositeExtract %float %210 1 %212 = OpFDiv %float %float_1 %211 %213 = OpExtInst %float %1 NMin %212 %float_3_40282347e_38 %214 = OpLoad %v4float %r0 %215 = OpCompositeInsert %v4float %213 %214 2 OpStore %r0 %215 %216 = OpVectorShuffle %v3float %cF0_def %cF0_def 3 2 3 %217 = OpLoad %v4float %r0 %218 = OpVectorShuffle %v3float %217 %217 0 3 2 %219 = OpFMul %v3float %218 %216 %220 = OpLoad %v4float %r0 %221 = OpVectorShuffle %v4float %220 %219 4 5 6 3 OpStore %r0 %221 %223 = OpAccessChain %_ptr_Private_v4float %v %int_3 %224 = OpLoad %v4float %223 %225 = OpVectorShuffle %v3float %224 %224 0 1 2 %226 = OpLoad %v4float %r0 %227 = OpVectorShuffle %v3float %226 %226 1 1 1 %228 = OpFMul %v3float %227 %225 %229 = OpLoad %v4float %r1 %230 = OpVectorShuffle %v4float %229 %228 4 5 6 3 OpStore %r1 %230 %231 = OpLoad %v4float %r1 %232 = OpVectorShuffle %v3float %231 %231 0 1 2 %233 = OpLoad %v4float %r0 %234 = OpVectorShuffle %v3float %233 %233 0 0 0 %236 = OpAccessChain %_ptr_Private_v4float %v %int_2 %237 = OpLoad %v4float %236 %238 = OpVectorShuffle %v3float %237 %237 0 1 2 %239 = OpExtInst %v3float %1 Fma %238 %234 %232 %240 = OpLoad %v4float %r0 %241 = OpVectorShuffle %v4float %240 %239 4 5 2 6 OpStore %r0 %241 %242 = OpLoad %v4float %r0 %243 = OpVectorShuffle %v3float %242 %242 0 1 3 %244 = OpLoad %v4float %r0 %245 = OpVectorShuffle %v3float %244 %244 2 2 2 %246 = OpAccessChain %_ptr_Private_v4float %v %int_1 %247 = OpLoad %v4float %246 %248 = OpVectorShuffle %v3float %247 %247 0 1 2 %249 = OpExtInst %v3float %1 Fma %248 %245 %243 %250 = OpLoad %v4float %r0 %251 = OpVectorShuffle %v4float %250 %249 4 5 6 3 OpStore %r0 %251 %255 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_12 %256 = OpLoad %v4float %255 %257 = OpVectorShuffle %v3float %256 %256 0 1 2 %258 = OpLoad %v4float %r0 %259 = OpVectorShuffle %v3float %258 %258 0 1 2 %260 = OpDot %float %259 %257 %261 = OpLoad %v4float %r1 %262 = OpCompositeInsert %v4float %260 %261 0 OpStore %r1 %262 %264 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_14 %265 = OpLoad %v4float %264 %266 = OpVectorShuffle %v3float %265 %265 0 1 2 %267 = OpLoad %v4float %r0 %268 = OpVectorShuffle %v3float %267 %267 0 1 2 %269 = OpDot %float %268 %266 %270 = OpLoad %v4float %r1 %271 = OpCompositeInsert %v4float %269 %270 1 OpStore %r1 %271 %273 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_13 %274 = OpLoad %v4float %273 %275 = OpVectorShuffle %v3float %274 %274 0 1 2 %276 = OpLoad %v4float %r0 %277 = OpVectorShuffle %v3float %276 %276 0 1 2 %278 = OpDot %float %277 %275 %279 = OpLoad %v4float %r1 %280 = OpCompositeInsert %v4float %278 %279 2 OpStore %r1 %280 %281 = OpLoad %v4float %r1 %282 = OpVectorShuffle %v3float %281 %281 0 1 2 %283 = OpDot %float %282 %282 %284 = OpExtInst %float %1 InverseSqrt %283 %285 = OpExtInst %float %1 NMin %284 %float_3_40282347e_38 %286 = OpLoad %v4float %r1 %287 = OpVectorShuffle %v3float %286 %286 0 1 2 %288 = OpVectorTimesScalar %v3float %287 %285 %289 = OpLoad %v4float %r0 %290 = OpVectorShuffle %v4float %289 %288 4 5 6 3 OpStore %r0 %290 %291 = OpLoad %v4float %r0 %292 = OpCompositeExtract %float %291 1 %293 = OpExtInst %float %1 FAbs %292 %294 = OpLoad %v4float %r0 %295 = OpCompositeExtract %float %294 0 %296 = OpExtInst %float %1 FAbs %295 %297 = OpExtInst %float %1 FMax %296 %293 %298 = OpLoad %v4float %r1 %299 = OpCompositeInsert %v4float %297 %298 0 OpStore %r1 %299 %301 = OpLoad %v4float %r1 %302 = OpCompositeExtract %float %301 0 %303 = OpLoad %v4float %r0 %304 = OpCompositeExtract %float %303 2 %305 = OpExtInst %float %1 FAbs %304 %306 = OpExtInst %float %1 FMax %305 %302 %307 = OpLoad %v4float %r2 %308 = OpCompositeInsert %v4float %306 %307 0 OpStore %r2 %308 %309 = OpLoad %v4float %r2 %310 = OpVectorShuffle %v2float %309 %309 0 0 %311 = OpFNegate %v2float %310 %312 = OpLoad %v4float %r0 %313 = OpVectorShuffle %v2float %312 %312 2 1 %314 = OpExtInst %v2float %1 FAbs %313 %315 = OpFAdd %v2float %314 %311 %316 = OpLoad %v4float %r1 %317 = OpVectorShuffle %v4float %316 %315 4 5 2 3 OpStore %r1 %317 %318 = OpLoad %v4float %r2 %319 = OpCompositeExtract %float %318 0 %320 = OpFDiv %float %float_1 %319 %321 = OpExtInst %float %1 NMin %320 %float_3_40282347e_38 %322 = OpLoad %v4float %r0 %323 = OpCompositeInsert %v4float %321 %322 3 OpStore %r0 %323 %324 = OpLoad %v4float %r0 %325 = OpVectorShuffle %v3float %324 %324 3 3 3 %326 = OpLoad %v4float %r0 %327 = OpVectorShuffle %v3float %326 %326 0 1 2 %328 = OpFMul %v3float %327 %325 %329 = OpLoad %v4float %r2 %330 = OpVectorShuffle %v4float %329 %328 4 5 6 3 OpStore %r2 %330 %333 = OpLoad %v4float %r1 %334 = OpVectorShuffle %v2float %333 %333 1 1 %335 = OpFOrdGreaterThanEqual %v2bool %334 %332 %336 = OpLoad %v4float %r0 %337 = OpVectorShuffle %v2float %336 %336 1 2 %338 = OpExtInst %v2float %1 FAbs %337 %339 = OpLoad %v4float %r0 %340 = OpVectorShuffle %v2float %339 %339 0 2 %341 = OpExtInst %v2float %1 FAbs %340 %342 = OpSelect %v2float %335 %341 %338 %343 = OpLoad %v4float %r0 %344 = OpVectorShuffle %v4float %343 %342 0 1 4 5 OpStore %r0 %344 %345 = OpLoad %v4float %r1 %346 = OpVectorShuffle %v2float %345 %345 0 0 %347 = OpFOrdGreaterThanEqual %v2bool %346 %332 %348 = OpLoad %v4float %r0 %349 = OpVectorShuffle %v2float %348 %348 2 3 %350 = OpLoad %v4float %r0 %351 = OpVectorShuffle %v2float %350 %350 0 1 %352 = OpExtInst %v2float %1 FAbs %351 %353 = OpSelect %v2float %347 %352 %349 %354 = OpLoad %v4float %r0 %355 = OpVectorShuffle %v4float %354 %353 4 5 2 3 OpStore %r0 %355 %356 = OpLoad %v4float %r0 %357 = OpCompositeExtract %float %356 0 %358 = OpLoad %v4float %r0 %359 = OpCompositeExtract %float %358 1 %360 = OpFNegate %float %359 %361 = OpFAdd %float %360 %357 %362 = OpLoad %v4float %r0 %363 = OpCompositeInsert %v4float %361 %362 2 OpStore %r0 %363 %364 = OpLoad %v4float %r0 %365 = OpVectorShuffle %v2float %364 %364 2 2 %366 = OpFOrdGreaterThanEqual %v2bool %365 %332 %367 = OpLoad %v4float %r0 %368 = OpVectorShuffle %v2float %367 %367 1 0 %369 = OpLoad %v4float %r0 %370 = OpVectorShuffle %v2float %369 %369 0 1 %371 = OpSelect %v2float %366 %370 %368 %372 = OpLoad %v4float %r0 %373 = OpVectorShuffle %v4float %372 %371 4 5 2 3 OpStore %r0 %373 %374 = OpLoad %v4float %r0 %375 = OpCompositeExtract %float %374 0 %376 = OpFDiv %float %float_1 %375 %377 = OpExtInst %float %1 NMin %376 %float_3_40282347e_38 %378 = OpLoad %v4float %r0 %379 = OpCompositeInsert %v4float %377 %378 3 OpStore %r0 %379 %380 = OpLoad %v4float %r0 %381 = OpCompositeExtract %float %380 3 %382 = OpLoad %v4float %r0 %383 = OpCompositeExtract %float %382 1 %384 = OpFMul %float %383 %381 %385 = OpLoad %v4float %r0 %386 = OpCompositeInsert %v4float %384 %385 2 OpStore %r0 %386 %387 = OpLoad %v4float %r0 %388 = OpVectorShuffle %v4float %387 %387 0 2 2 3 OpSelectionMerge %391 None OpBranchConditional %s6_useShadow %390 %389 %389 = OpLabel %392 = OpLoad %47 %s6_2d %393 = OpImageSampleImplicitLod %v4float %392 %388 OpStore %r0 %393 OpBranch %391 %390 = OpLabel %394 = OpLoad %51 %s6_2d_shadow %395 = OpCompositeExtract %float %388 2 %396 = OpImageSampleDrefImplicitLod %float %394 %388 %395 %397 = OpCompositeConstruct %v4float %396 %396 %396 %396 OpStore %r0 %397 OpBranch %391 %391 = OpLabel %398 = OpLoad %v4float %r0 %399 = OpVectorShuffle %v3float %398 %398 0 0 0 %400 = OpLoad %v4float %r2 %401 = OpVectorShuffle %v3float %400 %400 0 1 2 %402 = OpFMul %v3float %401 %399 %403 = OpLoad %v4float %r0 %404 = OpVectorShuffle %v4float %403 %402 4 5 6 3 OpStore %r0 %404 %406 = OpVectorShuffle %v3float %cF1_def %cF1_def 0 0 0 %407 = OpVectorShuffle %v3float %cF1_def %cF1_def 0 0 0 %408 = OpLoad %v4float %r0 %409 = OpVectorShuffle %v3float %408 %408 0 1 2 %410 = OpExtInst %v3float %1 Fma %409 %407 %406 %411 = OpLoad %v4float %oC2 %412 = OpVectorShuffle %v4float %411 %410 4 5 6 3 OpStore %oC2 %412 %413 = OpCompositeExtract %float %cF1_def 1 %414 = OpLoad %v4float %r0 %415 = OpCompositeInsert %v4float %413 %414 1 OpStore %r0 %415 %417 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_88 %418 = OpLoad %v4float %417 %419 = OpCompositeExtract %float %418 0 %420 = OpLoad %v4float %r0 %421 = OpCompositeExtract %float %420 1 %422 = OpFMul %float %421 %419 %423 = OpLoad %v4float %oC2 %424 = OpCompositeInsert %v4float %422 %423 3 OpStore %oC2 %424 %426 = OpAccessChain %_ptr_Uniform_v4float %c %uint_0 %int_89 %427 = OpLoad %v4float %426 %428 = OpCompositeExtract %float %427 0 %429 = OpLoad %v4float %oC0 %430 = OpCompositeInsert %v4float %428 %429 3 OpStore %oC0 %430 %431 = OpCompositeExtract %float %cF1_def 2 %432 = OpLoad %v4float %oC1 %433 = OpCompositeInsert %v4float %431 %432 3 OpStore %oC1 %433 %435 = OpAccessChain %_ptr_Private_v4float %v %int_2 %436 = OpLoad %v4float %435 %437 = OpVectorShuffle %v4float %436 %436 3 3 3 3 OpStore %oC3 %437 OpReturn OpFunctionEnd %main = OpFunction %void None %29 %438 = OpLabel %441 = OpLoad %v2float %gl_PointCoord %442 = OpCompositeExtract %float %441 0 %443 = OpCompositeExtract %float %441 1 %444 = OpCompositeConstruct %v4float %442 %443 %float_0 %float_0 %446 = OpBitFieldUExtract %uint %point_mode %int_1 %int_1 %448 = OpIEqual %bool %446 %uint_1 %449 = OpCompositeConstruct %v4bool %448 %448 %448 %448 %452 = OpAccessChain %_ptr_Private_v4float %v %uint_0 %453 = OpLoad %v4float %in_Texcoord0 %454 = OpVectorShuffle %v4float %67 %453 4 5 6 7 %455 = OpSelect %v4float %449 %444 %454 OpStore %452 %455 %457 = OpAccessChain %_ptr_Private_v4float %v %uint_1 %458 = OpLoad %v4float %in_Texcoord1 %459 = OpVectorShuffle %v4float %67 %458 4 5 6 7 %460 = OpSelect %v4float %449 %444 %459 OpStore %457 %460 %463 = OpAccessChain %_ptr_Private_v4float %v %uint_2 %464 = OpLoad %v4float %in_Texcoord2 %465 = OpVectorShuffle %v4float %67 %464 4 5 6 7 %466 = OpSelect %v4float %449 %444 %465 OpStore %463 %466 %468 = OpAccessChain %_ptr_Private_v4float %v %uint_3 %469 = OpLoad %v4float %in_Texcoord3 %470 = OpVectorShuffle %v4float %67 %469 4 5 6 3 %471 = OpSelect %v4float %449 %444 %470 OpStore %468 %471 %472 = OpFunctionCall %void %ps_main %475 = OpLoad %bool %ps_kill OpSelectionMerge %474 None OpBranchConditional %475 %473 %474 %473 = OpLabel OpKill %474 = OpLabel OpSelectionMerge %491 None OpBranchConditional %alpha_test %487 %491 %487 = OpLabel %492 = OpLoad %v4float %oC0 %493 = OpCompositeExtract %float %492 3 %495 = OpAccessChain %_ptr_PushConstant_float %render_state %uint_4 %496 = OpLoad %float %495 OpSelectionMerge %488 None OpSwitch %alpha_func %486 0 %479 1 %480 2 %481 3 %482 4 %483 5 %484 6 %485 7 %486 %479 = OpLabel OpBranch %488 %480 = OpLabel %497 = OpFOrdLessThan %bool %493 %496 OpBranch %488 %481 = OpLabel %498 = OpFOrdEqual %bool %493 %496 OpBranch %488 %482 = OpLabel %499 = OpFOrdLessThanEqual %bool %493 %496 OpBranch %488 %483 = OpLabel %500 = OpFOrdGreaterThan %bool %493 %496 OpBranch %488 %484 = OpLabel %501 = OpFOrdNotEqual %bool %493 %496 OpBranch %488 %485 = OpLabel %502 = OpFOrdGreaterThanEqual %bool %493 %496 OpBranch %488 %486 = OpLabel OpBranch %488 %488 = OpLabel %504 = OpPhi %bool %false %479 %497 %480 %498 %481 %499 %482 %500 %483 %501 %484 %502 %485 %true %486 %505 = OpLogicalNot %bool %504 %506 = OpLogicalNot %bool %504 OpSelectionMerge %490 None OpBranchConditional %505 %489 %490 %489 = OpLabel OpKill %490 = OpLabel OpBranch %491 %491 = OpLabel OpReturn OpFunctionEnd NIR: shader: MESA_SHADER_FRAGMENT inputs: 4 outputs: 0 uniforms: 52 shared: 0 decl_var ubo INTERP_MODE_NONE cbuffer_t c (429, 0, 2) decl_var ubo INTERP_MODE_NONE block D3D9SharedPS (429, 0, 3) decl_var uniform INTERP_MODE_NONE sampler2D s0_2d (429, 0, 4) decl_var uniform INTERP_MODE_NONE sampler2D s0_2d_shadow (429, 0, 5) decl_var uniform INTERP_MODE_NONE sampler2D s1_2d (429, 0, 6) decl_var uniform INTERP_MODE_NONE sampler2D s1_2d_shadow (429, 0, 7) decl_var uniform INTERP_MODE_NONE sampler2D s2_2d (429, 0, 8) decl_var uniform INTERP_MODE_NONE sampler2D s2_2d_shadow (429, 0, 9) decl_var uniform INTERP_MODE_NONE sampler2D s3_2d (429, 0, 10) decl_var uniform INTERP_MODE_NONE sampler2D s3_2d_shadow (429, 0, 11) decl_var uniform INTERP_MODE_NONE sampler2D s6_2d (429, 0, 12) decl_var uniform INTERP_MODE_NONE sampler2D s6_2d_shadow (429, 0, 13) decl_var shader_in INTERP_MODE_NONE float in_Texcoord0 (VARYING_SLOT_VAR0.x, 0, 0) decl_var shader_in INTERP_MODE_NONE float in_Texcoord0@0 (VARYING_SLOT_VAR0.y, 0, 0) decl_var shader_in INTERP_MODE_NONE float in_Texcoord0@1 (VARYING_SLOT_VAR0.z, 0, 0) decl_var shader_in INTERP_MODE_NONE float in_Texcoord0@2 (VARYING_SLOT_VAR0.w, 0, 0) decl_var shader_in INTERP_MODE_NONE float in_Texcoord2 (VARYING_SLOT_VAR1.x, 1, 0) decl_var shader_in INTERP_MODE_NONE float in_Texcoord2@3 (VARYING_SLOT_VAR1.y, 1, 0) decl_var shader_in INTERP_MODE_NONE float in_Texcoord2@4 (VARYING_SLOT_VAR1.z, 1, 0) decl_var shader_in INTERP_MODE_NONE float in_Texcoord2@5 (VARYING_SLOT_VAR1.w, 1, 0) decl_var shader_in INTERP_MODE_NONE float in_Texcoord1 (VARYING_SLOT_VAR2.x, 2, 0) decl_var shader_in INTERP_MODE_NONE float in_Texcoord1@6 (VARYING_SLOT_VAR2.y, 2, 0) decl_var shader_in INTERP_MODE_NONE float in_Texcoord1@7 (VARYING_SLOT_VAR2.z, 2, 0) decl_var shader_in INTERP_MODE_NONE float in_Texcoord1@8 (VARYING_SLOT_VAR2.w, 2, 0) decl_var shader_in INTERP_MODE_NONE float in_Texcoord3 (VARYING_SLOT_VAR3.x, 3, 0) decl_var shader_in INTERP_MODE_NONE float in_Texcoord3@9 (VARYING_SLOT_VAR3.y, 3, 0) decl_var shader_in INTERP_MODE_NONE float in_Texcoord3@10 (VARYING_SLOT_VAR3.z, 3, 0) decl_var shader_out INTERP_MODE_NONE vec4 oC0 (FRAG_RESULT_DATA0.xyzw, 16, 0) decl_var shader_out INTERP_MODE_NONE vec4 oC1 (FRAG_RESULT_DATA1.xyzw, 20, 0) decl_var shader_out INTERP_MODE_NONE vec4 oC2 (FRAG_RESULT_DATA2.xyzw, 24, 0) decl_var shader_out INTERP_MODE_NONE vec4 oC3 (FRAG_RESULT_DATA3.xyzw, 28, 0) decl_function main (0 params) impl main { block block_0: /* preds: */ vec2 32 ssa_0 = intrinsic load_barycentric_pixel () (0) /* interp_mode=0 */ vec1 32 ssa_1 = deref_var &s0_2d (uniform sampler2D) vec1 32 ssa_2 = load_const (0x00000000 /* 0.000000 */) vec1 32 ssa_3 = intrinsic load_interpolated_input (ssa_0, ssa_2) (0, 1) /* base=0 */ /* component=1 */ /* in_Texcoord0 */ vec1 32 ssa_4 = intrinsic load_interpolated_input (ssa_0, ssa_2) (0, 0) /* base=0 */ /* component=0 */ /* in_Texcoord0 */ vec2 32 ssa_5 = vec2 ssa_4, ssa_3 vec4 32 ssa_6 = tex ssa_1 (texture_deref), ssa_1 (sampler_deref), ssa_5 (coord) vec1 32 ssa_7 = load_const (0x3ea8f5c3 /* 0.330000 */) vec1 1 ssa_8 = flt ssa_6.x, ssa_7 vec1 64 ssa_9 = intrinsic ballot (ssa_8) () vec1 32 ssa_10 = unpack_64_2x32_split_y ssa_9 vec1 32 ssa_11 = unpack_64_2x32_split_x ssa_9 vec1 32 ssa_12 = intrinsic load_subgroup_invocation () () vec1 32 ssa_13 = load_const (0x00000005 /* 0.000000 */) vec1 32 ssa_14 = ushr ssa_12, ssa_13 vec1 32 ssa_15 = load_const (0x00000001 /* 0.000000 */) vec1 1 ssa_16 = ilt ssa_14, ssa_15 vec1 32 ssa_17 = bcsel ssa_16, ssa_11, ssa_10 vec1 32 ssa_18 = load_const (0x00000002 /* 0.000000 */) vec1 1 ssa_19 = ilt ssa_14, ssa_18 vec1 32 ssa_20 = bcsel ssa_19, ssa_17, ssa_2 vec1 32 ssa_21 = load_const (0x0000001c /* 0.000000 */) vec1 32 ssa_22 = iand ssa_12, ssa_21 vec1 32 ssa_23 = ushr ssa_20, ssa_22 vec1 32 ssa_24 = load_const (0x0000000f /* 0.000000 */) vec1 32 ssa_25 = iand ssa_23, ssa_24 vec1 1 ssa_26 = ieq ssa_25, ssa_24 intrinsic discard_if (ssa_26) () vec1 32 ssa_27 = deref_var &s1_2d (uniform sampler2D) vec4 32 ssa_28 = tex ssa_27 (texture_deref), ssa_27 (sampler_deref), ssa_5 (coord) vec1 32 ssa_29 = intrinsic load_interpolated_input (ssa_0, ssa_2) (0, 2) /* base=0 */ /* component=2 */ /* in_Texcoord0 */ vec1 32 ssa_30 = fmul ssa_28.x, ssa_29 vec1 32 ssa_31 = intrinsic load_interpolated_input (ssa_0, ssa_2) (0, 3) /* base=0 */ /* component=3 */ /* in_Texcoord0 */ vec1 32 ssa_32 = fmul ssa_28.y, ssa_31 vec1 32 ssa_33 = intrinsic load_interpolated_input (ssa_0, ssa_2) (2, 3) /* base=2 */ /* component=3 */ /* in_Texcoord1 */ vec1 32 ssa_34 = fmul ssa_28.z, ssa_33 vec1 32 ssa_35 = deref_var &s3_2d (uniform sampler2D) vec4 32 ssa_36 = tex ssa_35 (texture_deref), ssa_35 (sampler_deref), ssa_5 (coord) vec1 32 ssa_37 = fmul ssa_36.x, ssa_36.x vec1 32 ssa_38 = deref_var &s2_2d (uniform sampler2D) vec4 32 ssa_39 = tex ssa_38 (texture_deref), ssa_38 (sampler_deref), ssa_5 (coord) vec1 32 ssa_40 = load_const (0x40000000 /* 2.000000 */) vec1 32 ssa_41 = fmul ssa_39.x, ssa_40 vec1 32 ssa_42 = load_const (0xbf800000 /* -1.000000 */) vec1 32 ssa_43 = fadd ssa_41, ssa_42 vec1 32 ssa_44 = fmul ssa_39.w, ssa_40 vec1 32 ssa_45 = fadd ssa_44, ssa_42 vec1 32 ssa_46 = fmul ssa_39.y, ssa_40 vec1 32 ssa_47 = fadd ssa_46, ssa_42 vec1 32 ssa_48 = fmul ssa_45, ssa_43 vec1 32 ssa_49 = fmul ssa_48, ssa_48 vec1 32 ssa_50 = load_const (0x3f800000 /* 1.000000 */) vec1 32 ssa_51 = fsub ssa_50, ssa_49 vec1 32 ssa_52 = fmul ssa_47, ssa_47 vec1 32 ssa_53 = fsub ssa_51, ssa_52 vec1 32 ssa_54 = fabs ssa_53 vec1 32 ssa_55 = frsq ssa_54 vec1 32 ssa_56 = load_const (0x7f7fffff /* 340282346638528859811704183484516925440.000000 */) vec1 32 ssa_57 = fmin ssa_55, ssa_56 vec1 32 ssa_58 = frcp ssa_57 vec1 32 ssa_59 = fmin ssa_58, ssa_56 vec1 32 ssa_60 = intrinsic load_interpolated_input (ssa_0, ssa_2) (3, 0) /* base=3 */ /* component=0 */ /* in_Texcoord3 */ vec1 32 ssa_61 = fmul ssa_47, ssa_60 vec1 32 ssa_62 = intrinsic load_interpolated_input (ssa_0, ssa_2) (3, 1) /* base=3 */ /* component=1 */ /* in_Texcoord3 */ vec1 32 ssa_63 = fmul ssa_47, ssa_62 vec1 32 ssa_64 = intrinsic load_interpolated_input (ssa_0, ssa_2) (3, 2) /* base=3 */ /* component=2 */ /* in_Texcoord3 */ vec1 32 ssa_65 = fmul ssa_47, ssa_64 vec1 32 ssa_66 = intrinsic load_interpolated_input (ssa_0, ssa_2) (1, 0) /* base=1 */ /* component=0 */ /* in_Texcoord2 */ vec1 32 ssa_67 = fmul ssa_66, ssa_48 vec1 32 ssa_68 = fsub ssa_67, ssa_61 vec1 32 ssa_69 = intrinsic load_interpolated_input (ssa_0, ssa_2) (1, 1) /* base=1 */ /* component=1 */ /* in_Texcoord2 */ vec1 32 ssa_70 = fmul ssa_69, ssa_48 vec1 32 ssa_71 = fsub ssa_70, ssa_63 vec1 32 ssa_72 = intrinsic load_interpolated_input (ssa_0, ssa_2) (1, 2) /* base=1 */ /* component=2 */ /* in_Texcoord2 */ vec1 32 ssa_73 = fmul ssa_72, ssa_48 vec1 32 ssa_74 = fsub ssa_73, ssa_65 vec1 32 ssa_75 = intrinsic load_interpolated_input (ssa_0, ssa_2) (2, 0) /* base=2 */ /* component=0 */ /* in_Texcoord1 */ vec1 32 ssa_76 = fmul ssa_75, ssa_59 vec1 32 ssa_77 = fadd ssa_76, ssa_68 vec1 32 ssa_78 = intrinsic load_interpolated_input (ssa_0, ssa_2) (2, 1) /* base=2 */ /* component=1 */ /* in_Texcoord1 */ vec1 32 ssa_79 = fmul ssa_78, ssa_59 vec1 32 ssa_80 = fadd ssa_79, ssa_71 vec1 32 ssa_81 = intrinsic load_interpolated_input (ssa_0, ssa_2) (2, 2) /* base=2 */ /* component=2 */ /* in_Texcoord1 */ vec1 32 ssa_82 = fmul ssa_81, ssa_59 vec1 32 ssa_83 = fadd ssa_82, ssa_74 vec1 32 ssa_84 = intrinsic vulkan_resource_index (ssa_2) (0, 2, 6) /* desc-set=0 */ /* binding=2 */ /* desc_type=UBO */ vec1 32 ssa_85 = load_const (0x000000c0 /* 0.000000 */) vec4 32 ssa_86 = intrinsic load_ubo (ssa_84, ssa_85) (0, 64, 0) /* access=0 */ /* align_mul=64 */ /* align_offset=0 */ vec1 32 ssa_87 = fmul ssa_77, ssa_86.x vec1 32 ssa_88 = fmul ssa_80, ssa_86.y vec1 32 ssa_89 = fadd ssa_87, ssa_88 vec1 32 ssa_90 = fmul ssa_83, ssa_86.z vec1 32 ssa_91 = fadd ssa_89, ssa_90 vec1 32 ssa_92 = load_const (0x000000e0 /* 0.000000 */) vec4 32 ssa_93 = intrinsic load_ubo (ssa_84, ssa_92) (0, 32, 0) /* access=0 */ /* align_mul=32 */ /* align_offset=0 */ vec1 32 ssa_94 = fmul ssa_77, ssa_93.x vec1 32 ssa_95 = fmul ssa_80, ssa_93.y vec1 32 ssa_96 = fadd ssa_94, ssa_95 vec1 32 ssa_97 = fmul ssa_83, ssa_93.z vec1 32 ssa_98 = fadd ssa_96, ssa_97 vec1 32 ssa_99 = load_const (0x000000d0 /* 0.000000 */) vec4 32 ssa_100 = intrinsic load_ubo (ssa_84, ssa_99) (0, 16, 0) /* access=0 */ /* align_mul=16 */ /* align_offset=0 */ vec1 32 ssa_101 = fmul ssa_77, ssa_100.x vec1 32 ssa_102 = fmul ssa_80, ssa_100.y vec1 32 ssa_103 = fadd ssa_101, ssa_102 vec1 32 ssa_104 = fmul ssa_83, ssa_100.z vec1 32 ssa_105 = fadd ssa_103, ssa_104 vec1 32 ssa_106 = fmul ssa_91, ssa_91 vec1 32 ssa_107 = fmul ssa_98, ssa_98 vec1 32 ssa_108 = fadd ssa_106, ssa_107 vec1 32 ssa_109 = fmul ssa_105, ssa_105 vec1 32 ssa_110 = fadd ssa_108, ssa_109 vec1 32 ssa_111 = frsq ssa_110 vec1 32 ssa_112 = fmin ssa_111, ssa_56 vec1 32 ssa_113 = fmul ssa_91, ssa_112 vec1 32 ssa_114 = fmul ssa_98, ssa_112 vec1 32 ssa_115 = fmul ssa_105, ssa_112 vec1 32 ssa_116 = fabs ssa_114 vec1 32 ssa_117 = fabs ssa_113 vec1 32 ssa_118 = fmax ssa_117, ssa_116 vec1 32 ssa_119 = fabs ssa_115 vec1 32 ssa_120 = fmax ssa_119, ssa_118 vec1 32 ssa_121 = frcp ssa_120 vec1 32 ssa_122 = fmin ssa_121, ssa_56 vec1 1 ssa_123 = fge ssa_116, ssa_120 vec1 32 ssa_124 = bcsel ssa_123, ssa_117, ssa_116 vec1 1 ssa_125 = fge ssa_119, ssa_120 vec1 32 ssa_126 = bcsel ssa_125, ssa_117, ssa_124 vec1 32 ssa_127 = bcsel ssa_125, ssa_116, ssa_119 vec1 1 ssa_128 = fge ssa_126, ssa_127 vec1 32 ssa_129 = bcsel ssa_128, ssa_126, ssa_127 vec1 32 ssa_130 = bcsel ssa_128, ssa_127, ssa_126 vec1 32 ssa_131 = frcp ssa_129 vec1 32 ssa_132 = fmin ssa_131, ssa_56 vec1 32 ssa_133 = fmul ssa_130, ssa_132 vec1 32 ssa_134 = deref_var &s6_2d (uniform sampler2D) vec2 32 ssa_135 = vec2 ssa_129, ssa_133 vec4 32 ssa_136 = tex ssa_134 (texture_deref), ssa_134 (sampler_deref), ssa_135 (coord) vec1 32 ssa_137 = load_const (0x3f000000 /* 0.500000 */) vec1 32 ssa_138 = fmul ssa_113, ssa_137 vec1 32 ssa_139 = fmul ssa_138, ssa_122 vec1 32 ssa_140 = fmul ssa_139, ssa_136.x vec1 32 ssa_141 = fadd ssa_140, ssa_137 vec1 32 ssa_142 = fmul ssa_114, ssa_137 vec1 32 ssa_143 = fmul ssa_142, ssa_122 vec1 32 ssa_144 = fmul ssa_143, ssa_136.x vec1 32 ssa_145 = fadd ssa_144, ssa_137 vec1 32 ssa_146 = fmul ssa_115, ssa_137 vec1 32 ssa_147 = fmul ssa_146, ssa_122 vec1 32 ssa_148 = fmul ssa_147, ssa_136.x vec1 32 ssa_149 = fadd ssa_148, ssa_137 vec1 32 ssa_150 = load_const (0x00000580 /* 0.000000 */) vec4 32 ssa_151 = intrinsic load_ubo (ssa_84, ssa_150) (0, 128, 0) /* access=0 */ /* align_mul=128 */ /* align_offset=0 */ vec1 32 ssa_152 = load_const (0x3ba3d70a /* 0.005000 */) vec1 32 ssa_153 = fmul ssa_152, ssa_151.x intrinsic discard_if (ssa_8) () vec1 32 ssa_154 = load_const (0x00000590 /* 0.000000 */) vec4 32 ssa_155 = intrinsic load_ubo (ssa_84, ssa_154) (0, 16, 0) /* access=0 */ /* align_mul=16 */ /* align_offset=0 */ vec4 32 ssa_156 = vec4 ssa_30, ssa_32, ssa_34, ssa_155.x intrinsic store_output (ssa_156, ssa_2) (16, 15, 0, 160) /* base=16 */ /* wrmask=xyzw */ /* component=0 */ /* type=float32 */ /* oC0 */ vec4 32 ssa_157 = vec4 ssa_37, ssa_37, ssa_37, ssa_2 intrinsic store_output (ssa_157, ssa_2) (20, 15, 0, 160) /* base=20 */ /* wrmask=xyzw */ /* component=0 */ /* type=float32 */ /* oC1 */ vec4 32 ssa_158 = vec4 ssa_141, ssa_145, ssa_149, ssa_153 intrinsic store_output (ssa_158, ssa_2) (24, 15, 0, 160) /* base=24 */ /* wrmask=xyzw */ /* component=0 */ /* type=float32 */ /* oC2 */ vec1 32 ssa_159 = intrinsic load_interpolated_input (ssa_0, ssa_2) (1, 3) /* base=1 */ /* component=3 */ /* in_Texcoord2 */ vec4 32 ssa_160 = vec4 ssa_159, ssa_159, ssa_159, ssa_159 intrinsic store_output (ssa_160, ssa_2) (28, 15, 0, 160) /* base=28 */ /* wrmask=xyzw */ /* component=0 */ /* type=float32 */ /* oC3 */ /* succs: block_1 */ block block_1: } LLVM IR: BB0 /* logical preds: / linear preds: / kind: uniform, top-level, discard_if, */ s2: %162:s[0-1], s1: %163:s[2], s1: %164:s[3], s1: %165:s[4], s1: %166:s[5], v2: %167:v[0-1], s2: %168:exec = p_startpgm p_logical_start s2: %278:exec, s1: %277:scc = s_wqm_b64 %168 s2: %175 = p_create_vector %163, 0xffff8000 s8: %176 = s_load_dwordx8 %175, 0 reorder s4: %178 = s_load_dwordx4 %175, 0x50 reorder v1: %169, v1: %170 = p_split_vector %167 v1: %173 = v_interp_p1_f32 %169, %165:m0 attr0.y v1: %4 = v_interp_p2_f32 %170, %165:m0, %173 attr0.y v1: %174 = v_interp_p1_f32 %169, %165:m0 attr0.x v1: %5 = v_interp_p2_f32 %170, %165:m0, %174 attr0.x v2: %6 = p_create_vector %5, %4 v2: %180 = p_wqm %6 v1: %179 = image_sample %180, %176, %178 2d reorder v1: %185 = v_mbcnt_lo_u32_b32 -1, 0 v1: %13 = v_mbcnt_hi_u32_b32 -1, %185 v1: %15 = v_lshrrev_b32 5, %13 s2: %17 = v_cmp_gt_i32 1, %15 s2: %20 = v_cmp_gt_i32 2, %15 v1: %23 = v_and_b32 28, %13 s2: %9 = v_cmp_gt_f32 0x3ea8f5c3, %179 s2: %181, s1: %182:scc = s_and_b64 %0:exec, %9 s2: %10 = p_wqm %181 s1: %183, s1: %11 = p_split_vector %10 v1: %186 = v_mov_b32 %183 v1: %18 = v_cndmask_b32 %11, %186, %17 v1: %21 = v_cndmask_b32 0, %18, %20 v1: %24 = v_lshrrev_b32 %23, %21 v1: %26 = v_and_b32 15, %24 s2: %27 = v_cmp_eq_i32 15, %26 s2: %190, s1: %189:scc = s_and_b64 %27, %0:exec s2: %280:exec, s1: %279:scc = s_andn2_b64 %278:exec, %190 s2: %282, s1: %281:scc = s_andn2_b64 %168, %190 p_exit_early_if %281:scc s8: %192 = s_load_dwordx8 %175, 0xc0 reorder s4: %194 = s_load_dwordx4 %175, 0x110 reorder v3: %195 = image_sample %180, %192, %194 2d reorder s8: %204 = s_load_dwordx8 %175, 0x240 reorder s4: %206 = s_load_dwordx4 %175, 0x290 reorder v1: %207 = image_sample %180, %204, %206 2d reorder s8: %210 = s_load_dwordx8 %175, 0x180 reorder s4: %212 = s_load_dwordx4 %175, 0x1d0 reorder v3: %213 = image_sample %180, %210, %212 dmask:xyw 2d reorder s8: %248 = s_load_dwordx8 %175, 0x300 reorder s4: %250 = s_load_dwordx4 %175, 0x350 reorder s1: %228, s1: %227:scc = s_add_i32 0x50, %164 s2: %229 = p_create_vector %228, 0xffff8000 s4: %230 = s_load_dwordx4 %229, 0 reorder v1: %200 = v_interp_p1_f32 %169, %165:m0 attr0.z v1: %30 = v_interp_p2_f32 %170, %165:m0, %200 attr0.z v1: %201 = v_interp_p1_f32 %169, %165:m0 attr0.w s4: %87 = s_buffer_load_dwordx4 %230, 0xc0 s4: %94 = s_buffer_load_dwordx4 %230, 0xe0 s4: %101 = s_buffer_load_dwordx4 %230, 0xd0 s1: %57 = s_mov_b32 0x7f7fffff v1: %218 = v_interp_p1_f32 %169, %165:m0 attr3.x v1: %61 = v_interp_p2_f32 %170, %165:m0, %218 attr3.x v1: %219 = v_interp_p1_f32 %169, %165:m0 attr3.y v1: %63 = v_interp_p2_f32 %170, %165:m0, %219 attr3.y v1: %220 = v_interp_p1_f32 %169, %165:m0 attr3.z v1: %65 = v_interp_p2_f32 %170, %165:m0, %220 attr3.z v1: %221 = v_interp_p1_f32 %169, %165:m0 attr1.x v1: %67 = v_interp_p2_f32 %170, %165:m0, %221 attr1.x v1: %222 = v_interp_p1_f32 %169, %165:m0 attr1.y v1: %70 = v_interp_p2_f32 %170, %165:m0, %222 attr1.y v1: %223 = v_interp_p1_f32 %169, %165:m0 attr1.z v1: %73 = v_interp_p2_f32 %170, %165:m0, %223 attr1.z v1: %224 = v_interp_p1_f32 %169, %165:m0 attr2.x v1: %76 = v_interp_p2_f32 %170, %165:m0, %224 attr2.x v1: %225 = v_interp_p1_f32 %169, %165:m0 attr2.y v1: %79 = v_interp_p2_f32 %170, %165:m0, %225 attr2.y v1: %226 = v_interp_p1_f32 %169, %165:m0 attr2.z v1: %82 = v_interp_p2_f32 %170, %165:m0, %226 attr2.z s1: %231, s1: %232, s1: %233, s1: %234 = p_split_vector %87 s1: %237, s1: %238, s1: %239, s1: %240 = p_split_vector %94 v1: %215, v1: %216, v1: %217 = p_split_vector %213 s1: %243, s1: %244, s1: %245, s1: %246 = p_split_vector %101 v1: %44 = v_mad_f32 2.0, %215, -1.0 v1: %46 = v_mad_f32 2.0, %217, -1.0 v1: %48 = v_mad_f32 2.0, %216, -1.0 v1: %49 = v_mul_f32 %46, %44 v1: %52 = v_mad_f32 %49, -%49, 1.0 v1: %54 = v_mad_f32 %48, -%48, %52 v1: %56 = v_rsq_f32 |%54| v1: %58 = v_min_f32 %57, %56 v1: %59 = v_rcp_f32 %58 v1: %60 = v_min_f32 %57, %59 v1: %62 = v_mul_f32 %48, %61 v1: %64 = v_mul_f32 %48, %63 v1: %66 = v_mul_f32 %48, %65 v1: %69 = v_mad_f32 %67, %49, -%62 v1: %72 = v_mad_f32 %70, %49, -%64 v1: %75 = v_mad_f32 %73, %49, -%66 v1: %78 = v_mad_f32 %76, %60, %69 v1: %81 = v_mad_f32 %79, %60, %72 v1: %84 = v_mad_f32 %82, %60, %75 v1: %89 = v_mul_f32 %232, %81 v1: %90 = v_mad_f32 %231, %78, %89 v1: %92 = v_mad_f32 %233, %84, %90 v1: %96 = v_mul_f32 %238, %81 v1: %97 = v_mad_f32 %237, %78, %96 v1: %99 = v_mad_f32 %239, %84, %97 v1: %103 = v_mul_f32 %244, %81 v1: %104 = v_mad_f32 %243, %78, %103 v1: %106 = v_mad_f32 %245, %84, %104 v1: %108 = v_mul_f32 %99, %99 v1: %109 = v_mad_f32 %92, %92, %108 v1: %111 = v_mad_f32 %106, %106, %109 v1: %112 = v_rsq_f32 %111 v1: %113 = v_min_f32 %57, %112 v1: %114 = v_mul_f32 %92, %113 v1: %115 = v_mul_f32 %99, %113 v1: %116 = v_mul_f32 %106, %113 v1: %121 = v_max3_f32 |%116|, |%114|, |%115| v1: %122 = v_rcp_f32 %121 v1: %123 = v_min_f32 %57, %122 s2: %124 = v_cmp_ge_f32 |%115|, %121 v1: %125 = v_cndmask_b32 |%115|, |%114|, %124 s2: %126 = v_cmp_ge_f32 |%116|, %121 v1: %127 = v_cndmask_b32 %125, |%114|, %126 v1: %128 = v_cndmask_b32 |%116|, |%115|, %126 s2: %129 = v_cmp_ge_f32 %127, %128 v1: %130 = v_cndmask_b32 %128, %127, %129 v1: %131 = v_cndmask_b32 %127, %128, %129 v1: %132 = v_rcp_f32 %130 v1: %133 = v_min_f32 %57, %132 v1: %134 = v_mul_f32 %131, %133 v2: %136 = p_create_vector %130, %134 v2: %252 = p_wqm %136 v1: %251 = image_sample %252, %248, %250 2d reorder s4: %152 = s_buffer_load_dwordx4 %230, 0x580 v1: %32 = v_interp_p2_f32 %170, %165:m0, %201 attr0.w v1: %202 = v_interp_p1_f32 %169, %165:m0 attr2.w v1: %34 = v_interp_p2_f32 %170, %165:m0, %202 attr2.w s2: %261, s1: %260:scc = s_and_b64 %9, %0:exec v1: %197, v1: %198, v1: %199 = p_split_vector %195 v1: %31 = v_mul_f32 %197, %30 v1: %33 = v_mul_f32 %198, %32 v1: %35 = v_mul_f32 %199, %34 v1: %38 = v_mul_f32 %207, %207 s1: %255 = p_extract_vector %152, 0 v1: %154 = v_mul_f32 0x3ba3d70a, %255 v1: %139 = v_mul_f32 0.5, %114 v1: %140 = v_mul_f32 %139, %123 v1: %143 = v_mul_f32 0.5, %115 v1: %144 = v_mul_f32 %143, %123 v1: %147 = v_mul_f32 0.5, %116 v1: %148 = v_mul_f32 %147, %123 v1: %142 = v_mad_f32 %140, %251, 0.5 v1: %146 = v_mad_f32 %144, %251, 0.5 v1: %150 = v_mad_f32 %148, %251, 0.5 s2: %284:exec, s1: %283:scc = s_andn2_b64 %280:exec, %261 s2: %286, s1: %285:scc = s_andn2_b64 %282, %261 p_exit_early_if %285:scc s4: %156 = s_buffer_load_dwordx4 %230, 0x590 v1: %269 = v_cvt_pkrtz_f16_f32 %31, %33 s1: %264 = p_extract_vector %156, 0 v1: %270 = v_cvt_pkrtz_f16_f32 %35, %264 s2: %289, s1: %288:scc, s2: %287:exec = s_and_saveexec_b64 %286, %284:exec exp %269, %270, v1: undef, v1: undef compr mrt0 v1: %272 = v_cvt_pkrtz_f16_f32 %38, %38 v1: %273 = v_cvt_pkrtz_f16_f32 %38, 0 exp %272, %273, v1: undef, v1: undef compr mrt1 v1: %274 = v_cvt_pkrtz_f16_f32 %142, %146 v1: %275 = v_cvt_pkrtz_f16_f32 %150, %154 exp %274, %275, v1: undef, v1: undef compr mrt2 v1: %276 = v_interp_p1_f32 %169, %165:m0 attr1.w v1: %160 = v_interp_p2_f32 %170, %165:m0, %276 attr1.w exp %160, v1: undef, v1: undef, v1: undef en:r*** mrt3 p_logical_end s_endpgm DISASM: BB0: s_mov_b64 s[0:1], exec ; be80047e s_wqm_b64 exec, exec ; befe0a7e s_mov_b32 s5, s3 ; be850303 s_movk_i32 s3, 0x8000 ; b0038000 s_load_dwordx8 s[8:15], s[2:3], 0x0 ; f40c0201 fa000000 s_load_dwordx4 s[16:19], s[2:3], 0x50 ; f4080401 fa000050 s_mov_b32 m0, s4 ; befc0304 v_interp_p1_f32_e32 v2, v0, attr0.y ; c8080100 v_interp_p2_f32_e32 v2, v1, attr0.y ; c8090101 v_interp_p1_f32_e32 v3, v0, attr0.x ; c80c0000 v_interp_p2_f32_e32 v3, v1, attr0.x ; c80d0001 v_mov_b32_e32 v4, v2 ; 7e080302 s_waitcnt lgkmcnt(0) ; bf8cc07f image_sample v2, v[3:4], s[8:15], s[16:19] dmask:0x1 dim:SQ_RSRC_IMG_2D ; f0800108 00820203 v_mbcnt_lo_u32_b32_e64 v5, -1, 0 ; d7650005 000100c1 v_mbcnt_hi_u32_b32_e64 v5, -1, v5 ; d7660005 00020ac1 v_lshrrev_b32_e32 v6, 5, v5 ; 2c0c0a85 v_cmp_gt_i32_e32 vcc, 1, v6 ; 7d080c81 v_cmp_gt_i32_e64 s[6:7], 2, v6 ; d4840006 00020c82 v_and_b32_e32 v5, 28, v5 ; 360a0a9c s_waitcnt vmcnt(0) ; bf8c3f70 v_cmp_gt_f32_e64 s[8:9], 0x3ea8f5c3, v2 ; d4040008 000204ff 3ea8f5c3 s_and_b64 s[10:11], exec, s[8:9] ; 878a087e v_mov_b32_e32 v2, s10 ; 7e04020a v_cndmask_b32_e32 v2, s11, v2, vcc ; 0204040b v_cndmask_b32_e64 v2, 0, v2, s[6:7] ; d5010002 001a0480 v_lshrrev_b32_e32 v2, v5, v2 ; 2c040505 v_and_b32_e32 v2, 15, v2 ; 3604048f v_cmp_eq_i32_e32 vcc, 15, v2 ; 7d04048f s_and_b64 s[6:7], vcc, exec ; 87867e6a s_andn2_b64 exec, exec, s[6:7] ; 8afe067e s_andn2_b64 s[0:1], s[0:1], s[6:7] ; 8a800600 s_cbranch_scc0 BB1 ; bf8400be s_load_dwordx8 s[12:19], s[2:3], 0xc0 ; f40c0301 fa0000c0 s_load_dwordx4 s[20:23], s[2:3], 0x110 ; f4080501 fa000110 s_waitcnt lgkmcnt(0) ; bf8cc07f image_sample v[5:7], v[3:4], s[12:19], s[20:23] dmask:0x7 dim:SQ_RSRC_IMG_2D ; f0800708 00a30503 v_nop ; 7e000000 s_load_dwordx8 s[12:19], s[2:3], 0x240 ; f40c0301 fa000240 s_load_dwordx4 s[20:23], s[2:3], 0x290 ; f4080501 fa000290 s_waitcnt lgkmcnt(0) ; bf8cc07f image_sample v2, v[3:4], s[12:19], s[20:23] dmask:0x1 dim:SQ_RSRC_IMG_2D ; f0800108 00a30203 v_nop ; 7e000000 s_load_dwordx8 s[12:19], s[2:3], 0x180 ; f40c0301 fa000180 s_load_dwordx4 s[20:23], s[2:3], 0x1d0 ; f4080501 fa0001d0 s_waitcnt lgkmcnt(0) ; bf8cc07f image_sample v[8:10], v[3:4], s[12:19], s[20:23] dmask:0xb dim:SQ_RSRC_IMG_2D ; f0800b08 00a30803 v_nop ; 7e000000 s_load_dwordx8 s[12:19], s[2:3], 0x300 ; f40c0301 fa000300 s_load_dwordx4 s[20:23], s[2:3], 0x350 ; f4080501 fa000350 s_add_i32 s2, 0x50, s5 ; 810205ff 00000050 s_movk_i32 s3, 0x8000 ; b0038000 s_load_dwordx4 s[4:7], s[2:3], 0x0 ; f4080101 fa000000 v_interp_p1_f32_e32 v3, v0, attr0.z ; c80c0200 v_interp_p2_f32_e32 v3, v1, attr0.z ; c80d0201 v_interp_p1_f32_e32 v4, v0, attr0.w ; c8100300 s_waitcnt lgkmcnt(0) ; bf8cc07f s_buffer_load_dwordx4 s[24:27], s[4:7], 0xc0 ; f4280602 fa0000c0 s_buffer_load_dwordx4 s[28:31], s[4:7], 0xe0 ; f4280702 fa0000e0 s_buffer_load_dwordx4 s[32:35], s[4:7], 0xd0 ; f4280802 fa0000d0 s_mov_b32 s2, 0x7f7fffff ; be8203ff 7f7fffff v_interp_p1_f32_e32 v11, v0, attr3.x ; c82c0c00 v_interp_p2_f32_e32 v11, v1, attr3.x ; c82d0c01 v_interp_p1_f32_e32 v12, v0, attr3.y ; c8300d00 v_interp_p2_f32_e32 v12, v1, attr3.y ; c8310d01 v_interp_p1_f32_e32 v13, v0, attr3.z ; c8340e00 v_interp_p2_f32_e32 v13, v1, attr3.z ; c8350e01 v_interp_p1_f32_e32 v14, v0, attr1.x ; c8380400 v_interp_p2_f32_e32 v14, v1, attr1.x ; c8390401 v_interp_p1_f32_e32 v15, v0, attr1.y ; c83c0500 v_interp_p2_f32_e32 v15, v1, attr1.y ; c83d0501 v_interp_p1_f32_e32 v16, v0, attr1.z ; c8400600 v_interp_p2_f32_e32 v16, v1, attr1.z ; c8410601 v_interp_p1_f32_e32 v17, v0, attr2.x ; c8440800 v_interp_p2_f32_e32 v17, v1, attr2.x ; c8450801 v_interp_p1_f32_e32 v18, v0, attr2.y ; c8480900 v_interp_p2_f32_e32 v18, v1, attr2.y ; c8490901 v_interp_p1_f32_e32 v19, v0, attr2.z ; c84c0a00 v_interp_p2_f32_e32 v19, v1, attr2.z ; c84d0a01 s_waitcnt vmcnt(0) ; bf8c3f70 v_mad_f32 v8, 2.0, v8, -1.0 ; d5410008 03ce10f4 v_mad_f32 v10, 2.0, v10, -1.0 ; d541000a 03ce14f4 v_mad_f32 v9, 2.0, v9, -1.0 ; d5410009 03ce12f4 v_mul_f32_e32 v8, v10, v8 ; 1010110a v_mad_f32 v10, v8, -v8, 1.0 ; d541000a 43ca1108 v_mad_f32 v10, v9, -v9, v10 ; d541000a 442a1309 v_rsq_f32_e64 v10, |v10| ; d5ae010a 0000010a v_min_f32_e32 v10, s2, v10 ; 1e141402 v_rcp_f32_e32 v10, v10 ; 7e14550a v_min_f32_e32 v10, s2, v10 ; 1e141402 v_mul_f32_e32 v11, v9, v11 ; 10161709 v_mul_f32_e32 v12, v9, v12 ; 10181909 v_mul_f32_e32 v9, v9, v13 ; 10121b09 v_mad_f32 v11, v14, v8, -v11 ; d541000b 842e110e v_mad_f32 v12, v15, v8, -v12 ; d541000c 8432110f v_mad_f32 v8, v16, v8, -v9 ; d5410008 84261110 v_mac_f32_e32 v11, v17, v10 ; 3e161511 v_mac_f32_e32 v12, v18, v10 ; 3e181512 v_mac_f32_e32 v8, v19, v10 ; 3e101513 s_waitcnt lgkmcnt(0) ; bf8cc07f v_mul_f32_e32 v9, s25, v12 ; 10121819 v_mac_f32_e32 v9, s24, v11 ; 3e121618 v_mac_f32_e32 v9, s26, v8 ; 3e12101a v_mul_f32_e32 v10, s29, v12 ; 1014181d v_mac_f32_e32 v10, s28, v11 ; 3e14161c v_mac_f32_e32 v10, s30, v8 ; 3e14101e v_mul_f32_e32 v12, s33, v12 ; 10181821 v_mac_f32_e32 v12, s32, v11 ; 3e181620 v_mac_f32_e32 v12, s34, v8 ; 3e181022 v_mul_f32_e32 v8, v10, v10 ; 1010150a v_mac_f32_e32 v8, v9, v9 ; 3e101309 v_mac_f32_e32 v8, v12, v12 ; 3e10190c v_rsq_f32_e32 v8, v8 ; 7e105d08 v_min_f32_e32 v8, s2, v8 ; 1e101002 v_mul_f32_e32 v9, v9, v8 ; 10121109 v_mul_f32_e32 v10, v10, v8 ; 1014110a v_mul_f32_e32 v8, v12, v8 ; 1010110c v_max3_f32 v11, |v8|, |v9|, |v10| ; d554070b 042a1308 v_rcp_f32_e32 v12, v11 ; 7e18550b v_min_f32_e32 v12, s2, v12 ; 1e181802 v_cmp_ge_f32_e64 vcc, |v10|, v11 ; d406016a 0002170a v_cndmask_b32_e64 v13, |v10|, |v9|, vcc ; d501030d 01aa130a v_cmp_ge_f32_e64 vcc, |v8|, v11 ; d406016a 00021708 v_cndmask_b32_e64 v11, v13, |v9|, vcc ; d501020b 01aa130d v_cndmask_b32_e64 v13, |v8|, |v10|, vcc ; d501030d 01aa1508 v_cmp_ge_f32_e32 vcc, v11, v13 ; 7c0c1b0b v_cndmask_b32_e32 v14, v13, v11, vcc ; 021c170d v_cndmask_b32_e32 v11, v11, v13, vcc ; 02161b0b v_rcp_f32_e32 v13, v14 ; 7e1a550e v_min_f32_e32 v13, s2, v13 ; 1e1a1a02 v_mul_f32_e32 v15, v11, v13 ; 101e1b0b image_sample v11, v[14:15], s[12:19], s[20:23] dmask:0x1 dim:SQ_RSRC_IMG_2D ; f0800108 00a30b0e v_nop ; 7e000000 s_buffer_load_dwordx4 s[12:15], s[4:7], 0x580 ; f4280302 fa000580 v_interp_p2_f32_e32 v4, v1, attr0.w ; c8110301 v_interp_p1_f32_e32 v13, v0, attr2.w ; c8340b00 v_interp_p2_f32_e32 v13, v1, attr2.w ; c8350b01 s_and_b64 s[2:3], s[8:9], exec ; 87827e08 v_mul_f32_e32 v3, v5, v3 ; 10060705 v_mul_f32_e32 v4, v6, v4 ; 10080906 v_mul_f32_e32 v5, v7, v13 ; 100a1b07 v_mul_f32_e32 v2, v2, v2 ; 10040502 s_waitcnt lgkmcnt(0) ; bf8cc07f v_mul_f32_e64 v6, 0x3ba3d70a, s12 ; d5080006 000018ff 3ba3d70a v_mul_f32_e32 v7, 0.5, v9 ; 100e12f0 v_mul_f32_e32 v7, v7, v12 ; 100e1907 v_mul_f32_e32 v9, 0.5, v10 ; 101214f0 v_mul_f32_e32 v9, v9, v12 ; 10121909 v_mul_f32_e32 v8, 0.5, v8 ; 101010f0 v_mul_f32_e32 v8, v8, v12 ; 10101908 s_waitcnt vmcnt(0) ; bf8c3f70 v_mad_f32 v7, v7, v11, 0.5 ; d5410007 03c21707 v_mad_f32 v9, v9, v11, 0.5 ; d5410009 03c21709 v_mad_f32 v8, v8, v11, 0.5 ; d5410008 03c21708 s_andn2_b64 exec, exec, s[2:3] ; 8afe027e s_andn2_b64 s[0:1], s[0:1], s[2:3] ; 8a800200 s_cbranch_scc0 BB1 ; bf84001b s_buffer_load_dwordx4 s[4:7], s[4:7], 0x590 ; f4280102 fa000590 v_cvt_pkrtz_f16_f32_e64 v3, v3, v4 ; d52f0003 00020903 s_waitcnt lgkmcnt(0) ; bf8cc07f v_cvt_pkrtz_f16_f32_e64 v4, v5, s4 ; d52f0004 00000905 s_and_saveexec_b64 s[0:1], s[0:1] ; be802400 exp mrt0 v3, off, v4, off compr ; f8000405 80800403 v_cvt_pkrtz_f16_f32_e64 v5, v2, v2 ; d52f0005 00020502 v_cvt_pkrtz_f16_f32_e64 v2, v2, 0 ; d52f0002 00010102 exp mrt1 v5, off, v2, off compr ; f8000415 80800205 v_cvt_pkrtz_f16_f32_e64 v7, v7, v9 ; d52f0007 00021307 v_cvt_pkrtz_f16_f32_e64 v6, v8, v6 ; d52f0006 00020d08 exp mrt2 v7, off, v6, off compr ; f8000425 80800607 v_interp_p1_f32_e32 v0, v0, attr1.w ; c8000700 v_interp_p2_f32_e32 v0, v1, attr1.w ; c8010701 exp mrt3 v0, off, off, off done vm ; f8001831 80808000 s_endpgm ; bf810000 BB1: exp null off, off, off, off done vm ; f8001890 80808080 s_endpgm ; bf810000 Pixel Shader: *** SHADER CONFIG *** SPI_PS_INPUT_ADDR = 0x0002 SPI_PS_INPUT_ENA = 0x0002 *** SHADER STATS *** SGPRS: 40 VGPRS: 20 Spilled SGPRs: 0 Spilled VGPRs: 0 PrivMem VGPRS: 0 Code Size: 940 bytes LDS: 0 blocks Scratch: 0 bytes per wave Max Waves: 10 ******************** ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. sh: umr: command not found The number of active waves = 0 Compute Shader: NIR: shader: MESA_SHADER_COMPUTE name: meta_buffer_fill local-size: 64, 1, 1 shared-size: 0 inputs: 0 outputs: 0 uniforms: 0 shared: 0 decl_function main (0 params) impl main { block block_0: /* preds: */ vec3 32 ssa_0 = intrinsic load_local_invocation_id () () vec3 32 ssa_1 = intrinsic load_work_group_id () () vec1 32 ssa_2 = load_const (0x00000006 /* 0.000000 */) vec1 32 ssa_3 = ishl ssa_1.x, ssa_2 vec1 32 ssa_4 = iadd ssa_3, ssa_0.x vec1 32 ssa_5 = load_const (0x00000004 /* 0.000000 */) vec1 32 ssa_6 = ishl ssa_4, ssa_5 vec1 32 ssa_7 = load_const (0x00000000 /* 0.000000 */) vec1 32 ssa_8 = intrinsic vulkan_resource_index (ssa_7) (0, 0, 0) /* desc-set=0 */ /* binding=0 */ /* desc_type=sampler */ /* fill_value */ vec1 32 ssa_9 = intrinsic load_push_constant (ssa_7) (0, 4) /* base=0 */ /* range=4 */ vec4 32 ssa_10 = vec4 /* fill_value */ ssa_9, /* fill_value */ ssa_9, /* fill_value */ ssa_9, /* fill_value */ ssa_9 intrinsic store_ssbo (ssa_10, ssa_8, ssa_6) (15, 8, 16, 0) /* wrmask=xyzw */ /* access=8 */ /* align_mul=16 */ /* align_offset=0 */ /* succs: block_1 */ block block_1: } LLVM IR: BB0 /* logical preds: / linear preds: / kind: uniform, top-level, */ s2: %12:s[0-1], s1: %13:s[2], s1: %14:s[3], s1: %15:s[4], s1: %16:s[5], v3: %17:v[0-2], s2: %18:exec = p_startpgm p_logical_start s2: %29 = p_create_vector %13, 0xffff8000 s4: %30 = s_load_dwordx4 %29, 0 reorder v1: %22 = p_extract_vector %17, 0 s1: %4, s1: %28:scc = s_lshl_b32 %15, 6 v1: %7 = v_add_lshl_u32 %4, %22, 4 v4: %31 = p_create_vector %14, %14, %14, %14 buffer_store_dwordx4 %7, %30, 0, %31 offen glc disable_wqm buffer p_logical_end s_endpgm DISASM: BB0: s_mov_b32 s0, s3 ; be800303 s_movk_i32 s3, 0x8000 ; b0038000 s_load_dwordx4 s[8:11], s[2:3], 0x0 ; f4080201 fa000000 s_lshl_b32 s1, s4, 6 ; 8f018604 v_add_lshl_u32 v0, s1, v0, 4 ; d7470000 02120001 v_mov_b32_e32 v4, s0 ; 7e080200 v_mov_b32_e32 v5, s0 ; 7e0a0200 v_mov_b32_e32 v6, s0 ; 7e0c0200 v_mov_b32_e32 v7, s0 ; 7e0e0200 s_waitcnt lgkmcnt(0) ; bf8cc07f buffer_store_dwordx4 v[4:7], v0, s[8:11], 0 offen glc ; e0785000 80020400 s_endpgm ; bf810000 Compute Shader: *** SHADER STATS *** SGPRS: 16 VGPRS: 8 Spilled SGPRs: 0 Spilled VGPRs: 0 PrivMem VGPRS: 0 Code Size: 60 bytes LDS: 0 blocks Scratch: 0 bytes per wave Max Waves: 10 ******************** >>> Adding process 20911 for game ID 20920 ERROR: ld.so: object '/home/daniel/.local/share/Steam/ubuntu12_32/gameoverlayrenderer.so' from LD_PRELOAD cannot be preloaded (wrong ELF class: ELFCLASS32): ignored. sh: umr: command not found The number of active waves = 0 Descriptors:  Image: SQ_IMG_RSRC_WORD0 <- 0x019086d0 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 128 (0x80) MIN_LOD = 0 FORMAT = IMG_FORMAT_BC1_UNORM WIDTH_LO = 3 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 63 (0x03f) HEIGHT = 255 (0x00ff) RESOURCE_LEVEL = 1 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 4 DST_SEL_Y = 5 DST_SEL_Z = 6 DST_SEL_W = 7 BASE_LEVEL = 0 LAST_LEVEL = 8 SW_MODE = 22 (0x16) BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 9 SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 8 MIN_LOD_WARN = 0 PERF_MOD = 4 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  FMASK: SQ_IMG_RSRC_WORD0 <- 0 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 0 MIN_LOD = 0 FORMAT = IMG_FORMAT_INVALID WIDTH_LO = 0 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 0 HEIGHT = 0 RESOURCE_LEVEL = 0 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 0 DST_SEL_Y = 0 DST_SEL_Z = 0 DST_SEL_W = 0 BASE_LEVEL = 0 LAST_LEVEL = 0 SW_MODE = 0 BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 0 SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 0 MIN_LOD_WARN = 0 PERF_MOD = 0 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  Sampler state: SQ_IMG_SAMP_WORD0 <- CLAMP_X = 0 CLAMP_Y = 0 CLAMP_Z = 0 MAX_ANISO_RATIO = 0 DEPTH_COMPARE_FUNC = 0 FORCE_UNNORMALIZED = 0 ANISO_THRESHOLD = 0 MC_COORD_TRUNC = 0 FORCE_DEGAMMA = 0 ANISO_BIAS = 0 TRUNC_COORD = 0 DISABLE_CUBE_WRAP = 0 FILTER_MODE = 0 SKIP_DEGAMMA = 0 SQ_IMG_SAMP_WORD1 <- MIN_LOD = 0 MAX_LOD = 0 PERF_MIP = 0 PERF_Z = 0 SQ_IMG_SAMP_WORD2 <- LOD_BIAS = 0 BORDER_COLOR_PTR = 0 BORDER_COLOR_TYPE = 0 LOD_BIAS_SEC = 0 XY_MAG_FILTER = 0 XY_MIN_FILTER = 0 Z_FILTER = 0 MIP_FILTER = 0 MIP_POINT_PRECLAMP = 0 ANISO_OVERRIDE = 0 BLEND_ZERO_PRT = 0 DERIV_ADJUST_EN = 0 SQ_IMG_SAMP_WORD3 <- BORDER_COLOR_PTR = 0 BORDER_COLOR_TYPE = 0  Image: SQ_IMG_RSRC_WORD0 <- 0x01002200 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 128 (0x80) MIN_LOD = 0 FORMAT = IMG_FORMAT_32_FLOAT WIDTH_LO = 0 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 0 HEIGHT = 0 RESOURCE_LEVEL = 1 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 0 DST_SEL_Y = 0 DST_SEL_Z = 0 DST_SEL_W = 0 BASE_LEVEL = 0 LAST_LEVEL = 0 SW_MODE = 22 (0x16) BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 13 (0xd) SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 0 MIN_LOD_WARN = 0 PERF_MOD = 4 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  FMASK: SQ_IMG_RSRC_WORD0 <- 0 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 0 MIN_LOD = 0 FORMAT = IMG_FORMAT_INVALID WIDTH_LO = 0 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 0 HEIGHT = 0 RESOURCE_LEVEL = 0 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 0 DST_SEL_Y = 0 DST_SEL_Z = 0 DST_SEL_W = 0 BASE_LEVEL = 0 LAST_LEVEL = 0 SW_MODE = 0 BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 0 SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 0 MIN_LOD_WARN = 0 PERF_MOD = 0 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  Sampler state: SQ_IMG_SAMP_WORD0 <- CLAMP_X = 0 CLAMP_Y = 2 CLAMP_Z = 6 MAX_ANISO_RATIO = 4 DEPTH_COMPARE_FUNC = 7 FORCE_UNNORMALIZED = 1 ANISO_THRESHOLD = 2 MC_COORD_TRUNC = 1 FORCE_DEGAMMA = 1 ANISO_BIAS = 26 (0x1a) TRUNC_COORD = 1 DISABLE_CUBE_WRAP = 0 FILTER_MODE = 3 SKIP_DEGAMMA = 1 SQ_IMG_SAMP_WORD1 <- MIN_LOD = 0 MAX_LOD = 0 PERF_MIP = 0 PERF_Z = 0 SQ_IMG_SAMP_WORD2 <- LOD_BIAS = 0 BORDER_COLOR_PTR = 0 BORDER_COLOR_TYPE = 0 LOD_BIAS_SEC = 0 XY_MAG_FILTER = 0 XY_MIN_FILTER = 0 Z_FILTER = 0 MIP_FILTER = 0 MIP_POINT_PRECLAMP = 0 ANISO_OVERRIDE = 0 BLEND_ZERO_PRT = 0 DERIV_ADJUST_EN = 0 SQ_IMG_SAMP_WORD3 <- BORDER_COLOR_PTR = 1 BORDER_COLOR_TYPE = 0  Image: SQ_IMG_RSRC_WORD0 <- 0x0190e8e0 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 128 (0x80) MIN_LOD = 0 FORMAT = IMG_FORMAT_BC1_UNORM WIDTH_LO = 3 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 63 (0x03f) HEIGHT = 255 (0x00ff) RESOURCE_LEVEL = 1 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 4 DST_SEL_Y = 5 DST_SEL_Z = 6 DST_SEL_W = 7 BASE_LEVEL = 0 LAST_LEVEL = 8 SW_MODE = 22 (0x16) BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 9 SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 8 MIN_LOD_WARN = 0 PERF_MOD = 4 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  FMASK: SQ_IMG_RSRC_WORD0 <- 0 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 0 MIN_LOD = 0 FORMAT = IMG_FORMAT_INVALID WIDTH_LO = 0 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 0 HEIGHT = 0 RESOURCE_LEVEL = 0 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 0 DST_SEL_Y = 0 DST_SEL_Z = 0 DST_SEL_W = 0 BASE_LEVEL = 0 LAST_LEVEL = 0 SW_MODE = 0 BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 0 SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 0 MIN_LOD_WARN = 0 PERF_MOD = 0 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  Sampler state: SQ_IMG_SAMP_WORD0 <- CLAMP_X = 0 CLAMP_Y = 0 CLAMP_Z = 0 MAX_ANISO_RATIO = 0 DEPTH_COMPARE_FUNC = 0 FORCE_UNNORMALIZED = 0 ANISO_THRESHOLD = 0 MC_COORD_TRUNC = 0 FORCE_DEGAMMA = 0 ANISO_BIAS = 0 TRUNC_COORD = 0 DISABLE_CUBE_WRAP = 0 FILTER_MODE = 0 SKIP_DEGAMMA = 0 SQ_IMG_SAMP_WORD1 <- MIN_LOD = 0 MAX_LOD = 0 PERF_MIP = 0 PERF_Z = 0 SQ_IMG_SAMP_WORD2 <- LOD_BIAS = 0 BORDER_COLOR_PTR = 0 BORDER_COLOR_TYPE = 0 LOD_BIAS_SEC = 0 XY_MAG_FILTER = 0 XY_MIN_FILTER = 0 Z_FILTER = 0 MIP_FILTER = 0 MIP_POINT_PRECLAMP = 0 ANISO_OVERRIDE = 0 BLEND_ZERO_PRT = 0 DERIV_ADJUST_EN = 0 SQ_IMG_SAMP_WORD3 <- BORDER_COLOR_PTR = 0 BORDER_COLOR_TYPE = 0  Image: SQ_IMG_RSRC_WORD0 <- 0x01002200 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 128 (0x80) MIN_LOD = 0 FORMAT = IMG_FORMAT_32_FLOAT WIDTH_LO = 0 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 0 HEIGHT = 0 RESOURCE_LEVEL = 1 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 0 DST_SEL_Y = 0 DST_SEL_Z = 0 DST_SEL_W = 0 BASE_LEVEL = 0 LAST_LEVEL = 0 SW_MODE = 22 (0x16) BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 13 (0xd) SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 0 MIN_LOD_WARN = 0 PERF_MOD = 4 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  FMASK: SQ_IMG_RSRC_WORD0 <- 0 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 0 MIN_LOD = 0 FORMAT = IMG_FORMAT_INVALID WIDTH_LO = 0 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 0 HEIGHT = 0 RESOURCE_LEVEL = 0 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 0 DST_SEL_Y = 0 DST_SEL_Z = 0 DST_SEL_W = 0 BASE_LEVEL = 0 LAST_LEVEL = 0 SW_MODE = 0 BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 0 SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 0 MIN_LOD_WARN = 0 PERF_MOD = 0 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  Sampler state: SQ_IMG_SAMP_WORD0 <- CLAMP_X = 0 CLAMP_Y = 2 CLAMP_Z = 6 MAX_ANISO_RATIO = 4 DEPTH_COMPARE_FUNC = 7 FORCE_UNNORMALIZED = 1 ANISO_THRESHOLD = 2 MC_COORD_TRUNC = 1 FORCE_DEGAMMA = 1 ANISO_BIAS = 26 (0x1a) TRUNC_COORD = 1 DISABLE_CUBE_WRAP = 0 FILTER_MODE = 3 SKIP_DEGAMMA = 1 SQ_IMG_SAMP_WORD1 <- MIN_LOD = 0 MAX_LOD = 0 PERF_MIP = 0 PERF_Z = 0 SQ_IMG_SAMP_WORD2 <- LOD_BIAS = 0 BORDER_COLOR_PTR = 0 BORDER_COLOR_TYPE = 0 LOD_BIAS_SEC = 0 XY_MAG_FILTER = 0 XY_MIN_FILTER = 0 Z_FILTER = 0 MIP_FILTER = 0 MIP_POINT_PRECLAMP = 0 ANISO_OVERRIDE = 0 BLEND_ZERO_PRT = 0 DERIV_ADJUST_EN = 0 SQ_IMG_SAMP_WORD3 <- BORDER_COLOR_PTR = 1 BORDER_COLOR_TYPE = 0  Image: SQ_IMG_RSRC_WORD0 <- 0x018b9bb0 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 128 (0x80) MIN_LOD = 0 FORMAT = IMG_FORMAT_BC1_UNORM WIDTH_LO = 3 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 63 (0x03f) HEIGHT = 255 (0x00ff) RESOURCE_LEVEL = 1 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 4 DST_SEL_Y = 5 DST_SEL_Z = 6 DST_SEL_W = 7 BASE_LEVEL = 0 LAST_LEVEL = 8 SW_MODE = 22 (0x16) BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 9 SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 8 MIN_LOD_WARN = 0 PERF_MOD = 4 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  FMASK: SQ_IMG_RSRC_WORD0 <- 0 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 0 MIN_LOD = 0 FORMAT = IMG_FORMAT_INVALID WIDTH_LO = 0 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 0 HEIGHT = 0 RESOURCE_LEVEL = 0 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 0 DST_SEL_Y = 0 DST_SEL_Z = 0 DST_SEL_W = 0 BASE_LEVEL = 0 LAST_LEVEL = 0 SW_MODE = 0 BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 0 SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 0 MIN_LOD_WARN = 0 PERF_MOD = 0 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  Sampler state: SQ_IMG_SAMP_WORD0 <- CLAMP_X = 0 CLAMP_Y = 0 CLAMP_Z = 0 MAX_ANISO_RATIO = 0 DEPTH_COMPARE_FUNC = 0 FORCE_UNNORMALIZED = 0 ANISO_THRESHOLD = 0 MC_COORD_TRUNC = 0 FORCE_DEGAMMA = 0 ANISO_BIAS = 0 TRUNC_COORD = 0 DISABLE_CUBE_WRAP = 0 FILTER_MODE = 0 SKIP_DEGAMMA = 0 SQ_IMG_SAMP_WORD1 <- MIN_LOD = 0 MAX_LOD = 0 PERF_MIP = 0 PERF_Z = 0 SQ_IMG_SAMP_WORD2 <- LOD_BIAS = 0 BORDER_COLOR_PTR = 0 BORDER_COLOR_TYPE = 0 LOD_BIAS_SEC = 0 XY_MAG_FILTER = 0 XY_MIN_FILTER = 0 Z_FILTER = 0 MIP_FILTER = 0 MIP_POINT_PRECLAMP = 0 ANISO_OVERRIDE = 0 BLEND_ZERO_PRT = 0 DERIV_ADJUST_EN = 0 SQ_IMG_SAMP_WORD3 <- BORDER_COLOR_PTR = 0 BORDER_COLOR_TYPE = 0  Image: SQ_IMG_RSRC_WORD0 <- 0x01002200 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 128 (0x80) MIN_LOD = 0 FORMAT = IMG_FORMAT_32_FLOAT WIDTH_LO = 0 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 0 HEIGHT = 0 RESOURCE_LEVEL = 1 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 0 DST_SEL_Y = 0 DST_SEL_Z = 0 DST_SEL_W = 0 BASE_LEVEL = 0 LAST_LEVEL = 0 SW_MODE = 22 (0x16) BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 13 (0xd) SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 0 MIN_LOD_WARN = 0 PERF_MOD = 4 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  FMASK: SQ_IMG_RSRC_WORD0 <- 0 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 0 MIN_LOD = 0 FORMAT = IMG_FORMAT_INVALID WIDTH_LO = 0 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 0 HEIGHT = 0 RESOURCE_LEVEL = 0 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 0 DST_SEL_Y = 0 DST_SEL_Z = 0 DST_SEL_W = 0 BASE_LEVEL = 0 LAST_LEVEL = 0 SW_MODE = 0 BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 0 SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 0 MIN_LOD_WARN = 0 PERF_MOD = 0 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  Sampler state: SQ_IMG_SAMP_WORD0 <- CLAMP_X = 0 CLAMP_Y = 2 CLAMP_Z = 6 MAX_ANISO_RATIO = 4 DEPTH_COMPARE_FUNC = 7 FORCE_UNNORMALIZED = 1 ANISO_THRESHOLD = 2 MC_COORD_TRUNC = 1 FORCE_DEGAMMA = 1 ANISO_BIAS = 26 (0x1a) TRUNC_COORD = 1 DISABLE_CUBE_WRAP = 0 FILTER_MODE = 3 SKIP_DEGAMMA = 1 SQ_IMG_SAMP_WORD1 <- MIN_LOD = 0 MAX_LOD = 0 PERF_MIP = 0 PERF_Z = 0 SQ_IMG_SAMP_WORD2 <- LOD_BIAS = 0 BORDER_COLOR_PTR = 0 BORDER_COLOR_TYPE = 0 LOD_BIAS_SEC = 0 XY_MAG_FILTER = 0 XY_MIN_FILTER = 0 Z_FILTER = 0 MIP_FILTER = 0 MIP_POINT_PRECLAMP = 0 ANISO_OVERRIDE = 0 BLEND_ZERO_PRT = 0 DERIV_ADJUST_EN = 0 SQ_IMG_SAMP_WORD3 <- BORDER_COLOR_PTR = 1 BORDER_COLOR_TYPE = 0  Image: SQ_IMG_RSRC_WORD0 <- 0x01901570 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 128 (0x80) MIN_LOD = 0 FORMAT = IMG_FORMAT_BC1_UNORM WIDTH_LO = 3 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 63 (0x03f) HEIGHT = 255 (0x00ff) RESOURCE_LEVEL = 1 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 4 DST_SEL_Y = 5 DST_SEL_Z = 6 DST_SEL_W = 7 BASE_LEVEL = 0 LAST_LEVEL = 8 SW_MODE = 22 (0x16) BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 9 SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 8 MIN_LOD_WARN = 0 PERF_MOD = 4 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  FMASK: SQ_IMG_RSRC_WORD0 <- 0 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 0 MIN_LOD = 0 FORMAT = IMG_FORMAT_INVALID WIDTH_LO = 0 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 0 HEIGHT = 0 RESOURCE_LEVEL = 0 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 0 DST_SEL_Y = 0 DST_SEL_Z = 0 DST_SEL_W = 0 BASE_LEVEL = 0 LAST_LEVEL = 0 SW_MODE = 0 BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 0 SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 0 MIN_LOD_WARN = 0 PERF_MOD = 0 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  Sampler state: SQ_IMG_SAMP_WORD0 <- CLAMP_X = 0 CLAMP_Y = 0 CLAMP_Z = 0 MAX_ANISO_RATIO = 0 DEPTH_COMPARE_FUNC = 0 FORCE_UNNORMALIZED = 0 ANISO_THRESHOLD = 0 MC_COORD_TRUNC = 0 FORCE_DEGAMMA = 0 ANISO_BIAS = 0 TRUNC_COORD = 0 DISABLE_CUBE_WRAP = 0 FILTER_MODE = 0 SKIP_DEGAMMA = 0 SQ_IMG_SAMP_WORD1 <- MIN_LOD = 0 MAX_LOD = 0 PERF_MIP = 0 PERF_Z = 0 SQ_IMG_SAMP_WORD2 <- LOD_BIAS = 0 BORDER_COLOR_PTR = 0 BORDER_COLOR_TYPE = 0 LOD_BIAS_SEC = 0 XY_MAG_FILTER = 0 XY_MIN_FILTER = 0 Z_FILTER = 0 MIP_FILTER = 0 MIP_POINT_PRECLAMP = 0 ANISO_OVERRIDE = 0 BLEND_ZERO_PRT = 0 DERIV_ADJUST_EN = 0 SQ_IMG_SAMP_WORD3 <- BORDER_COLOR_PTR = 0 BORDER_COLOR_TYPE = 0  Image: SQ_IMG_RSRC_WORD0 <- 0x01002200 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 128 (0x80) MIN_LOD = 0 FORMAT = IMG_FORMAT_32_FLOAT WIDTH_LO = 0 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 0 HEIGHT = 0 RESOURCE_LEVEL = 1 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 0 DST_SEL_Y = 0 DST_SEL_Z = 0 DST_SEL_W = 0 BASE_LEVEL = 0 LAST_LEVEL = 0 SW_MODE = 22 (0x16) BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 13 (0xd) SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 0 MIN_LOD_WARN = 0 PERF_MOD = 4 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  FMASK: SQ_IMG_RSRC_WORD0 <- 0 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 0 MIN_LOD = 0 FORMAT = IMG_FORMAT_INVALID WIDTH_LO = 0 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 0 HEIGHT = 0 RESOURCE_LEVEL = 0 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 0 DST_SEL_Y = 0 DST_SEL_Z = 0 DST_SEL_W = 0 BASE_LEVEL = 0 LAST_LEVEL = 0 SW_MODE = 0 BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 0 SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 0 MIN_LOD_WARN = 0 PERF_MOD = 0 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  Sampler state: SQ_IMG_SAMP_WORD0 <- CLAMP_X = 0 CLAMP_Y = 2 CLAMP_Z = 6 MAX_ANISO_RATIO = 4 DEPTH_COMPARE_FUNC = 7 FORCE_UNNORMALIZED = 1 ANISO_THRESHOLD = 2 MC_COORD_TRUNC = 1 FORCE_DEGAMMA = 1 ANISO_BIAS = 26 (0x1a) TRUNC_COORD = 1 DISABLE_CUBE_WRAP = 0 FILTER_MODE = 3 SKIP_DEGAMMA = 1 SQ_IMG_SAMP_WORD1 <- MIN_LOD = 0 MAX_LOD = 0 PERF_MIP = 0 PERF_Z = 0 SQ_IMG_SAMP_WORD2 <- LOD_BIAS = 0 BORDER_COLOR_PTR = 0 BORDER_COLOR_TYPE = 0 LOD_BIAS_SEC = 0 XY_MAG_FILTER = 0 XY_MIN_FILTER = 0 Z_FILTER = 0 MIP_FILTER = 0 MIP_POINT_PRECLAMP = 0 ANISO_OVERRIDE = 0 BLEND_ZERO_PRT = 0 DERIV_ADJUST_EN = 0 SQ_IMG_SAMP_WORD3 <- BORDER_COLOR_PTR = 1 BORDER_COLOR_TYPE = 0  Image: SQ_IMG_RSRC_WORD0 <- 0x01766600 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 128 (0x80) MIN_LOD = 0 FORMAT = IMG_FORMAT_8_UNORM WIDTH_LO = 3 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 255 (0x0ff) HEIGHT = 1023 (0x03ff) RESOURCE_LEVEL = 1 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 4 DST_SEL_Y = 4 DST_SEL_Z = 4 DST_SEL_W = 1 BASE_LEVEL = 0 LAST_LEVEL = 10 (0xa) SW_MODE = 27 (0x1b) BC_SWIZZLE = BC_SWIZZLE_XWYZ TYPE = 9 SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 10 (0xa) MIN_LOD_WARN = 0 PERF_MOD = 4 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  FMASK: SQ_IMG_RSRC_WORD0 <- 0 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 0 MIN_LOD = 0 FORMAT = IMG_FORMAT_INVALID WIDTH_LO = 0 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 0 HEIGHT = 0 RESOURCE_LEVEL = 0 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 0 DST_SEL_Y = 0 DST_SEL_Z = 0 DST_SEL_W = 0 BASE_LEVEL = 0 LAST_LEVEL = 0 SW_MODE = 0 BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 0 SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 0 MIN_LOD_WARN = 0 PERF_MOD = 0 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  Sampler state: SQ_IMG_SAMP_WORD0 <- CLAMP_X = 0 CLAMP_Y = 0 CLAMP_Z = 0 MAX_ANISO_RATIO = 0 DEPTH_COMPARE_FUNC = 0 FORCE_UNNORMALIZED = 0 ANISO_THRESHOLD = 0 MC_COORD_TRUNC = 0 FORCE_DEGAMMA = 0 ANISO_BIAS = 0 TRUNC_COORD = 0 DISABLE_CUBE_WRAP = 0 FILTER_MODE = 0 SKIP_DEGAMMA = 0 SQ_IMG_SAMP_WORD1 <- MIN_LOD = 0 MAX_LOD = 0 PERF_MIP = 0 PERF_Z = 0 SQ_IMG_SAMP_WORD2 <- LOD_BIAS = 0 BORDER_COLOR_PTR = 0 BORDER_COLOR_TYPE = 0 LOD_BIAS_SEC = 0 XY_MAG_FILTER = 0 XY_MIN_FILTER = 0 Z_FILTER = 0 MIP_FILTER = 0 MIP_POINT_PRECLAMP = 0 ANISO_OVERRIDE = 0 BLEND_ZERO_PRT = 0 DERIV_ADJUST_EN = 0 SQ_IMG_SAMP_WORD3 <- BORDER_COLOR_PTR = 0 BORDER_COLOR_TYPE = 0  Image: SQ_IMG_RSRC_WORD0 <- 0x01002200 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 128 (0x80) MIN_LOD = 0 FORMAT = IMG_FORMAT_32_FLOAT WIDTH_LO = 0 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 0 HEIGHT = 0 RESOURCE_LEVEL = 1 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 0 DST_SEL_Y = 0 DST_SEL_Z = 0 DST_SEL_W = 0 BASE_LEVEL = 0 LAST_LEVEL = 0 SW_MODE = 22 (0x16) BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 13 (0xd) SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 0 MIN_LOD_WARN = 0 PERF_MOD = 4 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  FMASK: SQ_IMG_RSRC_WORD0 <- 0 SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 0 MIN_LOD = 0 FORMAT = IMG_FORMAT_INVALID WIDTH_LO = 0 SQ_IMG_RSRC_WORD2 <- WIDTH_HI = 0 HEIGHT = 0 RESOURCE_LEVEL = 0 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = 0 DST_SEL_Y = 0 DST_SEL_Z = 0 DST_SEL_W = 0 BASE_LEVEL = 0 LAST_LEVEL = 0 SW_MODE = 0 BC_SWIZZLE = BC_SWIZZLE_XYZW TYPE = 0 SQ_IMG_RSRC_WORD4 <- DEPTH = 0 BASE_ARRAY = 0 SQ_IMG_RSRC_WORD5 <- ARRAY_PITCH = 0 MAX_MIP = 0 MIN_LOD_WARN = 0 PERF_MOD = 0 CORNER_SAMPLES = 0 LOD_HDW_CNT_EN = 0 PRT_DEFAULT = 0 BIG_PAGE = 0 SQ_IMG_RSRC_WORD6 <- COUNTER_BANK_ID = 0 ITERATE_256 = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 META_PIPE_ALIGNED = 0 WRITE_COMPRESS_ENABLE = 0 COMPRESSION_EN = 0 ALPHA_IS_ON_MSB = 0 COLOR_TRANSFORM = 0 META_DATA_ADDRESS_LO = 0 SQ_IMG_RSRC_WORD7 <- 0  Sampler state: SQ_IMG_SAMP_WORD0 <- CLAMP_X = 0 CLAMP_Y = 2 CLAMP_Z = 6 MAX_ANISO_RATIO = 4 DEPTH_COMPARE_FUNC = 7 FORCE_UNNORMALIZED = 1 ANISO_THRESHOLD = 2 MC_COORD_TRUNC = 1 FORCE_DEGAMMA = 1 ANISO_BIAS = 26 (0x1a) TRUNC_COORD = 1 DISABLE_CUBE_WRAP = 0 FILTER_MODE = 3 SKIP_DEGAMMA = 1 SQ_IMG_SAMP_WORD1 <- MIN_LOD = 0 MAX_LOD = 0 PERF_MIP = 0 PERF_Z = 0 SQ_IMG_SAMP_WORD2 <- LOD_BIAS = 0 BORDER_COLOR_PTR = 0 BORDER_COLOR_TYPE = 0 LOD_BIAS_SEC = 0 XY_MAG_FILTER = 0 XY_MIN_FILTER = 0 Z_FILTER = 0 MIP_FILTER = 0 MIP_POINT_PRECLAMP = 0 ANISO_OVERRIDE = 0 BLEND_ZERO_PRT = 0 DERIV_ADJUST_EN = 0 SQ_IMG_SAMP_WORD3 <- BORDER_COLOR_PTR = 1 BORDER_COLOR_TYPE = 0 >>> Adding process 20912 for game ID 20920 >>> Adding process 20913 for game ID 20920