Skip to content
GitLab
Explore
Sign in
Register
Mesa
mesa
Merge requests
Open
128
Merged
1,849
Closed
357
All
2,334
Actions
Subscribe to RSS feed
Recent searches
{{formattedKey}}
{{ title }}
{{ help }}
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
Upcoming
Started
{{title}}
None
Any
{{title}}
None
Any
{{title}}
None
Any
{{name}}
Yes
No
Yes
No
{{title}}
{{title}}
{{title}}
Priority
intel/brw/xe2+: Majority of enabling coopertive matrices
!28834
· created
Apr 19, 2024
by
Ian Romanick
ANV
NIR
intel-brw
0
updated
Apr 19, 2024
nir: store variable names to io instrs during io lowering
!28814
· created
Apr 18, 2024
by
Mike Blumenkrantz
NIR
zink
2
updated
Apr 18, 2024
nir/lower_clip: update inputs/ouputs read/written bitmask
!28798
· created
Apr 18, 2024
by
Juan A. Suárez
NIR
6
updated
Apr 19, 2024
util/format,nir: Fix some bugs and add a format conversion helper
!28793
· created
Apr 18, 2024
by
Faith Ekstrand
NIR
meson
util
1
11
updated
Apr 19, 2024
nir: implement loop invariant code motion (LICM) pass
!28783
· created
Apr 17, 2024
by
Daniel Schürmann
NIR
RADV
0
updated
Apr 17, 2024
nir: fixes for scalarized outputs
!28753
· created
Apr 15, 2024
by
Mike Blumenkrantz
NIR
llvmpipe
0
updated
Apr 15, 2024
nir, spirv: miscellaneous fixes for nir_discard
!28746
· created
Apr 15, 2024
by
Daniel Schürmann
NIR
SPIR-V
4
updated
Apr 16, 2024
nir/opt_16bit_tex_image: optimize packed conversions too
!28730
· created
Apr 13, 2024
by
Georg Lehmann
ACO
AMD common
NIR
RADV
radeonsi
9
updated
Apr 15, 2024
nir/lower_robust_access: also handle image derefs
!28681
· created
Apr 10, 2024
by
Alyssa Rosenzweig
NIR
1
updated
Apr 11, 2024
ir3: optimize SSBO accesses using isam.v and immediate offsets
!28664
· created
Apr 10, 2024
by
Job Noorman
NIR
freedreno
ir3
1
9
updated
Apr 11, 2024
nir/divergence: separately indicate whether loops have divergent continues or breaks
!28627
· created
Apr 08, 2024
by
Daniel Schürmann
NAK
NIR
8
updated
Apr 11, 2024
llvmpipe,nir: Emit debug information (shader debugging using GDB)
!28613
· created
Apr 06, 2024
by
Konstantin Seurer
NIR
llvmpipe
2
5
updated
Apr 10, 2024
nir/idiv_const: intel/compiler: Unify integer constant division optimizations
!28588
· created
Apr 05, 2024
by
Ian Romanick
NIR
intel-brw
intel-compiler
17
updated
Apr 19, 2024
spirv: Properly handle cross-invocation TCS output access
!28537
· created
Apr 03, 2024
by
Faith Ekstrand
ANV
NAK
NIR
SPIR-V
freedreno
hasvk
lavapipe
mesa
turnip
7
updated
Apr 03, 2024
nir: Move nir_tess_levels_defined_in_all_invocations from RadeonSI to NIR.
!28491
· created
Mar 31, 2024
by
Timur Kristóf
NIR
radeonsi
12
updated
Apr 02, 2024
Draft: tu: KHR_8bit_storage support
!28254
· created
Mar 18, 2024
by
Zan Dobersek
NIR
ir3
turnip
14
updated
Apr 19, 2024
mesa, radeonsi: Replace SHA1 with BLAKE3 in shader_info
!28156
· created
Mar 13, 2024
by
Saroj Kumar
GLSL
NIR
SPIR-V
gallium
mesa
meson
radeonsi
util
28
updated
Apr 04, 2024
nir/opt_loop: add loop peeling optimization
!28150
· created
Mar 13, 2024
by
Daniel Schürmann
NIR
24
updated
Apr 12, 2024
nir_loop_analyze: Fix iteration count guessing for loops with i <= limit
!27902
· created
Feb 29, 2024
by
Jesse Natalie
NIR
dozen
11
updated
Mar 12, 2024
nir, ac/nir: Add workgroup divergence analysis pass and use it for mesh shader output counts
!27797
· created
Feb 26, 2024
by
Timur Kristóf
AMD common
NIR
24
updated
Mar 27, 2024
Prev
1
2
3
4
5
…
7
Next