Commit f2f09abc authored by Keith Whitwell's avatar Keith Whitwell

linux-solo compiles as far as the gamma driver, which seems independently

broken?
parent 93320957
......@@ -48,9 +48,9 @@
#include "gamma_vb.h"
#include "gamma_tris.h"
extern const struct gl_pipeline_stage _gamma_render_stage;
extern const struct tnl_pipeline_stage _gamma_render_stage;
static const struct gl_pipeline_stage *gamma_pipeline[] = {
static const struct tnl_pipeline_stage *gamma_pipeline[] = {
&_tnl_vertex_transform_stage,
&_tnl_normal_transform_stage,
&_tnl_lighting_stage,
......
......@@ -178,7 +178,7 @@ static void VERT_FALLBACK( GLcontext *ctx,
tnl->Driver.Render.PrimitiveNotify( ctx, flags & PRIM_MODE_MASK );
tnl->Driver.Render.BuildVertices( ctx, start, count, ~0 );
tnl->Driver.Render.PrimTabVerts[flags&PRIM_MODE_MASK]( ctx, start, count, flags );
GAMMA_CONTEXT(ctx)->SetupNewInputs = VERT_BIT_CLIP;
GAMMA_CONTEXT(ctx)->SetupNewInputs = VERT_BIT_POS;
}
static const GLuint hw_prim[GL_POLYGON+1] = {
......@@ -236,7 +236,7 @@ static __inline void gammaEndPrimitive( gammaContextPtr gmesa )
static GLboolean gamma_run_render( GLcontext *ctx,
struct gl_pipeline_stage *stage )
struct tnl_pipeline_stage *stage )
{
gammaContextPtr gmesa = GAMMA_CONTEXT(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
......@@ -271,9 +271,9 @@ static GLboolean gamma_run_render( GLcontext *ctx,
static void gamma_check_render( GLcontext *ctx,
struct gl_pipeline_stage *stage )
struct tnl_pipeline_stage *stage )
{
GLuint inputs = VERT_BIT_CLIP | VERT_BIT_COLOR0;
GLuint inputs = VERT_BIT_POS | VERT_BIT_COLOR0;
if (ctx->RenderMode == GL_RENDER) {
if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR)
......@@ -293,13 +293,13 @@ static void gamma_check_render( GLcontext *ctx,
}
static void dtr( struct gl_pipeline_stage *stage )
static void dtr( struct tnl_pipeline_stage *stage )
{
(void)stage;
}
const struct gl_pipeline_stage _gamma_render_stage =
const struct tnl_pipeline_stage _gamma_render_stage =
{
"gamma render",
(_DD_NEW_SEPARATE_SPECULAR |
......
......@@ -278,7 +278,7 @@ void gammaBuildVertices( GLcontext *ctx,
if (!newinputs)
return;
if (newinputs & VERT_BIT_CLIP) {
if (newinputs & VERT_BIT_POS) {
setup_tab[gmesa->SetupIndex].emit( ctx, start, count, v, stride );
} else {
GLuint ind = 0;
......
......@@ -107,9 +107,9 @@ static const char * const card_extensions[] =
NULL
};
extern const struct gl_pipeline_stage _i810_render_stage;
extern const struct tnl_pipeline_stage _i810_render_stage;
static const struct gl_pipeline_stage *i810_pipeline[] = {
static const struct tnl_pipeline_stage *i810_pipeline[] = {
&_tnl_vertex_transform_stage,
&_tnl_normal_transform_stage,
&_tnl_lighting_stage,
......
......@@ -105,7 +105,7 @@ static void VERT_FALLBACK( GLcontext *ctx,
tnl->Driver.Render.BuildVertices( ctx, start, count, ~0 );
tnl->Driver.Render.PrimTabVerts[flags&PRIM_MODE_MASK]( ctx, start,
count, flags );
I810_CONTEXT(ctx)->SetupNewInputs = VERT_BIT_CLIP;
I810_CONTEXT(ctx)->SetupNewInputs = VERT_BIT_POS;
}
......@@ -137,12 +137,12 @@ static void VERT_FALLBACK( GLcontext *ctx,
static GLboolean i810_run_render( GLcontext *ctx,
struct gl_pipeline_stage *stage )
struct tnl_pipeline_stage *stage )
{
i810ContextPtr imesa = I810_CONTEXT(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
struct vertex_buffer *VB = &tnl->vb;
GLuint i, length, flags = 0;
GLuint i;
/* Don't handle clipping or indexed vertices.
*/
......@@ -150,17 +150,21 @@ static GLboolean i810_run_render( GLcontext *ctx,
return GL_TRUE;
}
imesa->SetupNewInputs = VERT_BIT_CLIP;
imesa->SetupNewInputs = VERT_BIT_POS;
tnl->Driver.Render.Start( ctx );
for (i = VB->FirstPrimitive ; !(flags & PRIM_LAST) ; i += length)
for (i = 0 ; i < VB->PrimitiveCount ; i++)
{
flags = VB->Primitive[i];
length= VB->PrimitiveLength[i];
if (length)
i810_render_tab_verts[flags & PRIM_MODE_MASK]( ctx, i, i + length,
flags );
GLuint prim = VB->Primitive[i].mode;
GLuint start = VB->Primitive[i].start;
GLuint length = VB->Primitive[i].count;
if (!length)
continue;
i810_render_tab_verts[prim & PRIM_MODE_MASK]( ctx, start, start + length,
prim );
}
tnl->Driver.Render.Finish( ctx );
......@@ -169,9 +173,9 @@ static GLboolean i810_run_render( GLcontext *ctx,
}
static void i810_check_render( GLcontext *ctx, struct gl_pipeline_stage *stage )
static void i810_check_render( GLcontext *ctx, struct tnl_pipeline_stage *stage )
{
GLuint inputs = VERT_BIT_CLIP | VERT_BIT_COLOR0;
GLuint inputs = VERT_BIT_POS | VERT_BIT_COLOR0;
if (ctx->RenderMode == GL_RENDER) {
if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR)
......@@ -191,13 +195,13 @@ static void i810_check_render( GLcontext *ctx, struct gl_pipeline_stage *stage )
}
static void dtr( struct gl_pipeline_stage *stage )
static void dtr( struct tnl_pipeline_stage *stage )
{
(void)stage;
}
const struct gl_pipeline_stage _i810_render_stage =
const struct tnl_pipeline_stage _i810_render_stage =
{
"i810 render",
(_DD_NEW_SEPARATE_SPECULAR |
......
......@@ -68,10 +68,10 @@ static drmBufMapPtr i810_create_empty_buffers(void)
{
drmBufMapPtr retval;
retval = (drmBufMapPtr)ALIGN_MALLOC(sizeof(drmBufMap));
retval = (drmBufMapPtr)MALLOC(sizeof(drmBufMap));
if(retval == NULL) return NULL;
memset(retval, 0, sizeof(drmBufMap));
retval->list = (drmBufPtr)ALIGN_MALLOC(sizeof(drmBuf) * I810_DMA_BUF_NR);
retval->list = (drmBufPtr)MALLOC(sizeof(drmBuf) * I810_DMA_BUF_NR);
if(retval->list == NULL) {
Xfree(retval);
return NULL;
......
......@@ -383,7 +383,7 @@ void i810BuildVertices( GLcontext *ctx,
if (!newinputs)
return;
if (newinputs & VERT_BIT_CLIP) {
if (newinputs & VERT_BIT_POS) {
setup_tab[imesa->SetupIndex].emit( ctx, start, count, v, stride );
} else {
GLuint ind = 0;
......
......@@ -167,9 +167,9 @@ static const char * const card_extensions[] =
};
extern const struct gl_pipeline_stage _i830_render_stage;
extern const struct tnl_pipeline_stage _i830_render_stage;
static const struct gl_pipeline_stage *i830_pipeline[] = {
static const struct tnl_pipeline_stage *i830_pipeline[] = {
&_tnl_vertex_transform_stage,
&_tnl_normal_transform_stage,
&_tnl_lighting_stage,
......
......@@ -122,7 +122,7 @@ static void VERT_FALLBACK( GLcontext *ctx,
tnl->Driver.Render.BuildVertices( ctx, start, count, ~0 );
tnl->Driver.Render.PrimTabVerts[flags&PRIM_MODE_MASK]( ctx, start,
count, flags );
I830_CONTEXT(ctx)->SetupNewInputs = VERT_BIT_CLIP;
I830_CONTEXT(ctx)->SetupNewInputs = VERT_BIT_POS;
}
......@@ -159,24 +159,27 @@ static GLboolean choose_render( struct vertex_buffer *VB, int bufsz )
int nr_rprims = 0;
int nr_rverts = 0;
int rprim = 0;
int i = 0, length, flags = 0;
int i;
for (i = VB->FirstPrimitive ; !(flags & PRIM_LAST) ; i += length) {
flags = VB->Primitive[i];
length = VB->PrimitiveLength[i];
for (i = 0 ; i < VB->PrimitiveCount ; i++)
{
GLuint prim = VB->Primitive[i].mode;
GLuint start = VB->Primitive[i].start;
GLuint length = VB->Primitive[i].count;
if (!length)
continue;
if (!hw_prim[flags & PRIM_MODE_MASK])
if (!hw_prim[prim & PRIM_MODE_MASK])
return GL_FALSE;
nr_prims++;
nr_rverts += length * scale_prim[flags & PRIM_MODE_MASK];
nr_rverts += length * scale_prim[prim & PRIM_MODE_MASK];
if (reduced_prim[flags&PRIM_MODE_MASK] != rprim) {
if (reduced_prim[prim&PRIM_MODE_MASK] != rprim) {
nr_rprims++;
rprim = reduced_prim[flags&PRIM_MODE_MASK];
rprim = reduced_prim[prim&PRIM_MODE_MASK];
}
}
......@@ -192,7 +195,7 @@ static GLboolean choose_render( struct vertex_buffer *VB, int bufsz )
static GLboolean i830_run_render( GLcontext *ctx,
struct gl_pipeline_stage *stage )
struct tnl_pipeline_stage *stage )
{
i830ContextPtr imesa = I830_CONTEXT(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
......@@ -205,16 +208,21 @@ static GLboolean i830_run_render( GLcontext *ctx,
return GL_TRUE;
}
imesa->SetupNewInputs = VERT_BIT_CLIP;
imesa->SetupNewInputs = VERT_BIT_POS;
tnl->Driver.Render.Start( ctx );
for (i = VB->FirstPrimitive ; !(flags & PRIM_LAST) ; i += length) {
flags = VB->Primitive[i];
length= VB->PrimitiveLength[i];
if (length)
i830_render_tab_verts[flags & PRIM_MODE_MASK]( ctx, i, i + length,
flags );
for (i = 0 ; i < VB->PrimitiveCount ; i++)
{
GLuint prim = VB->Primitive[i].mode;
GLuint start = VB->Primitive[i].start;
GLuint length = VB->Primitive[i].count;
if (!length)
continue;
i830_render_tab_verts[prim & PRIM_MODE_MASK]( ctx, start, start + length,
prim );
}
tnl->Driver.Render.Finish( ctx );
......@@ -224,9 +232,9 @@ static GLboolean i830_run_render( GLcontext *ctx,
static void i830_check_render( GLcontext *ctx,
struct gl_pipeline_stage *stage )
struct tnl_pipeline_stage *stage )
{
GLuint inputs = VERT_BIT_CLIP | VERT_BIT_COLOR0;
GLuint inputs = VERT_BIT_POS | VERT_BIT_COLOR0;
if (ctx->RenderMode == GL_RENDER) {
if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR)
inputs |= VERT_BIT_COLOR1;
......@@ -244,13 +252,13 @@ static void i830_check_render( GLcontext *ctx,
stage->inputs = inputs;
}
static void dtr( struct gl_pipeline_stage *stage )
static void dtr( struct tnl_pipeline_stage *stage )
{
(void)stage;
}
const struct gl_pipeline_stage _i830_render_stage =
const struct tnl_pipeline_stage _i830_render_stage =
{
"i830 render",
(_DD_NEW_SEPARATE_SPECULAR |
......
......@@ -57,7 +57,7 @@ static int i830_malloc_proxy_buf(drmBufMapPtr buffers)
drmBufPtr buf;
int i;
buffer = ALIGN_MALLOC(I830_DMA_BUF_SZ);
buffer = MALLOC(I830_DMA_BUF_SZ);
if(buffer == NULL) return -1;
for(i = 0; i < I830_DMA_BUF_NR; i++) {
buf = &(buffers->list[i]);
......@@ -71,10 +71,10 @@ static drmBufMapPtr i830_create_empty_buffers(void)
{
drmBufMapPtr retval;
retval = (drmBufMapPtr)ALIGN_MALLOC(sizeof(drmBufMap));
retval = (drmBufMapPtr)MALLOC(sizeof(drmBufMap));
if(retval == NULL) return NULL;
memset(retval, 0, sizeof(drmBufMap));
retval->list = (drmBufPtr)ALIGN_MALLOC(sizeof(drmBuf) * I830_DMA_BUF_NR);
retval->list = (drmBufPtr)MALLOC(sizeof(drmBuf) * I830_DMA_BUF_NR);
if(retval->list == NULL) {
Xfree(retval);
return NULL;
......
......@@ -445,7 +445,7 @@ void i830BuildVertices( GLcontext *ctx,
if (!newinputs)
return;
if (newinputs & VERT_BIT_CLIP) {
if (newinputs & VERT_BIT_POS) {
setup_tab[imesa->SetupIndex].emit( ctx, start, count, v, stride );
} else {
GLuint ind = 0;
......
......@@ -239,9 +239,9 @@ mgaDestroyScreen(__DRIscreenPrivate *sPriv)
}
extern const struct gl_pipeline_stage _mga_render_stage;
extern const struct tnl_pipeline_stage _mga_render_stage;
static const struct gl_pipeline_stage *mga_pipeline[] = {
static const struct tnl_pipeline_stage *mga_pipeline[] = {
&_tnl_vertex_transform_stage,
&_tnl_normal_transform_stage,
&_tnl_lighting_stage,
......@@ -647,7 +647,7 @@ void mgaGetLock( mgaContextPtr mmesa, GLuint flags )
if (*(dPriv->pStamp) != mmesa->lastStamp) {
mmesa->lastStamp = *(dPriv->pStamp);
mmesa->SetupNewInputs |= VERT_BIT_CLIP;
mmesa->SetupNewInputs |= VERT_BIT_POS;
mmesa->dirty_cliprects = (MGA_FRONT|MGA_BACK);
mgaUpdateRects( mmesa, (MGA_FRONT|MGA_BACK) );
}
......
......@@ -101,7 +101,7 @@ static void VERT_FALLBACK( GLcontext *ctx, GLuint start, GLuint count,
tnl->Driver.Render.PrimitiveNotify( ctx, flags & PRIM_MODE_MASK );
tnl->Driver.Render.BuildVertices( ctx, start, count, ~0 );
tnl->Driver.Render.PrimTabVerts[flags&PRIM_MODE_MASK]( ctx, start, count, flags );
MGA_CONTEXT(ctx)->SetupNewInputs |= VERT_BIT_CLIP;
MGA_CONTEXT(ctx)->SetupNewInputs |= VERT_BIT_POS;
}
#define LOCAL_VARS mgaContextPtr mmesa = MGA_CONTEXT(ctx)
......@@ -131,12 +131,12 @@ static void VERT_FALLBACK( GLcontext *ctx, GLuint start, GLuint count,
static GLboolean mga_run_render( GLcontext *ctx,
struct gl_pipeline_stage *stage )
struct tnl_pipeline_stage *stage )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
struct vertex_buffer *VB = &tnl->vb;
GLuint i, length, flags = 0;
GLuint i;
/* Don't handle clipping or indexed vertices or vertex manipulations.
*/
......@@ -147,13 +147,17 @@ static GLboolean mga_run_render( GLcontext *ctx,
tnl->Driver.Render.Start( ctx );
mmesa->SetupNewInputs = ~0;
for (i = VB->FirstPrimitive ; !(flags & PRIM_LAST) ; i += length)
for (i = 0 ; i < VB->PrimitiveCount ; i++)
{
flags = VB->Primitive[i];
length= VB->PrimitiveLength[i];
if (length)
mga_render_tab_verts[flags & PRIM_MODE_MASK]( ctx, i, i + length,
flags );
GLuint prim = VB->Primitive[i].mode;
GLuint start = VB->Primitive[i].start;
GLuint length = VB->Primitive[i].count;
if (!length)
continue;
mga_render_tab_verts[prim & PRIM_MODE_MASK]( ctx, start, start + length,
prim);
}
tnl->Driver.Render.Finish( ctx );
......@@ -162,9 +166,9 @@ static GLboolean mga_run_render( GLcontext *ctx,
}
static void mga_check_render( GLcontext *ctx, struct gl_pipeline_stage *stage )
static void mga_check_render( GLcontext *ctx, struct tnl_pipeline_stage *stage )
{
GLuint inputs = VERT_BIT_CLIP | VERT_BIT_COLOR0;
GLuint inputs = VERT_BIT_POS | VERT_BIT_COLOR0;
if (ctx->RenderMode == GL_RENDER) {
if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR)
......@@ -184,13 +188,13 @@ static void mga_check_render( GLcontext *ctx, struct gl_pipeline_stage *stage )
}
static void dtr( struct gl_pipeline_stage *stage )
static void dtr( struct tnl_pipeline_stage *stage )
{
(void)stage;
}
const struct gl_pipeline_stage _mga_render_stage =
const struct tnl_pipeline_stage _mga_render_stage =
{
"mga render",
(_DD_NEW_SEPARATE_SPECULAR |
......
......@@ -359,7 +359,7 @@ void mgaBuildVertices( GLcontext *ctx,
if (!newinputs)
return;
if (newinputs & VERT_BIT_CLIP) {
if (newinputs & VERT_BIT_POS) {
setup_tab[mmesa->SetupIndex].emit( ctx, start, count, v, stride );
} else {
GLuint ind = 0;
......
......@@ -379,7 +379,7 @@ void r128BuildVertices( GLcontext *ctx,
if (!newinputs)
return;
if (newinputs & VERT_BIT_CLIP) {
if (newinputs & VERT_BIT_POS) {
setup_tab[rmesa->SetupIndex].emit( ctx, start, count, v, stride );
} else {
GLuint ind = 0;
......
......@@ -673,8 +673,7 @@ static GLboolean r200_run_render( GLcontext *ctx,
_mesa_lookup_enum_by_nr(prim & PRIM_MODE_MASK),
start, start+length);
if (length)
tab[prim & PRIM_MODE_MASK]( ctx, start, start + length, flags );
tab[prim & PRIM_MODE_MASK]( ctx, start, start + length, flags );
}
tnl->Driver.Render.Finish( ctx );
......
......@@ -147,11 +147,11 @@ static const char * const card_extensions[] =
NULL
};
extern const struct gl_pipeline_stage _radeon_texrect_stage;
extern const struct gl_pipeline_stage _radeon_render_stage;
extern const struct gl_pipeline_stage _radeon_tcl_stage;
extern const struct tnl_pipeline_stage _radeon_texrect_stage;
extern const struct tnl_pipeline_stage _radeon_render_stage;
extern const struct tnl_pipeline_stage _radeon_tcl_stage;
static const struct gl_pipeline_stage *radeon_pipeline[] = {
static const struct tnl_pipeline_stage *radeon_pipeline[] = {
/* Try and go straight to t&l
*/
......@@ -392,6 +392,9 @@ radeonCreateContext( const __GLcontextModes *glVisual,
radeonInitState( rmesa );
radeonInitSwtcl( ctx );
_mesa_vector4f_alloc( &rmesa->tcl.ObjClean, 0,
ctx->Const.MaxArrayLockSize, 32 );
rmesa->iw.irq_seq = -1;
rmesa->irqsEmitted = 0;
rmesa->do_irqs = (rmesa->radeonScreen->irq && !getenv("RADEON_NO_IRQS"));
......@@ -486,6 +489,8 @@ void radeonDestroyContext( __DRIcontextPrivate *driContextPriv )
rmesa->glCtx->DriverCtx = NULL;
_mesa_destroy_context( rmesa->glCtx );
_mesa_vector4f_free( &rmesa->tcl.ObjClean );
if (rmesa->state.scissor.pClipRects) {
FREE(rmesa->state.scissor.pClipRects);
rmesa->state.scissor.pClipRects = 0;
......
......@@ -57,6 +57,8 @@ typedef struct radeon_context *radeonContextPtr;
#include "radeon_screen.h"
#include "mm.h"
#include "math/m_vector.h"
/* Flags for software fallback cases */
/* See correponding strings in radeon_swtcl.c */
#define RADEON_FALLBACK_TEXTURE 0x0001
......@@ -503,6 +505,11 @@ struct radeon_tcl_info {
GLint last_offset;
GLuint hw_primitive;
/* Temporary for cases where incoming vertex data is incompatible
* with maos code.
*/
GLvector4f ObjClean;
struct radeon_dma_region *aos_components[8];
GLuint nr_aos_components;
......@@ -698,12 +705,6 @@ struct radeon_context {
GLuint Fallback;
GLuint NewGLState;
/* Temporaries for translating away float colors:
*/
struct gl_client_array UbyteColor;
struct gl_client_array UbyteSecondaryColor;
/* Vertex buffers
*/
struct radeon_ioctl ioctl;
......
......@@ -40,7 +40,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "array_cache/acache.h"
#include "tnl/tnl.h"
#include "tnl/t_pipeline.h"
#include "tnl/t_imm_debug.h"
#include "radeon_context.h"
#include "radeon_state.h"
......@@ -53,7 +52,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define RADEON_TCL_MAX_SETUP 13
union emit_union { float f; GLuint ui; radeon_color_t specular; };
union emit_union { float f; GLuint ui; radeon_color_t rgba; };
static struct {
void (*emit)( GLcontext *, GLuint, GLuint, void * );
......@@ -308,6 +307,41 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
setup_tab[i].vertex_size * 4,
4);
/* The vertex code expects Obj to be clean to element 3. To fix
* this, add more vertex code (for obj-2, obj-3) or preferably move
* to maos.
*/
if (VB->ObjPtr->size < 3 ||
(VB->ObjPtr->size == 3 &&
(setup_tab[i].vertex_format & RADEON_CP_VC_FRMT_W0))) {
_math_trans_4f( rmesa->tcl.ObjClean.data,
VB->ObjPtr->data,
VB->ObjPtr->stride,
GL_FLOAT,
VB->ObjPtr->size,
0,
VB->Count );
switch (VB->ObjPtr->size) {
case 1:
_mesa_vector4f_clean_elem(&rmesa->tcl.ObjClean, VB->Count, 1);
case 2:
_mesa_vector4f_clean_elem(&rmesa->tcl.ObjClean, VB->Count, 2);
case 3:
if (setup_tab[i].vertex_format & RADEON_CP_VC_FRMT_W0) {
_mesa_vector4f_clean_elem(&rmesa->tcl.ObjClean, VB->Count, 3);
}
case 4:
default:
break;
}
VB->ObjPtr = &rmesa->tcl.ObjClean;
}
setup_tab[i].emit( ctx, 0, VB->Count,
rmesa->tcl.indexed_verts.address +
rmesa->tcl.indexed_verts.start );
......
......@@ -2115,10 +2115,30 @@ static void radeonInvalidateState( GLcontext *ctx, GLuint new_state )
radeonVtxfmtInvalidate( ctx );
}
/* A hack. Need a faster way to find this out.
*/
static GLboolean check_material( GLcontext *ctx )
{
TNLcontext *tnl = TNL_CONTEXT(ctx);
GLint i;
for (i = _TNL_ATTRIB_MAT_FRONT_AMBIENT;
i < _TNL_ATTRIB_MAT_BACK_INDEXES;
i++)
if (tnl->vb.AttribPtr[i] &&
tnl->vb.AttribPtr[i]->stride)
return GL_TRUE;
return GL_FALSE;
}
static void radeonWrapRunPipeline( GLcontext *ctx )
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
GLboolean has_material;
if (0)
fprintf(stderr, "%s, newstate: %x\n", __FUNCTION__, rmesa->NewGLState);
......@@ -2128,7 +2148,9 @@ static void radeonWrapRunPipeline( GLcontext *ctx )
if (rmesa->NewGLState)
radeonValidateState( ctx );
if (tnl->vb.Material) {
has_material = (ctx->Light.Enabled && check_material( ctx ));
if (has_material) {
TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_MATERIAL, GL_TRUE );
}
......@@ -2136,7 +2158,7 @@ static void radeonWrapRunPipeline( GLcontext *ctx )
*/
_tnl_run_pipeline( ctx );
if (tnl->vb.Material) {
if (has_material) {
TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_MATERIAL, GL_FALSE );
radeonUpdateMaterial( ctx ); /* not needed any more? */
}
......
......@@ -44,8 +44,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "math/m_translate.h"
#include "tnl/tnl.h"
#include "tnl/t_context.h"
#include "tnl/t_imm_exec.h"
#include "tnl/t_pipeline.h"
#include "tnl/t_vtx_api.h" /* for _tnl_FlushVertices */
#include "radeon_context.h"
#include "radeon_ioctl.h"
......@@ -567,7 +567,7 @@ static void VERT_FALLBACK( GLcontext *ctx,
tnl->Driver.Render.PrimitiveNotify( ctx, flags & PRIM_MODE_MASK );
tnl->Driver.Render.BuildVertices( ctx, start, count, ~0 );
tnl->Driver.Render.PrimTabVerts[flags&PRIM_MODE_MASK]( ctx, start, count, flags );
RADEON_CONTEXT(ctx)->swtcl.SetupNewInputs = VERT_BIT_CLIP;
RADEON_CONTEXT(ctx)->swtcl.SetupNewInputs = VERT_BIT_POS;
}
static void ELT_FALLBACK( GLcontext *ctx,
......@@ -579,7 +579,7 @@ static void ELT_FALLBACK( GLcontext *ctx,
tnl->Driver.Render.PrimitiveNotify( ctx, flags & PRIM_MODE_MASK );
tnl->Driver.Render.BuildVertices( ctx, start, count, ~0 );
tnl->Driver.Render.PrimTabElts[flags&PRIM_MODE_MASK]( ctx, start, count, flags );
RADEON_CONTEXT(ctx)->swtcl.SetupNewInputs = VERT_BIT_CLIP;
RADEON_CONTEXT(ctx)->swtcl.SetupNewInputs = VERT_BIT_POS;
}
......@@ -667,7 +667,7 @@ do { \
static GLboolean radeon_run_render( GLcontext *ctx,
struct gl_pipeline_stage *stage )
struct tnl_pipeline_stage *stage )
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
......@@ -701,18 +701,22 @@ static GLboolean radeon_run_render( GLcontext *ctx,
return GL_TRUE; /* too many vertices */
}
for (i = 0 ; !(flags & PRIM_LAST) ; i += length)
for (i = 0 ; i < VB->PrimitiveCount ; i++)
{
flags = VB->Primitive[i];
length = VB->PrimitiveLength[i];
GLuint prim = VB->Primitive[i].mode;
GLuint start = VB->Primitive[i].start;
GLuint length = VB->Primitive[i].count;
if (!length)
continue;
if (RADEON_DEBUG & DEBUG_PRIMS)
fprintf(stderr, "radeon_render.c: prim %s %d..%d\n",
_mesa_lookup_enum_by_nr(flags & PRIM_MODE_MASK),
i, i+length);
fprintf(stderr, "r200_render.c: prim %s %d..%d\n",
_mesa_lookup_enum_by_nr(prim & PRIM_MODE_MASK),
start, start+length);
if (length)