Commit e443d1ec authored by Vladimir Dergachev's avatar Vladimir Dergachev

Qualify the magic 20B0 register as SE_VTE_CNTL similar to R200. Looks like...

Qualify the magic 20B0 register as SE_VTE_CNTL similar to R200. Looks like disabling Z offset and scaling displays gears properly, not sure why. Perhaps the meaning of the bits has changed ?

Cleanup code a bit.
parent 92d47e79
......@@ -284,8 +284,8 @@ void r300InitCmdBuf(r300ContextPtr r300)
r300->hw.unk2080.cmd[0] = cmducs(0x2080, 1);
ALLOC_STATE( ovf, always, R300_OVF_CMDSIZE, "ovf", 0 );
r300->hw.ovf.cmd[R300_OVF_CMD_0] = cmducs(R300_VAP_OUTPUT_VTX_FMT_0, 2);
ALLOC_STATE( unk20B0, always, 3, "unk20B0", 0 );
r300->hw.unk20B0.cmd[0] = cmducs(0x20B0, 2);
ALLOC_STATE( vte, always, 3, "vte", 0 );
r300->hw.vte.cmd[0] = cmducs(R300_SE_VTE_CNTL, 2);
ALLOC_STATE( unk2134, always, 3, "unk2134", 0 );
r300->hw.unk2134.cmd[0] = cmducs(0x2134, 2);
ALLOC_STATE( unk2140, always, 2, "unk2140", 0 );
......@@ -415,7 +415,7 @@ void r300InitCmdBuf(r300ContextPtr r300)
insert_at_tail(&r300->hw.atomlist, &r300->hw.vpt);
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk2080);
insert_at_tail(&r300->hw.atomlist, &r300->hw.ovf);
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk20B0);
insert_at_tail(&r300->hw.atomlist, &r300->hw.vte);
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk2134);
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk2140);
insert_at_tail(&r300->hw.atomlist, &r300->hw.vir[0]);
......
......@@ -246,7 +246,7 @@ struct r300_hw_state {
struct r300_state_atom vpt; /* viewport (1D98) */
struct r300_state_atom unk2080; /* (2080) */
struct r300_state_atom ovf; /* output vertex format (2090) */
struct r300_state_atom unk20B0; /* (20B0) */
struct r300_state_atom vte; /* (20B0) */
struct r300_state_atom unk2134; /* (2134) */
struct r300_state_atom unk2140; /* (2140) */
struct r300_state_atom vir[2]; /* vap input route (2150/21E0) */
......
......@@ -245,10 +245,14 @@ static GLboolean r300_run_flat_render(GLcontext *ctx,
reg_start(0x4f18,0);
e32(0x00000003);
r300EmitState(rmesa);
rmesa->hw.vte.cmd[1] = R300_VPORT_X_SCALE_ENA
| R300_VPORT_X_OFFSET_ENA
| R300_VPORT_Y_SCALE_ENA
| R300_VPORT_Y_OFFSET_ENA
| R300_VTX_W0_FMT;
R300_STATECHANGE(rmesa, vte);
reg_start(0x20b0,0);
e32(0x0000043f);
r300EmitState(rmesa);
FLAT_COLOR_PIPELINE.vertex_shader.matrix[0].length=16;
memcpy(FLAT_COLOR_PIPELINE.vertex_shader.matrix[0].body.f, ctx->_ModelProjectMatrix.m, 16*4);
......@@ -318,7 +322,7 @@ static void upload_vertex_buffer(r300ContextPtr rmesa,
array[idx].ncomponents=v->size; \
array[idx].offset=rsp->gartTextures.handle+offset; \
array[idx].reg=r; \
offset+=v->size*4*VB->Count+16; \
offset+=v->size*4*VB->Count; \
idx++; \
}
......@@ -386,9 +390,6 @@ static GLboolean r300_run_vb_flat_render(GLcontext *ctx,
r300EmitState(rmesa);
reg_start(0x20b0,0);
e32(0x0000043f);
FLAT_COLOR_PIPELINE.vertex_shader.matrix[0].length=16;
memcpy(FLAT_COLOR_PIPELINE.vertex_shader.matrix[0].body.f, ctx->_ModelProjectMatrix.m, 16*4);
......@@ -398,13 +399,8 @@ static GLboolean r300_run_vb_flat_render(GLcontext *ctx,
FLAT_COLOR_PIPELINE.vertex_shader.unknown2.body.f[2]=1.0;
FLAT_COLOR_PIPELINE.vertex_shader.unknown2.body.f[3]=0.0;
FLAT_COLOR_PIPELINE.vap_input_route_1[0]=0xf688f688;
program_pipeline(PASS_PREFIX &FLAT_COLOR_PIPELINE);
reg_start(R300_RE_OCCLUSION_CNTL, 0);
e32(R300_OCCLUSION_ON);
set_quad0(PASS_PREFIX 1.0,1.0,1.0,1.0);
set_init21(PASS_PREFIX 0.0,1.0);
......@@ -533,10 +529,8 @@ static GLboolean r300_run_tex_render(GLcontext *ctx,
reg_start(0x4f18,0);
e32(0x00000003);
r300EmitState(rmesa);
reg_start(0x20b0,0);
e32(0x0000043f);
r300EmitState(rmesa);
SINGLE_TEXTURE_PIPELINE.vertex_shader.matrix[0].length=16;
memcpy(SINGLE_TEXTURE_PIPELINE.vertex_shader.matrix[0].body.f, ctx->_ModelProjectMatrix.m, 16*4);
......@@ -671,7 +665,7 @@ static GLboolean r300_run_render(GLcontext *ctx,
if(ctx->Texture.Unit[0].Enabled)
return r300_run_tex_render(ctx, stage);
else
return r300_run_vb_flat_render(ctx, stage);
return r300_run_flat_render(ctx, stage);
#else
return GL_TRUE;
#endif
......
......@@ -327,8 +327,14 @@ void r300ResetHwState(r300ContextPtr r300)
r300->hw.ovf.cmd[R300_OVF_FMT_0] = 0x00000003;
r300->hw.ovf.cmd[R300_OVF_FMT_1] = 0x00000000;
r300->hw.unk20B0.cmd[1] = 0x0000040A;
r300->hw.unk20B0.cmd[2] = 0x00000008;
r300->hw.vte.cmd[1] = R300_VPORT_X_SCALE_ENA
| R300_VPORT_X_OFFSET_ENA
| R300_VPORT_Y_SCALE_ENA
| R300_VPORT_Y_OFFSET_ENA
| R300_VPORT_Z_SCALE_ENA
| R300_VPORT_Z_OFFSET_ENA
| R300_VTX_W0_FMT;
r300->hw.vte.cmd[2] = 0x00000008;
r300->hw.unk2134.cmd[1] = 0x00FFFFFF;
r300->hw.unk2134.cmd[2] = 0x00000000;
......
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