Commit 575b35ee authored by Keith Whitwell's avatar Keith Whitwell

Merge commit 'origin/master' into gallium-resources

Conflicts:
	src/gallium/drivers/llvmpipe/lp_texture.c
	src/gallium/drivers/r300/r300_context.c
	src/gallium/drivers/r300/r300_texture.c
	src/gallium/winsys/drm/radeon/core/radeon_buffer.h
parents f29ac73f 9fc6c8b8
......@@ -41,7 +41,13 @@
#define DRI_INTERFACE_H
/* For archs with no drm.h */
#if !defined(__APPLE__) && !defined(__CYGWIN__) && !defined(__GNU__)
#if defined(__APPLE__) || defined(__CYGWIN__) || defined(__GNU__)
#ifndef __NOT_HAVE_DRM_H
#define __NOT_HAVE_DRM_H
#endif
#endif
#ifndef __NOT_HAVE_DRM_H
#include <drm.h>
#else
typedef unsigned int drm_context_t;
......
......@@ -227,6 +227,8 @@ pb_cache_is_buffer_compat(struct pb_cache_buffer *buf,
pb_size size,
const struct pb_desc *desc)
{
void *map;
if(buf->base.base.size < size)
return FALSE;
......@@ -239,6 +241,13 @@ pb_cache_is_buffer_compat(struct pb_cache_buffer *buf,
if(!pb_check_usage(desc->usage, buf->base.base.usage))
return FALSE;
map = pb_map(buf->buffer, PIPE_BUFFER_USAGE_DONTBLOCK);
if (!map) {
return FALSE;
}
pb_unmap(buf->buffer);
return TRUE;
}
......
......@@ -509,8 +509,8 @@ void
llvmpipe_init_screen_resource_funcs(struct pipe_screen *screen)
{
screen->resource_create = llvmpipe_resource_create;
screen->resource_from_handle = llvmpipe_resource_from_handle;
screen->resource_destroy = llvmpipe_resource_destroy;
screen->resource_from_handle = llvmpipe_resource_from_handle;
screen->resource_get_handle = llvmpipe_resource_get_handle;
screen->user_buffer_create = llvmpipe_user_buffer_create;
......
......@@ -35,7 +35,10 @@ nv50_clear(struct pipe_context *pipe, unsigned buffers,
struct nouveau_grobj *tesla = nv50->screen->tesla;
struct pipe_framebuffer_state *fb = &nv50->framebuffer;
unsigned mode = 0, i;
const unsigned dirty = nv50->dirty;
/* don't need NEW_BLEND, NV50TCL_COLOR_MASK doesn't affect CLEAR_BUFFERS */
nv50->dirty &= NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR;
if (!nv50_state_validate(nv50, 64))
return;
......@@ -64,5 +67,6 @@ nv50_clear(struct pipe_context *pipe, unsigned buffers,
BEGIN_RING(chan, tesla, NV50TCL_CLEAR_BUFFERS, 1);
OUT_RING (chan, (i << 6) | 0x3c);
}
nv50->dirty = dirty;
}
......@@ -109,7 +109,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, int param)
case PIPE_CAP_TWO_SIDED_STENCIL:
return 1;
case PIPE_CAP_GLSL:
return 0;
return 1;
case PIPE_CAP_ANISOTROPIC_FILTER:
return 1;
case PIPE_CAP_POINT_SPRITE:
......@@ -190,8 +190,6 @@ nv50_screen_destroy(struct pipe_screen *pscreen)
nouveau_bo_ref(NULL, &screen->tic);
if (screen->tsc)
nouveau_bo_ref(NULL, &screen->tsc);
if (screen->static_init)
so_ref(NULL, &screen->static_init);
nouveau_notifier_free(&screen->sync);
nouveau_grobj_free(&screen->tesla);
......@@ -204,16 +202,65 @@ nv50_screen_destroy(struct pipe_screen *pscreen)
FREE(screen);
}
#define BGN_RELOC(ch, bo, gr, m, n, fl) \
OUT_RELOC(ch, bo, (n << 18) | (gr->subc << 13) | m, fl, 0, 0)
void
nv50_screen_relocs(struct nv50_screen *screen)
{
struct nouveau_channel *chan = screen->base.channel;
struct nouveau_grobj *tesla = screen->tesla;
unsigned i;
const unsigned rl = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_DUMMY;
MARK_RING (chan, 28, 26);
/* cause grobj autobind */
BEGIN_RING(chan, tesla, 0x0100, 1);
OUT_RING (chan, 0);
BGN_RELOC (chan, screen->tic, tesla, NV50TCL_TIC_ADDRESS_HIGH, 2, rl);
OUT_RELOCh(chan, screen->tic, 0, rl);
OUT_RELOCl(chan, screen->tic, 0, rl);
BGN_RELOC (chan, screen->tsc, tesla, NV50TCL_TSC_ADDRESS_HIGH, 2, rl);
OUT_RELOCh(chan, screen->tsc, 0, rl);
OUT_RELOCl(chan, screen->tsc, 0, rl);
BGN_RELOC (chan, screen->constbuf_misc[0],
tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3, rl);
OUT_RELOCh(chan, screen->constbuf_misc[0], 0, rl);
OUT_RELOCl(chan, screen->constbuf_misc[0], 0, rl);
OUT_RELOC (chan, screen->constbuf_misc[0],
(NV50_CB_PMISC << 16) | 0x0200, rl, 0, 0);
BGN_RELOC (chan, screen->constbuf_misc[0],
tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3, rl);
OUT_RELOCh(chan, screen->constbuf_misc[0], 0x200, rl);
OUT_RELOCl(chan, screen->constbuf_misc[0], 0x200, rl);
OUT_RELOC (chan, screen->constbuf_misc[0],
(NV50_CB_AUX << 16) | 0x0200, rl, 0, 0);
for (i = 0; i < 3; ++i) {
BGN_RELOC (chan, screen->constbuf_parm[i],
tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3, rl);
OUT_RELOCh(chan, screen->constbuf_parm[i], 0, rl);
OUT_RELOCl(chan, screen->constbuf_parm[i], 0, rl);
OUT_RELOC (chan, screen->constbuf_parm[i],
((NV50_CB_PVP + i) << 16) | 0x0800, rl, 0, 0);
}
}
struct pipe_screen *
nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
{
struct nv50_screen *screen = CALLOC_STRUCT(nv50_screen);
struct nouveau_channel *chan;
struct pipe_screen *pscreen;
struct nouveau_stateobj *so;
unsigned chipset = dev->chipset;
unsigned tesla_class = 0;
int ret, i;
const unsigned rl = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD;
if (!screen)
return NULL;
......@@ -296,64 +343,58 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
}
/* Static M2MF init */
so = so_new(1, 3, 0);
so_method(so, screen->m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 3);
so_data (so, screen->sync->handle);
so_data (so, chan->vram->handle);
so_data (so, chan->vram->handle);
so_emit(chan, so);
so_ref (NULL, &so);
BEGIN_RING(chan, screen->m2mf,
NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 3);
OUT_RING (chan, screen->sync->handle);
OUT_RING (chan, chan->vram->handle);
OUT_RING (chan, chan->vram->handle);
/* Static 2D init */
so = so_new(4, 7, 0);
so_method(so, screen->eng2d, NV50_2D_DMA_NOTIFY, 4);
so_data (so, screen->sync->handle);
so_data (so, chan->vram->handle);
so_data (so, chan->vram->handle);
so_data (so, chan->vram->handle);
so_method(so, screen->eng2d, NV50_2D_OPERATION, 1);
so_data (so, NV50_2D_OPERATION_SRCCOPY);
so_method(so, screen->eng2d, NV50_2D_CLIP_ENABLE, 1);
so_data (so, 0);
so_method(so, screen->eng2d, 0x0888, 1);
so_data (so, 1);
so_emit(chan, so);
so_ref(NULL, &so);
BEGIN_RING(chan, screen->eng2d, NV50_2D_DMA_NOTIFY, 4);
OUT_RING (chan, screen->sync->handle);
OUT_RING (chan, chan->vram->handle);
OUT_RING (chan, chan->vram->handle);
OUT_RING (chan, chan->vram->handle);
BEGIN_RING(chan, screen->eng2d, NV50_2D_OPERATION, 1);
OUT_RING (chan, NV50_2D_OPERATION_SRCCOPY);
BEGIN_RING(chan, screen->eng2d, NV50_2D_CLIP_ENABLE, 1);
OUT_RING (chan, 0);
BEGIN_RING(chan, screen->eng2d, 0x0888, 1);
OUT_RING (chan, 1);
/* Static tesla init */
so = so_new(47, 95, 24);
so_method(so, screen->tesla, NV50TCL_COND_MODE, 1);
so_data (so, NV50TCL_COND_MODE_ALWAYS);
so_method(so, screen->tesla, NV50TCL_DMA_NOTIFY, 1);
so_data (so, screen->sync->handle);
so_method(so, screen->tesla, NV50TCL_DMA_ZETA, 11);
BEGIN_RING(chan, screen->tesla, NV50TCL_COND_MODE, 1);
OUT_RING (chan, NV50TCL_COND_MODE_ALWAYS);
BEGIN_RING(chan, screen->tesla, NV50TCL_DMA_NOTIFY, 1);
OUT_RING (chan, screen->sync->handle);
BEGIN_RING(chan, screen->tesla, NV50TCL_DMA_ZETA, 11);
for (i = 0; i < 11; i++)
so_data(so, chan->vram->handle);
so_method(so, screen->tesla, NV50TCL_DMA_COLOR(0),
NV50TCL_DMA_COLOR__SIZE);
OUT_RING (chan, chan->vram->handle);
BEGIN_RING(chan, screen->tesla,
NV50TCL_DMA_COLOR(0), NV50TCL_DMA_COLOR__SIZE);
for (i = 0; i < NV50TCL_DMA_COLOR__SIZE; i++)
so_data(so, chan->vram->handle);
so_method(so, screen->tesla, NV50TCL_RT_CONTROL, 1);
so_data (so, 1);
OUT_RING (chan, chan->vram->handle);
BEGIN_RING(chan, screen->tesla, NV50TCL_RT_CONTROL, 1);
OUT_RING (chan, 1);
/* activate all 32 lanes (threads) in a warp */
so_method(so, screen->tesla, NV50TCL_WARP_HALVES, 1);
so_data (so, 0x2);
so_method(so, screen->tesla, 0x1400, 1);
so_data (so, 0xf);
BEGIN_RING(chan, screen->tesla, NV50TCL_WARP_HALVES, 1);
OUT_RING (chan, 2);
BEGIN_RING(chan, screen->tesla, 0x1400, 1);
OUT_RING (chan, 0xf);
/* max TIC (bits 4:8) & TSC (ignored) bindings, per program type */
for (i = 0; i < 3; ++i) {
so_method(so, screen->tesla, NV50TCL_TEX_LIMITS(i), 1);
so_data (so, 0x54);
BEGIN_RING(chan, screen->tesla, NV50TCL_TEX_LIMITS(i), 1);
OUT_RING (chan, 0x54);
}
/* origin is top left (set to 1 for bottom left) */
so_method(so, screen->tesla, NV50TCL_Y_ORIGIN_BOTTOM, 1);
so_data (so, 0);
so_method(so, screen->tesla, NV50TCL_VP_REG_ALLOC_RESULT, 1);
so_data (so, 8);
BEGIN_RING(chan, screen->tesla, NV50TCL_Y_ORIGIN_BOTTOM, 1);
OUT_RING (chan, 0);
BEGIN_RING(chan, screen->tesla, NV50TCL_VP_REG_ALLOC_RESULT, 1);
OUT_RING (chan, 8);
/* constant buffers for immediates and VP/FP parameters */
ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, (32 * 4) * 4,
......@@ -362,6 +403,14 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
nv50_screen_destroy(pscreen);
return NULL;
}
BEGIN_RING(chan, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
OUT_RELOCh(chan, screen->constbuf_misc[0], 0, rl);
OUT_RELOCl(chan, screen->constbuf_misc[0], 0, rl);
OUT_RING (chan, (NV50_CB_PMISC << 16) | 0x0200);
BEGIN_RING(chan, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
OUT_RELOCh(chan, screen->constbuf_misc[0], 0x200, rl);
OUT_RELOCl(chan, screen->constbuf_misc[0], 0x200, rl);
OUT_RING (chan, (NV50_CB_AUX << 16) | 0x0200);
for (i = 0; i < 3; i++) {
ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, (256 * 4) * 4,
......@@ -370,6 +419,10 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
nv50_screen_destroy(pscreen);
return NULL;
}
BEGIN_RING(chan, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
OUT_RELOCh(chan, screen->constbuf_parm[i], 0, rl);
OUT_RELOCl(chan, screen->constbuf_parm[i], 0, rl);
OUT_RING (chan, ((NV50_CB_PVP + i) << 16) | 0x0800);
}
if (nouveau_resource_init(&screen->immd_heap[0], 0, 128) ||
......@@ -381,80 +434,16 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
return NULL;
}
/*
// map constant buffers:
// B = buffer ID (maybe more than 1 byte)
// N = CB index used in shader instruction
// P = program type (0 = VP, 2 = GP, 3 = FP)
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x000BBNP1);
*/
so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
so_reloc (so, screen->constbuf_misc[0], 0, NOUVEAU_BO_VRAM |
NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, screen->constbuf_misc[0], 0, NOUVEAU_BO_VRAM |
NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
so_data (so, (NV50_CB_PMISC << 16) | 0x00000200);
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x00000001 | (NV50_CB_PMISC << 12));
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x00000021 | (NV50_CB_PMISC << 12));
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x00000031 | (NV50_CB_PMISC << 12));
/* bind auxiliary constbuf to immediate data bo */
so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
so_reloc (so, screen->constbuf_misc[0], (128 * 4) * 4,
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, screen->constbuf_misc[0], (128 * 4) * 4,
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
so_data (so, (NV50_CB_AUX << 16) | 0x00000200);
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x00000201 | (NV50_CB_AUX << 12));
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x00000221 | (NV50_CB_AUX << 12));
so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
so_reloc (so, screen->constbuf_parm[PIPE_SHADER_VERTEX], 0,
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, screen->constbuf_parm[PIPE_SHADER_VERTEX], 0,
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
so_data (so, (NV50_CB_PVP << 16) | 0x00000800);
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x00000101 | (NV50_CB_PVP << 12));
so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
so_reloc (so, screen->constbuf_parm[PIPE_SHADER_GEOMETRY], 0,
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, screen->constbuf_parm[PIPE_SHADER_GEOMETRY], 0,
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
so_data (so, (NV50_CB_PGP << 16) | 0x00000800);
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x00000121 | (NV50_CB_PGP << 12));
so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
so_reloc (so, screen->constbuf_parm[PIPE_SHADER_FRAGMENT], 0,
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, screen->constbuf_parm[PIPE_SHADER_FRAGMENT], 0,
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
so_data (so, (NV50_CB_PFP << 16) | 0x00000800);
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x00000131 | (NV50_CB_PFP << 12));
ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, 3 * 32 * (8 * 4),
&screen->tic);
if (ret) {
nv50_screen_destroy(pscreen);
return NULL;
}
so_method(so, screen->tesla, NV50TCL_TIC_ADDRESS_HIGH, 3);
so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
so_data (so, 3 * 32 - 1);
BEGIN_RING(chan, screen->tesla, NV50TCL_TIC_ADDRESS_HIGH, 3);
OUT_RELOCh(chan, screen->tic, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
OUT_RELOCl(chan, screen->tic, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
OUT_RING (chan, 3 * 32 - 1);
ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, 3 * 32 * (8 * 4),
&screen->tsc);
......@@ -462,37 +451,50 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
nv50_screen_destroy(pscreen);
return NULL;
}
so_method(so, screen->tesla, NV50TCL_TSC_ADDRESS_HIGH, 3);
so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
so_data (so, 0x00000000); /* ignored if TSC_LINKED (0x1234) = 1 */
BEGIN_RING(chan, screen->tesla, NV50TCL_TSC_ADDRESS_HIGH, 3);
OUT_RELOCh(chan, screen->tsc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
OUT_RELOCl(chan, screen->tsc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
OUT_RING (chan, 0); /* ignored if TSC_LINKED (0x1234) == 1 */
/* map constant buffers:
* B = buffer ID (maybe more than 1 byte)
* N = CB index used in shader instruction
* P = program type (0 = VP, 2 = GP, 3 = FP)
* SET_PROGRAM_CB = 0x000BBNP1
*/
BEGIN_RING_NI(chan, screen->tesla, NV50TCL_SET_PROGRAM_CB, 8);
/* bind immediate buffer */
OUT_RING (chan, 0x001 | (NV50_CB_PMISC << 12));
OUT_RING (chan, 0x021 | (NV50_CB_PMISC << 12));
OUT_RING (chan, 0x031 | (NV50_CB_PMISC << 12));
/* bind auxiliary constbuf to immediate data bo */
OUT_RING (chan, 0x201 | (NV50_CB_AUX << 12));
OUT_RING (chan, 0x221 | (NV50_CB_AUX << 12));
/* bind parameter buffers */
OUT_RING (chan, 0x101 | (NV50_CB_PVP << 12));
OUT_RING (chan, 0x121 | (NV50_CB_PGP << 12));
OUT_RING (chan, 0x131 | (NV50_CB_PFP << 12));
/* Vertex array limits - max them out */
for (i = 0; i < 16; i++) {
so_method(so, screen->tesla, NV50TCL_VERTEX_ARRAY_LIMIT_HIGH(i), 2);
so_data (so, 0x000000ff);
so_data (so, 0xffffffff);
BEGIN_RING(chan, screen->tesla,
NV50TCL_VERTEX_ARRAY_LIMIT_HIGH(i), 2);
OUT_RING (chan, 0x000000ff);
OUT_RING (chan, 0xffffffff);
}
so_method(so, screen->tesla, NV50TCL_DEPTH_RANGE_NEAR(0), 2);
so_data (so, fui(0.0));
so_data (so, fui(1.0));
BEGIN_RING(chan, screen->tesla, NV50TCL_DEPTH_RANGE_NEAR(0), 2);
OUT_RINGf (chan, 0.0f);
OUT_RINGf (chan, 1.0f);
/* no dynamic combination of TIC & TSC entries => only BIND_TIC used */
so_method(so, screen->tesla, NV50TCL_LINKED_TSC, 1);
so_data (so, 1);
BEGIN_RING(chan, screen->tesla, NV50TCL_LINKED_TSC, 1);
OUT_RING (chan, 1);
so_method(so, screen->tesla, NV50TCL_EDGEFLAG_ENABLE, 1);
so_data (so, 1); /* default edgeflag to TRUE */
BEGIN_RING(chan, screen->tesla, NV50TCL_EDGEFLAG_ENABLE, 1);
OUT_RING (chan, 1); /* default edgeflag to TRUE */
so_emit(chan, so);
so_ref (so, &screen->static_init);
so_ref (NULL, &so);
nouveau_pushbuf_flush(chan, 0);
FIRE_RING (chan);
screen->force_push = debug_get_bool_option("NV50_ALWAYS_PUSH", FALSE);
return pscreen;
......
......@@ -27,8 +27,6 @@ struct nv50_screen {
struct nouveau_bo *tic;
struct nouveau_bo *tsc;
struct nouveau_stateobj *static_init;
boolean force_push;
};
......@@ -38,4 +36,6 @@ nv50_screen(struct pipe_screen *screen)
return (struct nv50_screen *)screen;
}
extern void nv50_screen_relocs(struct nv50_screen *);
#endif
......@@ -436,7 +436,7 @@ nv50_state_validate(struct nv50_context *nv50, unsigned wait_dwords)
so_emit_reloc_markers(chan, nv50->state.hw[3]); /* vp */
so_emit_reloc_markers(chan, nv50->state.hw[4]); /* fp */
so_emit_reloc_markers(chan, nv50->state.hw[17]); /* vb */
so_emit_reloc_markers(chan, nv50->screen->static_init);
nv50_screen_relocs(nv50->screen);
/* No idea.. */
BEGIN_RING(chan, tesla, 0x142c, 1);
......
......@@ -149,6 +149,9 @@ void r300_surface_copy(struct pipe_context* pipe,
case 4:
new_format = PIPE_FORMAT_B8G8R8A8_UNORM;
break;
case 8:
new_format = PIPE_FORMAT_R16G16B16A16_UNORM;
break;
default:
debug_printf("r300: surface_copy: Unhandled format: %s. Falling back to software.\n"
"r300: surface_copy: Software fallback doesn't work for tiled textures.\n",
......
......@@ -33,10 +33,11 @@
#include "r300_query.h"
#include "r300_render.h"
#include "r300_screen.h"
#include "r300_screen_buffer.h"
#include "r300_state_invariant.h"
#include "r300_texture.h"
#include "radeon_winsys.h"
#include "r300_transfer.h"
#include "r300_winsys.h"
static void r300_destroy_context(struct pipe_context* context)
{
......@@ -177,7 +178,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen,
/* Open up the OQ BO. */
r300->oqbo = pipe_buffer_create(screen, 4096,
PIPE_BUFFER_USAGE_VERTEX, 4096);
PIPE_BUFFER_USAGE_PIXEL, 4096);
make_empty_list(&r300->query_list);
r300_init_flush_functions(r300);
......
......@@ -31,6 +31,7 @@
#include "util/u_inlines.h"
#include "util/u_transfer.h"
#include "r300_defines.h"
#include "r300_screen.h"
struct u_upload_mgr;
......@@ -136,8 +137,6 @@ struct r300_texture_format_state {
uint32_t format2; /* R300_TX_FORMAT2: 0x4500 */
};
#define R300_MAX_TEXTURE_LEVELS 13
struct r300_texture_fb_state {
/* Colorbuffer. */
uint32_t colorpitch[R300_MAX_TEXTURE_LEVELS]; /* R300_RB3D_COLORPITCH[0-3]*/
......@@ -196,12 +195,6 @@ struct r300_ztop_state {
uint32_t z_buffer_top; /* R300_ZB_ZTOP: 0x4f14 */
};
#define R300_NEW_FRAGMENT_SHADER 0x00000020
#define R300_NEW_FRAGMENT_SHADER_CONSTANTS 0x00000040
#define R300_NEW_VERTEX_SHADER_CONSTANTS 0x10000000
#define R300_NEW_QUERY 0x40000000
#define R300_NEW_KITCHEN_SINK 0x7fffffff
/* The next several objects are not pure Radeon state; they inherit from
* various Gallium classes. */
......@@ -239,12 +232,6 @@ struct r300_query {
struct r300_query* next;
};
enum r300_buffer_tiling {
R300_BUFFER_LINEAR = 0,
R300_BUFFER_TILED,
R300_BUFFER_SQUARETILED
};
struct r300_texture {
/* Parent class */
struct u_resource b;
......@@ -444,4 +431,3 @@ static INLINE void CTX_DBG(struct r300_context * ctx, unsigned flags,
#define DBG CTX_DBG
#endif /* R300_CONTEXT_H */
......@@ -26,8 +26,7 @@
#include "util/u_math.h"
#include "r300_reg.h"
#include "radeon_winsys.h"
#include "r300_winsys.h"
/* Yes, I know macros are ugly. However, they are much prettier than the code
* that they neatly hide away, and don't have the cost of function setup,so
......
/*
* Copyright 2010 Marek Olšák <maraeo@gmail.com>
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE. */
#ifndef R300_DEFINES_H
#define R300_DEFINES_H
#include "pipe/p_defines.h"
#define R300_MAX_TEXTURE_LEVELS 13
#define R300_MAX_DRAW_VBO_SIZE (1024 * 1024)
#define R300_TEXTURE_USAGE_TRANSFER PIPE_TEXTURE_USAGE_CUSTOM
/* Non-atom dirty state flags. */
#define R300_NEW_FRAGMENT_SHADER 0x00000020
#define R300_NEW_FRAGMENT_SHADER_CONSTANTS 0x00000040
#define R300_NEW_VERTEX_SHADER_CONSTANTS 0x10000000
#define R300_NEW_QUERY 0x40000000
#define R300_NEW_KITCHEN_SINK 0x7fffffff
/* Tiling flags. */
enum r300_buffer_tiling {
R300_BUFFER_LINEAR = 0,
R300_BUFFER_TILED,
R300_BUFFER_SQUARETILED
};
#endif
......@@ -41,9 +41,6 @@
#include "r300_render.h"
#include "r300_state_derived.h"
/* r300_render: Vertex and index buffer primitive emission. */
#define R300_MAX_VBO_SIZE (1024 * 1024)
/* XXX The DRM rejects VAP_ALT_NUM_VERTICES.. */
//#define ENABLE_ALT_NUM_VERTS
......@@ -709,9 +706,9 @@ static boolean r300_render_allocate_vertices(struct vbuf_render* render,
r300render->vbo = pipe_buffer_create(screen,
64,
PIPE_BUFFER_USAGE_VERTEX,
R300_MAX_VBO_SIZE);
R300_MAX_DRAW_VBO_SIZE);
r300render->vbo_offset = 0;
r300render->vbo_size = R300_MAX_VBO_SIZE;
r300render->vbo_size = R300_MAX_DRAW_VBO_SIZE;
}
r300render->vertex_size = vertex_size;
......
......@@ -26,10 +26,8 @@
#include "r300_context.h"
#include "r300_texture.h"
#include "radeon_winsys.h"
#include "r300_screen_buffer.h"
#include "r300_winsys.h"
/* Return the identifier behind whom the brave coders responsible for this
* amalgamation of code, sweat, and duct tape, routinely obscure their names.
......
......@@ -28,10 +28,6 @@
#include "r300_chipset.h"
#define R300_TEXTURE_USAGE_TRANSFER PIPE_TEXTURE_USAGE_CUSTOM
struct radeon_winsys;
struct r300_screen {
/* Parent class */
struct pipe_screen screen;
......
......@@ -38,8 +38,7 @@
#include "r300_state_inlines.h"
#include "r300_fs.h"
#include "r300_vs.h"
#include "radeon_winsys.h"
#include "r300_winsys.h"
/* r300_state: Functions used to intialize state context by translating
* Gallium state objects into semi-native r300 state objects. */
......@@ -528,8 +527,8 @@ static void r300_fb_update_tiling_flags(struct r300_context *r300,
if (tex) {
r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
tex->pitch[0],
tex->microtile != 0,
tex->macrotile != 0);
tex->microtile,
tex->macrotile);
}
}
if (old_state->zsbuf &&
......@@ -540,8 +539,8 @@ static void r300_fb_update_tiling_flags(struct r300_context *r300,
if (tex) {
r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
tex->pitch[0],
tex->microtile != 0,
tex->macrotile != 0);
tex->microtile,
tex->macrotile);
}
}
......@@ -552,8 +551,8 @@ static void r300_fb_update_tiling_flags(struct r300_context *r300,
r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
tex->pitch[level],
tex->microtile != 0,
tex->mip_macrotile[level] != 0);
tex->microtile,
tex->mip_macrotile[level]);
}
if (new_state->zsbuf) {
tex = (struct r300_texture*)new_state->zsbuf->texture;
......@@ -561,8 +560,8 @@ static void r300_fb_update_tiling_flags(struct r300_context *r300,
r300->rws->buffer_set_tiling(r300->rws, tex->buffer,