Skip to content
GitLab
Explore
Sign in
Register
Mesa
mesa
Merge requests
Open
43
Merged
294
Closed
41
All
378
Actions
Subscribe to RSS feed
Recent searches
{{formattedKey}}
{{ title }}
{{ help }}
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
Upcoming
Started
{{title}}
None
Any
{{title}}
None
Any
{{title}}
None
Any
{{name}}
Yes
No
Yes
No
{{title}}
{{title}}
{{title}}
Closed date
nouveau: Silence unhandled cap warnings
!230
· created
Feb 09, 2019
by
Kenneth Graunke
master
nouveau
Closed
1
updated
Feb 09, 2019
Nir bindless texture support
!519
· created
Mar 24, 2019
by
Karol Herbst
master
GLSL
NIR
iris
nouveau
radeonsi
Closed
32
updated
Apr 15, 2019
tree-wide: replace `strerror(errno)` with `%m`
!3864
· created
Feb 18, 2020
by
Eric Engestrom
master
EGL
GLX
etnaviv
freedreno
gallium
i965
iris
mesa
nouveau
util
virgl
vulkan
Closed
1
9
updated
Feb 20, 2020
src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp: prefix isinf with std::
!3227
· created
Dec 28, 2019
by
Fabrice Fontaine
master
nouveau
Closed
1
updated
Mar 04, 2020
nvc0: Add NVE4 (Kepler) DMA COPY class documentation
!5981
· created
Jul 20, 2020
by
Rhys Kidd
master
nouveau
Closed
1
updated
Jul 20, 2020
nir: rework system values lowering
!6119
· created
Jul 29, 2020
by
Karol Herbst
master
NIR
RADV
etnaviv
freedreno
gallium
intel
nouveau
vc4
Closed
11
updated
Jul 31, 2020
gallium: Add a new cap for lowering uniforms to UBO
!6250
· created
Aug 09, 2020
by
Gert Wollny
master
freedreno
gallium
iris
llvmpipe
nouveau
radeonsi
Closed
11
updated
Aug 14, 2020
nir: Add NIR debug passes and MESA_NIR_DBG env variable to enable them
!3390
· created
Jan 14, 2020
by
Danylo Piliaiev
master
ACO
ANV
NIR
RADV
etnaviv
i965
ir3
iris
lima
nouveau
panfrost
radeonsi
vc4
Closed
25
updated
Sep 22, 2020
Automatically enables radeon and nouveau drivers on ARM targets
!8799
· created
Jan 31, 2021
by
Ryan Houdek
master
meson
nouveau
r300
r600
radeonsi
Closed
8
updated
Feb 03, 2021
Fix misprints with help Cppcheck
!7395
· created
Nov 01, 2020
by
Rafał Mikrut
master
GLSL
gallium
ir3
iris
nouveau
r600
softpipe
v3dv
zink
Closed
8
updated
Apr 11, 2021
gallium: make handles of set_global_binding 64 bit
!6064
· created
Jul 24, 2020
by
Karol Herbst
clover
freedreno
gallium
nouveau
r600
radeonsi
Closed
11
updated
May 10, 2021
gallium drivers: stop exporting PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX
!10925
· created
May 21, 2021
by
Mike Blumenkrantz
asahi
etnaviv
freedreno
gallium
i915g
iris
llvmpipe
nouveau
panfrost
r300
r600
radeonsi
softpipe
svga
swr
v3d
virgl
Closed
9
updated
May 25, 2021
Implement barrier registers for Volta+
!5908
· created
Jul 14, 2020
by
Karol Herbst
nouveau
Closed
0
updated
May 28, 2021
some drivers: explicitly support some index buffer formats
!10928
· created
May 21, 2021
by
Mike Blumenkrantz
d3d12
difficulty: easy
nouveau
r300
r600
zink
Closed
27
updated
Jun 02, 2021
WIP: Nouveau threading fixes
4 of 6 checklist items completed
!8440
· created
Jan 12, 2021
by
Karol Herbst
nouveau
Closed
10
updated
Sep 09, 2022
Draft: nouveau/nir: Use natural alignment
!12622
· created
Aug 30, 2021
by
M Henning
nouveau
Closed
8
updated
Dec 07, 2021
Draft: nouveau/nir: Fix atomic counters
!14166
· created
Dec 12, 2021
by
M Henning
NIR
nouveau
Closed
11
updated
May 24, 2022
nouveau: Align tlsBase to 128-bits in RegAlloc
!14890
· created
Feb 05, 2022
by
M Henning
nouveau
Closed
1
updated
Mar 20, 2022
nouveau/nir: Split fewer 64-bit loads
!14326
· created
Dec 29, 2021
by
M Henning
NIR
nouveau
Closed
13
updated
Apr 21, 2022
nv50: nir-to-tgsi by default (<nvc0)
!15541
· created
Mar 24, 2022
by
Emma Anholt
nouveau
Closed
23
updated
May 03, 2022
Prev
1
2
3
Next