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anv: limit number of MI_MATH ALU instruction we can do on a given Gen

On HSW & Gen8, MI_MATH DWord Length is limited to 64, while it is BDW it is 256. We need to take this into account when generating a shift operation that can potentially go over a given generation's limit.

Signed-off-by: Lionel Landwerlin lionel.g.landwerlin@intel.com Fixes: 2be89cbd ("anv: Implement vkCmdDrawIndirectByteCountEXT")

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