intel: Add support in MI builder registers relative to command-streamer base, and use in Anvil
gen11 add support for a new "Add CS MMIO Start Offset" when executing a LOAD_REGISTER_IMM command (and friends).
This series allows mi-regs that are cs-based (gen_mi_cs_reg32
). For gen < 11, the support is emulated by adding 0x2000 to the register number.
It then makes use of it for loading the GPGPU indirect registers in Anvil.