Rework Iris cache tracking infrastructure (1).

The purpose of this series is to introduce a new batch buffer-local cache tracking mechanism more flexible and accurate than the current hash table-based approach. Its main entry point is the iris_emit_buffer_barrier_for() helper which emits any necessary cache flushing and synchronization required for the previous memory operations on the same buffer to be visible to the following commands in the batch buffer, assuming they access the buffer object from the specified caching domain.

The original motivation for this was fixing a number of dEQP tests (dEQP-GLES3.functional.fbo.color.repeated_clear.blit.*) which fail intermittently due to missing synchronization in a sequence of operations that has a WaR hazard. The probability of encountering these non-deterministic failures seems to be exacerbated by SIMD32 fragment shaders.

This MR is not ready for upstream yet, it's pending a more comprehensive performance and conformance evaluation, but the core infrastructure seems to be in good enough shape to start the review process. The impact on Piglit drawoverhead of this MR is kind of a wash but mostly within variance.

XXX - Include benchmark results here, and a list of conformance failures fixed by it.