anv/brw: preparation for device generated commands
What does this MR do and why?
Given the insanity that is generating graphics pipeline binds from the device on Intel GPUs, I'm trying to share as much code between GPU/CPU. So that whenever the CPU side changes, we don't forget the GPU side.
Here are a bunch of changes that will be useful for that. There are 2 parts :
- Anv changes to allow partially prepared instructions to be shared with the GPU for finally packing
- Brw changes to make some enums available on the GPU