this is my shot at a R600 NIR back end. Currently, it only supports Evergreen class graphics cards, and it has only been tested on HD5450 (Cedar).
The back end is still quite some steps away from feature parity with the TGSI variant, i.e. currently only vertex, fragment, and, geometry shaders are supported, a disabled skeleton for compute shaders exist, but especially SSBO and images are not yet supported, and neither are tesselation shaders. Regarding piglits, the parts that are already supported with NIR pass at a similar rate like with TGSI, there are some fixes but also some regressions - mostly related to bad register allocation.
The patch series is composed of two major parts: a series of patches that fix issues in r600 and prepare it for supporting NIR and then the actual back end.
Since this has been quite a learning experience for me, many things are not yet done in the "NIR" way, like there is still a lot of lowering going on when translating to assembly that should be done in NIR, and I didn't catch up with all the changes in mesa/st that should make writing the back end easier. Still, I think from this point it would be better to develop in-tree, so I tried to clean up the patches to make it more reviewable. The patch that introduces most of the functionality (c1fb8075) is still a bit large though.
Since I tried to avoid touching the original state handling code, there is still a lot of translating back to TGSI semantics involved.
Apart from the missing functionality there is still a back-end optimizer and a proper scheduler missing.
Many thanks for any comments and pointers on how to make it better.