etnaviv: Support convolutions on signed 8-bit tensors
The hardware only supports uint8_t, but with the configurable zero point we can just shift input tensors into uint8_t range, adapt zero points and convolution weigths accordingly, and shift back output tensors into int8_t range. In the future, this could be accelerated with SH, and possibly fused with adjacent quant or transpose operations.
Based on !31842 (merged).