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ir3,tu: add support for alias.tex and alias.rt

Job Noorman requested to merge jnoorman/mesa:ir3-alias into main

This series adds support for two similarly named but otherwise quite unrelated instructions: alias.tex and alias.rt.

alias.tex

alias.tex allows us to construct an "alias table" that creates a mapping between virtual alias registers and concrete GPRs, consts, or immediates. The following texture instruction will lookup its sources in this table and use the mapped value instead. This has a few advantages:

  • We don't have to allocate consecutive registers (necessary for many tex sources) as we can just map them to consecutive alias registers.
  • We don't have to allocate GPRs at all for consts and immediates.
  • There's no delay penalty when initializing alias registers with consts or immediates.

For example, this code:

mov.u32u32 r1.x, r3.z
mov.u32u32 r1.y, c0.x
mov.u32u32 r1.z, 0
(rpt2)nop
sam ..., r1.x, ...

Can be implemented as follows:

alias.tex.b32.2 r40.x, r3.z
alias.tex.b32.0 r40.y, c0.x
alias.tex.b32.0 r40.z, 0
sam ..., r40.x, ...

Note that the alias registers (r40.xyz in this case) do not occupy GPR space.

Support for alias.tex is implemented in two passes in ir3.

In a first pass, sources of tex instructions are replaced by alias sources (IR3_REG_ALIAS) as follows:

  • movs from const/imm: replace with the const/imm;
  • collects: replace with the sources of the collect;
  • GPR sources: simply mark as alias.

This way, RA won't be forced to allocate consecutive registers for collects and useless collects/movs can be DCE'd. Note that simply lowering collects to aliases doesn't work because RA would assume that killed sources of aliases are dead, while they are in fact live until the tex instruction that uses them.

The second pass inserts alias.tex instructions in front of the tex instructions that need them and fixes up the tex instruction's sources. This pass needs to run post-RA as discussed above. It also needs to run post-legalization as all the sync flags need to be inserted based on the registers instructions actually use, not on the alias registers they have as sources.

alias.rt

Render target components can be aliased using alias.rt. This allows components to be bound to uniform (const or immediate) values in the preamble:

alias.rt.f32.0 rt0.y, c0.x
alias.rt.f32.0 rt1.z, (1.000000)

This aliases the 2nd component of RT0 to c0.x and the 3rd component of RT1 to the immediate 1.0. All components of all 8 render targets can be aliased.

Codegen for alias.rt is implemented by replacing const and immediate components of the RT sources of end with alias.rt instructions in the preamble. If no preamble exists, an empty one is created. DCE was extended to detect unused components of collects.

In addition to using alias.rt, the hardware needs to be informed about which render target components are being aliased using the SP_PS_ALIASED_COMPONENTS{_CONTROL} registers.

Edited by Job Noorman

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