anv: Increase bindless surface state pool size to partially avoid IntelHMI(Chimo) OOM
What does this MR do and why?
anv: Increase bindless surface state pool size to partially avoid IntelHMI(Chimo) OOM
Each descriptor pool is backed with a BO, in Chimo HMI, 1000+ descriptor pools are allocated,
which means 1000+ BOs are allocated, each BO with 2MB alignment (required by prelim kernel),
causing 2GB pool is used up and driver report OOM. Increasing pool size to 3G can avoid OOM
in most cases.
Maybe a better way is to use anv_state_pool so that no need to allocate a BO for each descriptor pool.
Tracked-On: OAM-124718
Signed-off-by: Lin, Shenghua <shenghua.lin@intel.com>