Draft: anv: Fix shader_spilling_rate?
When investigating bad shader compile times (#9769 (closed) and #11709 (closed)) I discovered that the shader_spilling_rate
environment variable does not operate at all like I expected.
Using dEQP-VK.graphicsfuzz.spv-stable-pillars-volatile-nontemporal-store
on ADL as an example, with the printf debugging patch in this MR and shader_spilling_rate=0
(i.e. disabled), it takes 454 trips through the loop before succeeding at allocation:
[...]
ra failures: 451, cumulative spills: 450, new spills: 1
ra failures: 452, cumulative spills: 451, new spills: 1
ra failures: 453, cumulative spills: 452, new spills: 1
ra failures: 454, cumulative spills: 453, new spills: 1
ra failures: 454, cumulative spills: 454
resulting in
SIMD8 shader: 17157 instructions. 1 loops. 1515288 cycles. 1671:910 spills:fills, 3 sends, scheduled with mode non-lifo. Promoted 0 constants. Compacted 274512 to 251664 bytes (8%)
I expected that shader_spilling_rate=15
(which is the value used in a driconf workaround today) would spill 15 registers (instead of 1) each iteration through the try-alloc-fail-spill loop in fs_reg_alloc::assign_regs
. Instead it's a divisor that scales the number of additional registers to spill each iteration:
ra failures: 1, cumulative spills: 0, new spills: 1
ra failures: 2, cumulative spills: 1, new spills: 1
ra failures: 3, cumulative spills: 2, new spills: 1
ra failures: 4, cumulative spills: 3, new spills: 1
ra failures: 5, cumulative spills: 4, new spills: 1
ra failures: 6, cumulative spills: 5, new spills: 1
ra failures: 7, cumulative spills: 6, new spills: 1
ra failures: 8, cumulative spills: 7, new spills: 1
ra failures: 9, cumulative spills: 8, new spills: 1
ra failures: 10, cumulative spills: 9, new spills: 1
ra failures: 11, cumulative spills: 10, new spills: 1
ra failures: 12, cumulative spills: 11, new spills: 1
ra failures: 13, cumulative spills: 12, new spills: 1
ra failures: 14, cumulative spills: 13, new spills: 1
ra failures: 15, cumulative spills: 14, new spills: 1
ra failures: 16, cumulative spills: 15, new spills: 1
ra failures: 17, cumulative spills: 16, new spills: 1
ra failures: 18, cumulative spills: 17, new spills: 1
ra failures: 19, cumulative spills: 18, new spills: 1
ra failures: 20, cumulative spills: 19, new spills: 1
ra failures: 21, cumulative spills: 20, new spills: 1
ra failures: 22, cumulative spills: 21, new spills: 1
ra failures: 23, cumulative spills: 22, new spills: 1
ra failures: 24, cumulative spills: 23, new spills: 1
ra failures: 25, cumulative spills: 24, new spills: 1
ra failures: 26, cumulative spills: 25, new spills: 1
ra failures: 27, cumulative spills: 26, new spills: 1
ra failures: 28, cumulative spills: 27, new spills: 1
ra failures: 29, cumulative spills: 28, new spills: 1
ra failures: 30, cumulative spills: 29, new spills: 1
ra failures: 31, cumulative spills: 30, new spills: 2
ra failures: 32, cumulative spills: 32, new spills: 2
ra failures: 33, cumulative spills: 34, new spills: 2
ra failures: 34, cumulative spills: 36, new spills: 2
ra failures: 35, cumulative spills: 38, new spills: 2
ra failures: 36, cumulative spills: 40, new spills: 2
ra failures: 37, cumulative spills: 42, new spills: 2
ra failures: 38, cumulative spills: 44, new spills: 2
ra failures: 39, cumulative spills: 46, new spills: 3
ra failures: 40, cumulative spills: 49, new spills: 3
ra failures: 41, cumulative spills: 52, new spills: 3
ra failures: 42, cumulative spills: 55, new spills: 3
ra failures: 43, cumulative spills: 58, new spills: 3
ra failures: 44, cumulative spills: 61, new spills: 4
ra failures: 45, cumulative spills: 65, new spills: 4
ra failures: 46, cumulative spills: 69, new spills: 4
ra failures: 47, cumulative spills: 73, new spills: 4
ra failures: 48, cumulative spills: 77, new spills: 5
ra failures: 49, cumulative spills: 82, new spills: 5
ra failures: 50, cumulative spills: 87, new spills: 5
ra failures: 51, cumulative spills: 92, new spills: 6
ra failures: 52, cumulative spills: 98, new spills: 6
ra failures: 53, cumulative spills: 104, new spills: 6
ra failures: 54, cumulative spills: 110, new spills: 7
ra failures: 55, cumulative spills: 117, new spills: 7
ra failures: 56, cumulative spills: 124, new spills: 8
ra failures: 57, cumulative spills: 132, new spills: 8
ra failures: 58, cumulative spills: 140, new spills: 9
ra failures: 59, cumulative spills: 149, new spills: 9
ra failures: 60, cumulative spills: 158, new spills: 10
ra failures: 61, cumulative spills: 168, new spills: 11
ra failures: 62, cumulative spills: 179, new spills: 11
ra failures: 63, cumulative spills: 190, new spills: 12
ra failures: 64, cumulative spills: 202, new spills: 13
ra failures: 65, cumulative spills: 215, new spills: 14
ra failures: 66, cumulative spills: 229, new spills: 15
ra failures: 67, cumulative spills: 244, new spills: 16
ra failures: 68, cumulative spills: 260, new spills: 17
ra failures: 69, cumulative spills: 277, new spills: 18
ra failures: 70, cumulative spills: 295, new spills: 19
ra failures: 71, cumulative spills: 314, new spills: 20
ra failures: 72, cumulative spills: 334, new spills: 22
ra failures: 73, cumulative spills: 356, new spills: 23
ra failures: 74, cumulative spills: 379, new spills: 25
ra failures: 75, cumulative spills: 404, new spills: 26
ra failures: 76, cumulative spills: 430, new spills: 28
ra failures: 76, cumulative spills: 458
resulting in
SIMD8 shader: 17243 instructions. 1 loops. 1530960 cycles. 1682:917 spills:fills, 3 sends, scheduled with mode non-lifo. Promoted 0 constants. Compacted 275888 to 252896 bytes (8%)
With shader_spilling_rate=15
, even after 50 iterations through the loop, it's only spilling 5 registers at a time.
Doing the thing I thought shader_spilling_rate
did:
ra failures: 1, cumulative spills: 0, new spills: 15
ra failures: 2, cumulative spills: 15, new spills: 15
ra failures: 3, cumulative spills: 30, new spills: 15
ra failures: 4, cumulative spills: 45, new spills: 15
ra failures: 5, cumulative spills: 60, new spills: 15
ra failures: 6, cumulative spills: 75, new spills: 15
ra failures: 7, cumulative spills: 90, new spills: 15
ra failures: 8, cumulative spills: 105, new spills: 15
ra failures: 9, cumulative spills: 120, new spills: 15
ra failures: 10, cumulative spills: 135, new spills: 15
ra failures: 11, cumulative spills: 150, new spills: 15
ra failures: 12, cumulative spills: 165, new spills: 15
ra failures: 13, cumulative spills: 180, new spills: 15
ra failures: 14, cumulative spills: 195, new spills: 15
ra failures: 15, cumulative spills: 210, new spills: 15
ra failures: 16, cumulative spills: 225, new spills: 15
ra failures: 17, cumulative spills: 240, new spills: 15
ra failures: 18, cumulative spills: 255, new spills: 15
ra failures: 19, cumulative spills: 270, new spills: 15
ra failures: 20, cumulative spills: 285, new spills: 15
ra failures: 21, cumulative spills: 300, new spills: 15
ra failures: 22, cumulative spills: 315, new spills: 15
ra failures: 23, cumulative spills: 330, new spills: 15
ra failures: 24, cumulative spills: 345, new spills: 15
ra failures: 25, cumulative spills: 360, new spills: 15
ra failures: 26, cumulative spills: 375, new spills: 15
ra failures: 27, cumulative spills: 390, new spills: 15
ra failures: 28, cumulative spills: 405, new spills: 15
ra failures: 29, cumulative spills: 420, new spills: 15
ra failures: 30, cumulative spills: 435, new spills: 15
ra failures: 31, cumulative spills: 450, new spills: 15
ra failures: 31, cumulative spills: 465
resulting in
SIMD8 shader: 17482 instructions. 1 loops. 1547868 cycles. 1694:933 spills:fills, 3 sends, scheduled with mode non-lifo. Promoted 0 constants. Compacted 279712 to 256496 bytes (8%)
cc: @gfxstrand