diff --git a/include/vulkan/vulkan_beta.h b/include/vulkan/vulkan_beta.h index 3d25baa3a0c1e337159807b8140a3e59ccac53ea..3753763304f1fdf740d16620148611b5c0424bc2 100644 --- a/include/vulkan/vulkan_beta.h +++ b/include/vulkan/vulkan_beta.h @@ -480,33 +480,35 @@ VKAPI_ATTR void VKAPI_CALL vkCmdEncodeVideoKHR( #define VK_EXT_video_encode_h264 1 #include "vk_video/vulkan_video_codec_h264std.h" #include "vk_video/vulkan_video_codec_h264std_encode.h" -#define VK_EXT_VIDEO_ENCODE_H264_SPEC_VERSION 6 +#define VK_EXT_VIDEO_ENCODE_H264_SPEC_VERSION 7 #define VK_EXT_VIDEO_ENCODE_H264_EXTENSION_NAME "VK_EXT_video_encode_h264" typedef enum VkVideoEncodeH264CapabilityFlagBitsEXT { - VK_VIDEO_ENCODE_H264_CAPABILITY_DIRECT_8X8_INFERENCE_BIT_EXT = 0x00000001, - VK_VIDEO_ENCODE_H264_CAPABILITY_SEPARATE_COLOUR_PLANE_BIT_EXT = 0x00000002, - VK_VIDEO_ENCODE_H264_CAPABILITY_QPPRIME_Y_ZERO_TRANSFORM_BYPASS_BIT_EXT = 0x00000004, - VK_VIDEO_ENCODE_H264_CAPABILITY_SCALING_LISTS_BIT_EXT = 0x00000008, - VK_VIDEO_ENCODE_H264_CAPABILITY_HRD_COMPLIANCE_BIT_EXT = 0x00000010, - VK_VIDEO_ENCODE_H264_CAPABILITY_CHROMA_QP_OFFSET_BIT_EXT = 0x00000020, - VK_VIDEO_ENCODE_H264_CAPABILITY_SECOND_CHROMA_QP_OFFSET_BIT_EXT = 0x00000040, - VK_VIDEO_ENCODE_H264_CAPABILITY_PIC_INIT_QP_MINUS26_BIT_EXT = 0x00000080, - VK_VIDEO_ENCODE_H264_CAPABILITY_WEIGHTED_PRED_BIT_EXT = 0x00000100, - VK_VIDEO_ENCODE_H264_CAPABILITY_WEIGHTED_BIPRED_EXPLICIT_BIT_EXT = 0x00000200, - VK_VIDEO_ENCODE_H264_CAPABILITY_WEIGHTED_BIPRED_IMPLICIT_BIT_EXT = 0x00000400, - VK_VIDEO_ENCODE_H264_CAPABILITY_WEIGHTED_PRED_NO_TABLE_BIT_EXT = 0x00000800, - VK_VIDEO_ENCODE_H264_CAPABILITY_TRANSFORM_8X8_BIT_EXT = 0x00001000, - VK_VIDEO_ENCODE_H264_CAPABILITY_CABAC_BIT_EXT = 0x00002000, - VK_VIDEO_ENCODE_H264_CAPABILITY_CAVLC_BIT_EXT = 0x00004000, - VK_VIDEO_ENCODE_H264_CAPABILITY_DEBLOCKING_FILTER_DISABLED_BIT_EXT = 0x00008000, - VK_VIDEO_ENCODE_H264_CAPABILITY_DEBLOCKING_FILTER_ENABLED_BIT_EXT = 0x00010000, - VK_VIDEO_ENCODE_H264_CAPABILITY_DEBLOCKING_FILTER_PARTIAL_BIT_EXT = 0x00020000, - VK_VIDEO_ENCODE_H264_CAPABILITY_DISABLE_DIRECT_SPATIAL_MV_PRED_BIT_EXT = 0x00040000, - VK_VIDEO_ENCODE_H264_CAPABILITY_MULTIPLE_SLICE_PER_FRAME_BIT_EXT = 0x00080000, - VK_VIDEO_ENCODE_H264_CAPABILITY_SLICE_MB_COUNT_BIT_EXT = 0x00100000, - VK_VIDEO_ENCODE_H264_CAPABILITY_ROW_UNALIGNED_SLICE_BIT_EXT = 0x00200000, - VK_VIDEO_ENCODE_H264_CAPABILITY_DIFFERENT_SLICE_TYPE_BIT_EXT = 0x00400000, + VK_VIDEO_ENCODE_H264_CAPABILITY_DIRECT_8X8_INFERENCE_ENABLED_BIT_EXT = 0x00000001, + VK_VIDEO_ENCODE_H264_CAPABILITY_DIRECT_8X8_INFERENCE_DISABLED_BIT_EXT = 0x00000002, + VK_VIDEO_ENCODE_H264_CAPABILITY_SEPARATE_COLOUR_PLANE_BIT_EXT = 0x00000004, + VK_VIDEO_ENCODE_H264_CAPABILITY_QPPRIME_Y_ZERO_TRANSFORM_BYPASS_BIT_EXT = 0x00000008, + VK_VIDEO_ENCODE_H264_CAPABILITY_SCALING_LISTS_BIT_EXT = 0x00000010, + VK_VIDEO_ENCODE_H264_CAPABILITY_HRD_COMPLIANCE_BIT_EXT = 0x00000020, + VK_VIDEO_ENCODE_H264_CAPABILITY_CHROMA_QP_OFFSET_BIT_EXT = 0x00000040, + VK_VIDEO_ENCODE_H264_CAPABILITY_SECOND_CHROMA_QP_OFFSET_BIT_EXT = 0x00000080, + VK_VIDEO_ENCODE_H264_CAPABILITY_PIC_INIT_QP_MINUS26_BIT_EXT = 0x00000100, + VK_VIDEO_ENCODE_H264_CAPABILITY_WEIGHTED_PRED_BIT_EXT = 0x00000200, + VK_VIDEO_ENCODE_H264_CAPABILITY_WEIGHTED_BIPRED_EXPLICIT_BIT_EXT = 0x00000400, + VK_VIDEO_ENCODE_H264_CAPABILITY_WEIGHTED_BIPRED_IMPLICIT_BIT_EXT = 0x00000800, + VK_VIDEO_ENCODE_H264_CAPABILITY_WEIGHTED_PRED_NO_TABLE_BIT_EXT = 0x00001000, + VK_VIDEO_ENCODE_H264_CAPABILITY_TRANSFORM_8X8_BIT_EXT = 0x00002000, + VK_VIDEO_ENCODE_H264_CAPABILITY_CABAC_BIT_EXT = 0x00004000, + VK_VIDEO_ENCODE_H264_CAPABILITY_CAVLC_BIT_EXT = 0x00008000, + VK_VIDEO_ENCODE_H264_CAPABILITY_DEBLOCKING_FILTER_DISABLED_BIT_EXT = 0x00010000, + VK_VIDEO_ENCODE_H264_CAPABILITY_DEBLOCKING_FILTER_ENABLED_BIT_EXT = 0x00020000, + VK_VIDEO_ENCODE_H264_CAPABILITY_DEBLOCKING_FILTER_PARTIAL_BIT_EXT = 0x00040000, + VK_VIDEO_ENCODE_H264_CAPABILITY_DISABLE_DIRECT_SPATIAL_MV_PRED_BIT_EXT = 0x00080000, + VK_VIDEO_ENCODE_H264_CAPABILITY_MULTIPLE_SLICE_PER_FRAME_BIT_EXT = 0x00100000, + VK_VIDEO_ENCODE_H264_CAPABILITY_SLICE_MB_COUNT_BIT_EXT = 0x00200000, + VK_VIDEO_ENCODE_H264_CAPABILITY_ROW_UNALIGNED_SLICE_BIT_EXT = 0x00400000, + VK_VIDEO_ENCODE_H264_CAPABILITY_DIFFERENT_SLICE_TYPE_BIT_EXT = 0x00800000, + VK_VIDEO_ENCODE_H264_CAPABILITY_B_FRAME_IN_L1_LIST_BIT_EXT = 0x01000000, VK_VIDEO_ENCODE_H264_CAPABILITY_FLAG_BITS_MAX_ENUM_EXT = 0x7FFFFFFF } VkVideoEncodeH264CapabilityFlagBitsEXT; typedef VkFlags VkVideoEncodeH264CapabilityFlagsEXT; diff --git a/include/vulkan/vulkan_core.h b/include/vulkan/vulkan_core.h index 5c8b8461f1ce6c1c599fa5f5cff2be294f58b62f..745ef237f50f48b2a69f3c23dd279e25ec857bb1 100644 --- a/include/vulkan/vulkan_core.h +++ b/include/vulkan/vulkan_core.h @@ -72,7 +72,7 @@ extern "C" { #define VK_API_VERSION_1_0 VK_MAKE_API_VERSION(0, 1, 0, 0)// Patch version should always be set to 0 // Version of this file -#define VK_HEADER_VERSION 211 +#define VK_HEADER_VERSION 216 // Complete version of this file #define VK_HEADER_VERSION_COMPLETE VK_MAKE_API_VERSION(0, 1, 3, VK_HEADER_VERSION) @@ -120,7 +120,6 @@ VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkDescriptorSet) VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkDescriptorPool) VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkFramebuffer) VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkCommandPool) -#define VK_UUID_SIZE 16U #define VK_ATTACHMENT_UNUSED (~0U) #define VK_FALSE 0U #define VK_LOD_CLAMP_NONE 1000.0F @@ -131,10 +130,11 @@ VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkCommandPool) #define VK_TRUE 1U #define VK_WHOLE_SIZE (~0ULL) #define VK_MAX_MEMORY_TYPES 32U -#define VK_MAX_MEMORY_HEAPS 16U #define VK_MAX_PHYSICAL_DEVICE_NAME_SIZE 256U +#define VK_UUID_SIZE 16U #define VK_MAX_EXTENSION_NAME_SIZE 256U #define VK_MAX_DESCRIPTION_SIZE 256U +#define VK_MAX_MEMORY_HEAPS 16U typedef enum VkResult { VK_SUCCESS = 0, @@ -175,6 +175,7 @@ typedef enum VkResult { VK_THREAD_DONE_KHR = 1000268001, VK_OPERATION_DEFERRED_KHR = 1000268002, VK_OPERATION_NOT_DEFERRED_KHR = 1000268003, + VK_ERROR_COMPRESSION_EXHAUSTED_EXT = -1000338000, VK_ERROR_OUT_OF_POOL_MEMORY_KHR = VK_ERROR_OUT_OF_POOL_MEMORY, VK_ERROR_INVALID_EXTERNAL_HANDLE_KHR = VK_ERROR_INVALID_EXTERNAL_HANDLE, VK_ERROR_FRAGMENTATION_EXT = VK_ERROR_FRAGMENTATION, @@ -767,7 +768,6 @@ typedef enum VkStructureType { VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_COMPUTE_SHADER_DERIVATIVES_FEATURES_NV = 1000201000, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MESH_SHADER_FEATURES_NV = 1000202000, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MESH_SHADER_PROPERTIES_NV = 1000202001, - VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FRAGMENT_SHADER_BARYCENTRIC_FEATURES_NV = 1000203000, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_IMAGE_FOOTPRINT_FEATURES_NV = 1000204000, VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_EXCLUSIVE_SCISSOR_STATE_CREATE_INFO_NV = 1000205000, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXCLUSIVE_SCISSOR_FEATURES_NV = 1000205002, @@ -876,6 +876,9 @@ typedef enum VkStructureType { VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_GRAPHICS_PIPELINE_LIBRARY_FEATURES_EXT = 1000320000, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_GRAPHICS_PIPELINE_LIBRARY_PROPERTIES_EXT = 1000320001, VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_LIBRARY_CREATE_INFO_EXT = 1000320002, + VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_EARLY_AND_LATE_FRAGMENT_TESTS_FEATURES_AMD = 1000321000, + VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FRAGMENT_SHADER_BARYCENTRIC_FEATURES_KHR = 1000203000, + VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FRAGMENT_SHADER_BARYCENTRIC_PROPERTIES_KHR = 1000322000, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_SUBGROUP_UNIFORM_CONTROL_FLOW_FEATURES_KHR = 1000323000, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FRAGMENT_SHADING_RATE_ENUMS_PROPERTIES_NV = 1000326000, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FRAGMENT_SHADING_RATE_ENUMS_FEATURES_NV = 1000326001, @@ -888,6 +891,11 @@ typedef enum VkStructureType { VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FRAGMENT_DENSITY_MAP_2_PROPERTIES_EXT = 1000332001, VK_STRUCTURE_TYPE_COPY_COMMAND_TRANSFORM_INFO_QCOM = 1000333000, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_WORKGROUP_MEMORY_EXPLICIT_LAYOUT_FEATURES_KHR = 1000336000, + VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_IMAGE_COMPRESSION_CONTROL_FEATURES_EXT = 1000338000, + VK_STRUCTURE_TYPE_IMAGE_COMPRESSION_CONTROL_EXT = 1000338001, + VK_STRUCTURE_TYPE_SUBRESOURCE_LAYOUT_2_EXT = 1000338002, + VK_STRUCTURE_TYPE_IMAGE_SUBRESOURCE_2_EXT = 1000338003, + VK_STRUCTURE_TYPE_IMAGE_COMPRESSION_PROPERTIES_EXT = 1000338004, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_4444_FORMATS_FEATURES_EXT = 1000340000, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_RASTERIZATION_ORDER_ATTACHMENT_ACCESS_FEATURES_ARM = 1000342000, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_RGBA10X6_FORMATS_FEATURES_EXT = 1000344000, @@ -922,11 +930,14 @@ typedef enum VkStructureType { VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_INVOCATION_MASK_FEATURES_HUAWEI = 1000370000, VK_STRUCTURE_TYPE_MEMORY_GET_REMOTE_ADDRESS_INFO_NV = 1000371000, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTERNAL_MEMORY_RDMA_FEATURES_NV = 1000371001, + VK_STRUCTURE_TYPE_PIPELINE_PROPERTIES_IDENTIFIER_EXT = 1000372000, + VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PIPELINE_PROPERTIES_FEATURES_EXT = 1000372001, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTENDED_DYNAMIC_STATE_2_FEATURES_EXT = 1000377000, VK_STRUCTURE_TYPE_SCREEN_SURFACE_CREATE_INFO_QNX = 1000378000, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_COLOR_WRITE_ENABLE_FEATURES_EXT = 1000381000, VK_STRUCTURE_TYPE_PIPELINE_COLOR_WRITE_CREATE_INFO_EXT = 1000381001, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PRIMITIVES_GENERATED_QUERY_FEATURES_EXT = 1000382000, + VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_RAY_TRACING_MAINTENANCE_1_FEATURES_KHR = 1000386000, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_IMAGE_VIEW_MIN_LOD_FEATURES_EXT = 1000391000, VK_STRUCTURE_TYPE_IMAGE_VIEW_MIN_LOD_CREATE_INFO_EXT = 1000391001, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTI_DRAW_FEATURES_EXT = 1000392000, @@ -942,6 +953,11 @@ typedef enum VkStructureType { VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FRAGMENT_DENSITY_MAP_OFFSET_PROPERTIES_QCOM = 1000425001, VK_STRUCTURE_TYPE_SUBPASS_FRAGMENT_DENSITY_MAP_OFFSET_END_INFO_QCOM = 1000425002, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_LINEAR_COLOR_ATTACHMENT_FEATURES_NV = 1000430000, + VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_IMAGE_COMPRESSION_CONTROL_SWAPCHAIN_FEATURES_EXT = 1000437000, + VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SUBPASS_MERGE_FEEDBACK_FEATURES_EXT = 1000458000, + VK_STRUCTURE_TYPE_RENDER_PASS_CREATION_CONTROL_EXT = 1000458001, + VK_STRUCTURE_TYPE_RENDER_PASS_CREATION_FEEDBACK_CREATE_INFO_EXT = 1000458002, + VK_STRUCTURE_TYPE_RENDER_PASS_SUBPASS_FEEDBACK_CREATE_INFO_EXT = 1000458003, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VARIABLE_POINTER_FEATURES = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VARIABLE_POINTERS_FEATURES, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_DRAW_PARAMETER_FEATURES = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_DRAW_PARAMETERS_FEATURES, VK_STRUCTURE_TYPE_DEBUG_REPORT_CREATE_INFO_EXT = VK_STRUCTURE_TYPE_DEBUG_REPORT_CALLBACK_CREATE_INFO_EXT, @@ -1047,6 +1063,7 @@ typedef enum VkStructureType { VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FLOAT_CONTROLS_PROPERTIES_KHR = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FLOAT_CONTROLS_PROPERTIES, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DEPTH_STENCIL_RESOLVE_PROPERTIES_KHR = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DEPTH_STENCIL_RESOLVE_PROPERTIES, VK_STRUCTURE_TYPE_SUBPASS_DESCRIPTION_DEPTH_STENCIL_RESOLVE_KHR = VK_STRUCTURE_TYPE_SUBPASS_DESCRIPTION_DEPTH_STENCIL_RESOLVE, + VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FRAGMENT_SHADER_BARYCENTRIC_FEATURES_NV = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FRAGMENT_SHADER_BARYCENTRIC_FEATURES_KHR, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TIMELINE_SEMAPHORE_FEATURES_KHR = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TIMELINE_SEMAPHORE_FEATURES, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TIMELINE_SEMAPHORE_PROPERTIES_KHR = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TIMELINE_SEMAPHORE_PROPERTIES, VK_STRUCTURE_TYPE_SEMAPHORE_TYPE_CREATE_INFO_KHR = VK_STRUCTURE_TYPE_SEMAPHORE_TYPE_CREATE_INFO, @@ -1104,6 +1121,7 @@ typedef enum VkStructureType { VK_STRUCTURE_TYPE_BUFFER_IMAGE_COPY_2_KHR = VK_STRUCTURE_TYPE_BUFFER_IMAGE_COPY_2, VK_STRUCTURE_TYPE_IMAGE_RESOLVE_2_KHR = VK_STRUCTURE_TYPE_IMAGE_RESOLVE_2, VK_STRUCTURE_TYPE_FORMAT_PROPERTIES_3_KHR = VK_STRUCTURE_TYPE_FORMAT_PROPERTIES_3, + VK_STRUCTURE_TYPE_PIPELINE_INFO_EXT = VK_STRUCTURE_TYPE_PIPELINE_INFO_KHR, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_GLOBAL_PRIORITY_QUERY_FEATURES_EXT = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_GLOBAL_PRIORITY_QUERY_FEATURES_KHR, VK_STRUCTURE_TYPE_QUEUE_FAMILY_GLOBAL_PRIORITY_PROPERTIES_EXT = VK_STRUCTURE_TYPE_QUEUE_FAMILY_GLOBAL_PRIORITY_PROPERTIES_KHR, VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MAINTENANCE_4_FEATURES_KHR = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MAINTENANCE_4_FEATURES, @@ -1113,6 +1131,11 @@ typedef enum VkStructureType { VK_STRUCTURE_TYPE_MAX_ENUM = 0x7FFFFFFF } VkStructureType; +typedef enum VkPipelineCacheHeaderVersion { + VK_PIPELINE_CACHE_HEADER_VERSION_ONE = 1, + VK_PIPELINE_CACHE_HEADER_VERSION_MAX_ENUM = 0x7FFFFFFF +} VkPipelineCacheHeaderVersion; + typedef enum VkImageLayout { VK_IMAGE_LAYOUT_UNDEFINED = 0, VK_IMAGE_LAYOUT_GENERAL = 1, @@ -1222,11 +1245,6 @@ typedef enum VkObjectType { VK_OBJECT_TYPE_MAX_ENUM = 0x7FFFFFFF } VkObjectType; -typedef enum VkPipelineCacheHeaderVersion { - VK_PIPELINE_CACHE_HEADER_VERSION_ONE = 1, - VK_PIPELINE_CACHE_HEADER_VERSION_MAX_ENUM = 0x7FFFFFFF -} VkPipelineCacheHeaderVersion; - typedef enum VkVendorId { VK_VENDOR_ID_VIV = 0x10001, VK_VENDOR_ID_VSI = 0x10002, @@ -1596,6 +1614,8 @@ typedef enum VkQueryType { VK_QUERY_TYPE_VIDEO_ENCODE_BITSTREAM_BUFFER_RANGE_KHR = 1000299000, #endif VK_QUERY_TYPE_PRIMITIVES_GENERATED_EXT = 1000382000, + VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SERIALIZATION_BOTTOM_LEVEL_POINTERS_KHR = 1000386000, + VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SIZE_KHR = 1000386001, VK_QUERY_TYPE_MAX_ENUM = 0x7FFFFFFF } VkQueryType; @@ -6356,6 +6376,7 @@ static const VkPipelineStageFlagBits2 VK_PIPELINE_STAGE_2_TASK_SHADER_BIT_NV = 0 static const VkPipelineStageFlagBits2 VK_PIPELINE_STAGE_2_MESH_SHADER_BIT_NV = 0x00100000ULL; static const VkPipelineStageFlagBits2 VK_PIPELINE_STAGE_2_SUBPASS_SHADING_BIT_HUAWEI = 0x8000000000ULL; static const VkPipelineStageFlagBits2 VK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI = 0x10000000000ULL; +static const VkPipelineStageFlagBits2 VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR = 0x10000000ULL; typedef VkFlags64 VkAccessFlags2; @@ -6430,6 +6451,7 @@ static const VkAccessFlagBits2 VK_ACCESS_2_ACCELERATION_STRUCTURE_WRITE_BIT_NV = static const VkAccessFlagBits2 VK_ACCESS_2_FRAGMENT_DENSITY_MAP_READ_BIT_EXT = 0x01000000ULL; static const VkAccessFlagBits2 VK_ACCESS_2_COLOR_ATTACHMENT_READ_NONCOHERENT_BIT_EXT = 0x00080000ULL; static const VkAccessFlagBits2 VK_ACCESS_2_INVOCATION_MASK_READ_BIT_HUAWEI = 0x8000000000ULL; +static const VkAccessFlagBits2 VK_ACCESS_2_SHADER_BINDING_TABLE_READ_BIT_KHR = 0x10000000000ULL; typedef enum VkSubmitFlagBits { @@ -9382,6 +9404,23 @@ VKAPI_ATTR void VKAPI_CALL vkGetQueueCheckpointData2NV( #endif +#define VK_KHR_fragment_shader_barycentric 1 +#define VK_KHR_FRAGMENT_SHADER_BARYCENTRIC_SPEC_VERSION 1 +#define VK_KHR_FRAGMENT_SHADER_BARYCENTRIC_EXTENSION_NAME "VK_KHR_fragment_shader_barycentric" +typedef struct VkPhysicalDeviceFragmentShaderBarycentricFeaturesKHR { + VkStructureType sType; + void* pNext; + VkBool32 fragmentShaderBarycentric; +} VkPhysicalDeviceFragmentShaderBarycentricFeaturesKHR; + +typedef struct VkPhysicalDeviceFragmentShaderBarycentricPropertiesKHR { + VkStructureType sType; + void* pNext; + VkBool32 triStripVertexOrderIndependentOfProvokingVertex; +} VkPhysicalDeviceFragmentShaderBarycentricPropertiesKHR; + + + #define VK_KHR_shader_subgroup_uniform_control_flow 1 #define VK_KHR_SHADER_SUBGROUP_UNIFORM_CONTROL_FLOW_SPEC_VERSION 1 #define VK_KHR_SHADER_SUBGROUP_UNIFORM_CONTROL_FLOW_EXTENSION_NAME "VK_KHR_shader_subgroup_uniform_control_flow" @@ -9484,6 +9523,42 @@ typedef VkFormatProperties3 VkFormatProperties3KHR; +#define VK_KHR_ray_tracing_maintenance1 1 +#define VK_KHR_RAY_TRACING_MAINTENANCE_1_SPEC_VERSION 1 +#define VK_KHR_RAY_TRACING_MAINTENANCE_1_EXTENSION_NAME "VK_KHR_ray_tracing_maintenance1" +typedef struct VkPhysicalDeviceRayTracingMaintenance1FeaturesKHR { + VkStructureType sType; + void* pNext; + VkBool32 rayTracingMaintenance1; + VkBool32 rayTracingPipelineTraceRaysIndirect2; +} VkPhysicalDeviceRayTracingMaintenance1FeaturesKHR; + +typedef struct VkTraceRaysIndirectCommand2KHR { + VkDeviceAddress raygenShaderRecordAddress; + VkDeviceSize raygenShaderRecordSize; + VkDeviceAddress missShaderBindingTableAddress; + VkDeviceSize missShaderBindingTableSize; + VkDeviceSize missShaderBindingTableStride; + VkDeviceAddress hitShaderBindingTableAddress; + VkDeviceSize hitShaderBindingTableSize; + VkDeviceSize hitShaderBindingTableStride; + VkDeviceAddress callableShaderBindingTableAddress; + VkDeviceSize callableShaderBindingTableSize; + VkDeviceSize callableShaderBindingTableStride; + uint32_t width; + uint32_t height; + uint32_t depth; +} VkTraceRaysIndirectCommand2KHR; + +typedef void (VKAPI_PTR *PFN_vkCmdTraceRaysIndirect2KHR)(VkCommandBuffer commandBuffer, VkDeviceAddress indirectDeviceAddress); + +#ifndef VK_NO_PROTOTYPES +VKAPI_ATTR void VKAPI_CALL vkCmdTraceRaysIndirect2KHR( + VkCommandBuffer commandBuffer, + VkDeviceAddress indirectDeviceAddress); +#endif + + #define VK_KHR_portability_enumeration 1 #define VK_KHR_PORTABILITY_ENUMERATION_SPEC_VERSION 1 #define VK_KHR_PORTABILITY_ENUMERATION_EXTENSION_NAME "VK_KHR_portability_enumeration" @@ -11904,11 +11979,7 @@ VKAPI_ATTR void VKAPI_CALL vkCmdDrawMeshTasksIndirectCountNV( #define VK_NV_fragment_shader_barycentric 1 #define VK_NV_FRAGMENT_SHADER_BARYCENTRIC_SPEC_VERSION 1 #define VK_NV_FRAGMENT_SHADER_BARYCENTRIC_EXTENSION_NAME "VK_NV_fragment_shader_barycentric" -typedef struct VkPhysicalDeviceFragmentShaderBarycentricFeaturesNV { - VkStructureType sType; - void* pNext; - VkBool32 fragmentShaderBarycentric; -} VkPhysicalDeviceFragmentShaderBarycentricFeaturesNV; +typedef VkPhysicalDeviceFragmentShaderBarycentricFeaturesKHR VkPhysicalDeviceFragmentShaderBarycentricFeaturesNV; @@ -13195,13 +13266,14 @@ typedef VkPhysicalDevicePipelineCreationCacheControlFeatures VkPhysicalDevicePip #define VK_NV_device_diagnostics_config 1 -#define VK_NV_DEVICE_DIAGNOSTICS_CONFIG_SPEC_VERSION 1 +#define VK_NV_DEVICE_DIAGNOSTICS_CONFIG_SPEC_VERSION 2 #define VK_NV_DEVICE_DIAGNOSTICS_CONFIG_EXTENSION_NAME "VK_NV_device_diagnostics_config" typedef enum VkDeviceDiagnosticsConfigFlagBitsNV { VK_DEVICE_DIAGNOSTICS_CONFIG_ENABLE_SHADER_DEBUG_INFO_BIT_NV = 0x00000001, VK_DEVICE_DIAGNOSTICS_CONFIG_ENABLE_RESOURCE_TRACKING_BIT_NV = 0x00000002, VK_DEVICE_DIAGNOSTICS_CONFIG_ENABLE_AUTOMATIC_CHECKPOINTS_BIT_NV = 0x00000004, + VK_DEVICE_DIAGNOSTICS_CONFIG_ENABLE_SHADER_ERROR_REPORTING_BIT_NV = 0x00000008, VK_DEVICE_DIAGNOSTICS_CONFIG_FLAG_BITS_MAX_ENUM_NV = 0x7FFFFFFF } VkDeviceDiagnosticsConfigFlagBitsNV; typedef VkFlags VkDeviceDiagnosticsConfigFlagsNV; @@ -13257,6 +13329,17 @@ typedef struct VkGraphicsPipelineLibraryCreateInfoEXT { +#define VK_AMD_shader_early_and_late_fragment_tests 1 +#define VK_AMD_SHADER_EARLY_AND_LATE_FRAGMENT_TESTS_SPEC_VERSION 1 +#define VK_AMD_SHADER_EARLY_AND_LATE_FRAGMENT_TESTS_EXTENSION_NAME "VK_AMD_shader_early_and_late_fragment_tests" +typedef struct VkPhysicalDeviceShaderEarlyAndLateFragmentTestsFeaturesAMD { + VkStructureType sType; + void* pNext; + VkBool32 shaderEarlyAndLateFragmentTests; +} VkPhysicalDeviceShaderEarlyAndLateFragmentTestsFeaturesAMD; + + + #define VK_NV_fragment_shading_rate_enums 1 #define VK_NV_FRAGMENT_SHADING_RATE_ENUMS_SPEC_VERSION 1 #define VK_NV_FRAGMENT_SHADING_RATE_ENUMS_EXTENSION_NAME "VK_NV_fragment_shading_rate_enums" @@ -13453,6 +13536,92 @@ typedef VkPhysicalDeviceImageRobustnessFeatures VkPhysicalDeviceImageRobustnessF +#define VK_EXT_image_compression_control 1 +#define VK_EXT_IMAGE_COMPRESSION_CONTROL_SPEC_VERSION 1 +#define VK_EXT_IMAGE_COMPRESSION_CONTROL_EXTENSION_NAME "VK_EXT_image_compression_control" + +typedef enum VkImageCompressionFlagBitsEXT { + VK_IMAGE_COMPRESSION_DEFAULT_EXT = 0, + VK_IMAGE_COMPRESSION_FIXED_RATE_DEFAULT_EXT = 0x00000001, + VK_IMAGE_COMPRESSION_FIXED_RATE_EXPLICIT_EXT = 0x00000002, + VK_IMAGE_COMPRESSION_DISABLED_EXT = 0x00000004, + VK_IMAGE_COMPRESSION_FLAG_BITS_MAX_ENUM_EXT = 0x7FFFFFFF +} VkImageCompressionFlagBitsEXT; +typedef VkFlags VkImageCompressionFlagsEXT; + +typedef enum VkImageCompressionFixedRateFlagBitsEXT { + VK_IMAGE_COMPRESSION_FIXED_RATE_NONE_EXT = 0, + VK_IMAGE_COMPRESSION_FIXED_RATE_1BPC_BIT_EXT = 0x00000001, + VK_IMAGE_COMPRESSION_FIXED_RATE_2BPC_BIT_EXT = 0x00000002, + VK_IMAGE_COMPRESSION_FIXED_RATE_3BPC_BIT_EXT = 0x00000004, + VK_IMAGE_COMPRESSION_FIXED_RATE_4BPC_BIT_EXT = 0x00000008, + VK_IMAGE_COMPRESSION_FIXED_RATE_5BPC_BIT_EXT = 0x00000010, + VK_IMAGE_COMPRESSION_FIXED_RATE_6BPC_BIT_EXT = 0x00000020, + VK_IMAGE_COMPRESSION_FIXED_RATE_7BPC_BIT_EXT = 0x00000040, + VK_IMAGE_COMPRESSION_FIXED_RATE_8BPC_BIT_EXT = 0x00000080, + VK_IMAGE_COMPRESSION_FIXED_RATE_9BPC_BIT_EXT = 0x00000100, + VK_IMAGE_COMPRESSION_FIXED_RATE_10BPC_BIT_EXT = 0x00000200, + VK_IMAGE_COMPRESSION_FIXED_RATE_11BPC_BIT_EXT = 0x00000400, + VK_IMAGE_COMPRESSION_FIXED_RATE_12BPC_BIT_EXT = 0x00000800, + VK_IMAGE_COMPRESSION_FIXED_RATE_13BPC_BIT_EXT = 0x00001000, + VK_IMAGE_COMPRESSION_FIXED_RATE_14BPC_BIT_EXT = 0x00002000, + VK_IMAGE_COMPRESSION_FIXED_RATE_15BPC_BIT_EXT = 0x00004000, + VK_IMAGE_COMPRESSION_FIXED_RATE_16BPC_BIT_EXT = 0x00008000, + VK_IMAGE_COMPRESSION_FIXED_RATE_17BPC_BIT_EXT = 0x00010000, + VK_IMAGE_COMPRESSION_FIXED_RATE_18BPC_BIT_EXT = 0x00020000, + VK_IMAGE_COMPRESSION_FIXED_RATE_19BPC_BIT_EXT = 0x00040000, + VK_IMAGE_COMPRESSION_FIXED_RATE_20BPC_BIT_EXT = 0x00080000, + VK_IMAGE_COMPRESSION_FIXED_RATE_21BPC_BIT_EXT = 0x00100000, + VK_IMAGE_COMPRESSION_FIXED_RATE_22BPC_BIT_EXT = 0x00200000, + VK_IMAGE_COMPRESSION_FIXED_RATE_23BPC_BIT_EXT = 0x00400000, + VK_IMAGE_COMPRESSION_FIXED_RATE_24BPC_BIT_EXT = 0x00800000, + VK_IMAGE_COMPRESSION_FIXED_RATE_FLAG_BITS_MAX_ENUM_EXT = 0x7FFFFFFF +} VkImageCompressionFixedRateFlagBitsEXT; +typedef VkFlags VkImageCompressionFixedRateFlagsEXT; +typedef struct VkPhysicalDeviceImageCompressionControlFeaturesEXT { + VkStructureType sType; + void* pNext; + VkBool32 imageCompressionControl; +} VkPhysicalDeviceImageCompressionControlFeaturesEXT; + +typedef struct VkImageCompressionControlEXT { + VkStructureType sType; + const void* pNext; + VkImageCompressionFlagsEXT flags; + uint32_t compressionControlPlaneCount; + VkImageCompressionFixedRateFlagsEXT* pFixedRateFlags; +} VkImageCompressionControlEXT; + +typedef struct VkSubresourceLayout2EXT { + VkStructureType sType; + void* pNext; + VkSubresourceLayout subresourceLayout; +} VkSubresourceLayout2EXT; + +typedef struct VkImageSubresource2EXT { + VkStructureType sType; + void* pNext; + VkImageSubresource imageSubresource; +} VkImageSubresource2EXT; + +typedef struct VkImageCompressionPropertiesEXT { + VkStructureType sType; + void* pNext; + VkImageCompressionFlagsEXT imageCompressionFlags; + VkImageCompressionFixedRateFlagsEXT imageCompressionFixedRateFlags; +} VkImageCompressionPropertiesEXT; + +typedef void (VKAPI_PTR *PFN_vkGetImageSubresourceLayout2EXT)(VkDevice device, VkImage image, const VkImageSubresource2EXT* pSubresource, VkSubresourceLayout2EXT* pLayout); + +#ifndef VK_NO_PROTOTYPES +VKAPI_ATTR void VKAPI_CALL vkGetImageSubresourceLayout2EXT( + VkDevice device, + VkImage image, + const VkImageSubresource2EXT* pSubresource, + VkSubresourceLayout2EXT* pLayout); +#endif + + #define VK_EXT_4444_formats 1 #define VK_EXT_4444_FORMATS_SPEC_VERSION 1 #define VK_EXT_4444_FORMATS_EXTENSION_NAME "VK_EXT_4444_formats" @@ -13696,6 +13865,33 @@ VKAPI_ATTR VkResult VKAPI_CALL vkGetMemoryRemoteAddressNV( #endif +#define VK_EXT_pipeline_properties 1 +#define VK_EXT_PIPELINE_PROPERTIES_SPEC_VERSION 1 +#define VK_EXT_PIPELINE_PROPERTIES_EXTENSION_NAME "VK_EXT_pipeline_properties" +typedef VkPipelineInfoKHR VkPipelineInfoEXT; + +typedef struct VkPipelinePropertiesIdentifierEXT { + VkStructureType sType; + void* pNext; + uint8_t pipelineIdentifier[VK_UUID_SIZE]; +} VkPipelinePropertiesIdentifierEXT; + +typedef struct VkPhysicalDevicePipelinePropertiesFeaturesEXT { + VkStructureType sType; + void* pNext; + VkBool32 pipelinePropertiesIdentifier; +} VkPhysicalDevicePipelinePropertiesFeaturesEXT; + +typedef VkResult (VKAPI_PTR *PFN_vkGetPipelinePropertiesEXT)(VkDevice device, const VkPipelineInfoEXT* pPipelineInfo, VkBaseOutStructure* pPipelineProperties); + +#ifndef VK_NO_PROTOTYPES +VKAPI_ATTR VkResult VKAPI_CALL vkGetPipelinePropertiesEXT( + VkDevice device, + const VkPipelineInfoEXT* pPipelineInfo, + VkBaseOutStructure* pPipelineProperties); +#endif + + #define VK_EXT_extended_dynamic_state2 1 #define VK_EXT_EXTENDED_DYNAMIC_STATE_2_SPEC_VERSION 1 #define VK_EXT_EXTENDED_DYNAMIC_STATE_2_EXTENSION_NAME "VK_EXT_extended_dynamic_state2" @@ -13985,6 +14181,74 @@ typedef struct VkPhysicalDeviceLinearColorAttachmentFeaturesNV { #define VK_GOOGLE_SURFACELESS_QUERY_EXTENSION_NAME "VK_GOOGLE_surfaceless_query" +#define VK_EXT_image_compression_control_swapchain 1 +#define VK_EXT_IMAGE_COMPRESSION_CONTROL_SWAPCHAIN_SPEC_VERSION 1 +#define VK_EXT_IMAGE_COMPRESSION_CONTROL_SWAPCHAIN_EXTENSION_NAME "VK_EXT_image_compression_control_swapchain" +typedef struct VkPhysicalDeviceImageCompressionControlSwapchainFeaturesEXT { + VkStructureType sType; + void* pNext; + VkBool32 imageCompressionControlSwapchain; +} VkPhysicalDeviceImageCompressionControlSwapchainFeaturesEXT; + + + +#define VK_EXT_subpass_merge_feedback 1 +#define VK_EXT_SUBPASS_MERGE_FEEDBACK_SPEC_VERSION 2 +#define VK_EXT_SUBPASS_MERGE_FEEDBACK_EXTENSION_NAME "VK_EXT_subpass_merge_feedback" + +typedef enum VkSubpassMergeStatusEXT { + VK_SUBPASS_MERGE_STATUS_MERGED_EXT = 0, + VK_SUBPASS_MERGE_STATUS_DISALLOWED_EXT = 1, + VK_SUBPASS_MERGE_STATUS_NOT_MERGED_SIDE_EFFECTS_EXT = 2, + VK_SUBPASS_MERGE_STATUS_NOT_MERGED_SAMPLES_MISMATCH_EXT = 3, + VK_SUBPASS_MERGE_STATUS_NOT_MERGED_VIEWS_MISMATCH_EXT = 4, + VK_SUBPASS_MERGE_STATUS_NOT_MERGED_ALIASING_EXT = 5, + VK_SUBPASS_MERGE_STATUS_NOT_MERGED_DEPENDENCIES_EXT = 6, + VK_SUBPASS_MERGE_STATUS_NOT_MERGED_INCOMPATIBLE_INPUT_ATTACHMENT_EXT = 7, + VK_SUBPASS_MERGE_STATUS_NOT_MERGED_TOO_MANY_ATTACHMENTS_EXT = 8, + VK_SUBPASS_MERGE_STATUS_NOT_MERGED_INSUFFICIENT_STORAGE_EXT = 9, + VK_SUBPASS_MERGE_STATUS_NOT_MERGED_DEPTH_STENCIL_COUNT_EXT = 10, + VK_SUBPASS_MERGE_STATUS_NOT_MERGED_RESOLVE_ATTACHMENT_REUSE_EXT = 11, + VK_SUBPASS_MERGE_STATUS_NOT_MERGED_SINGLE_SUBPASS_EXT = 12, + VK_SUBPASS_MERGE_STATUS_NOT_MERGED_UNSPECIFIED_EXT = 13, + VK_SUBPASS_MERGE_STATUS_MAX_ENUM_EXT = 0x7FFFFFFF +} VkSubpassMergeStatusEXT; +typedef struct VkPhysicalDeviceSubpassMergeFeedbackFeaturesEXT { + VkStructureType sType; + void* pNext; + VkBool32 subpassMergeFeedback; +} VkPhysicalDeviceSubpassMergeFeedbackFeaturesEXT; + +typedef struct VkRenderPassCreationControlEXT { + VkStructureType sType; + const void* pNext; + VkBool32 disallowMerging; +} VkRenderPassCreationControlEXT; + +typedef struct VkRenderPassCreationFeedbackInfoEXT { + uint32_t postMergeSubpassCount; +} VkRenderPassCreationFeedbackInfoEXT; + +typedef struct VkRenderPassCreationFeedbackCreateInfoEXT { + VkStructureType sType; + const void* pNext; + VkRenderPassCreationFeedbackInfoEXT* pRenderPassFeedback; +} VkRenderPassCreationFeedbackCreateInfoEXT; + +typedef struct VkRenderPassSubpassFeedbackInfoEXT { + VkSubpassMergeStatusEXT subpassMergeStatus; + char description[VK_MAX_DESCRIPTION_SIZE]; + uint32_t postMergeIndex; +} VkRenderPassSubpassFeedbackInfoEXT; + +typedef struct VkRenderPassSubpassFeedbackCreateInfoEXT { + VkStructureType sType; + const void* pNext; + VkRenderPassSubpassFeedbackInfoEXT* pSubpassFeedback; +} VkRenderPassSubpassFeedbackCreateInfoEXT; + + + #define VK_KHR_acceleration_structure 1 VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkAccelerationStructureKHR) #define VK_KHR_ACCELERATION_STRUCTURE_SPEC_VERSION 13 diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 275c1008f2b301174efb8fbb52831602ac9064f6..0176c994e6d641735302f06464db466082d480a8 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -5754,19 +5754,6 @@ visit_load_ubo(isel_context* ctx, nir_intrinsic_instr* instr) nir_intrinsic_align_mul(instr), nir_intrinsic_align_offset(instr)); } -void -visit_load_sbt_amd(isel_context* ctx, nir_intrinsic_instr* instr) -{ - Temp dst = get_ssa_temp(ctx, &instr->dest.ssa); - unsigned binding = nir_intrinsic_binding(instr); - - Builder bld(ctx->program, ctx->block); - Temp desc_base = convert_pointer_to_64_bit(ctx, get_arg(ctx, ctx->args->ac.sbt_descriptors)); - Operand desc_off = bld.copy(bld.def(s1), Operand::c32(binding * 16u)); - bld.smem(aco_opcode::s_load_dwordx4, Definition(dst), desc_base, desc_off); - emit_split_vector(ctx, dst, 4); -} - void visit_load_push_constant(isel_context* ctx, nir_intrinsic_instr* instr) { @@ -9082,7 +9069,12 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr) true); break; } - case nir_intrinsic_load_sbt_amd: visit_load_sbt_amd(ctx, instr); break; + case nir_intrinsic_load_sbt_base_amd: { + Temp dst = get_ssa_temp(ctx, &instr->dest.ssa); + Temp addr = convert_pointer_to_64_bit(ctx, get_arg(ctx, ctx->args->ac.sbt_descriptors)); + bld.copy(Definition(dst), Operand(addr)); + break; + } case nir_intrinsic_bvh64_intersect_ray_amd: visit_bvh64_intersect_ray_amd(ctx, instr); break; case nir_intrinsic_overwrite_vs_arguments_amd: { ctx->arg_temps[ctx->args->ac.vertex_id.arg_index] = get_ssa_temp(ctx, instr->src[0].ssa); diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp index 04d664999d402782c874adb9593981ace8e7609d..99ebec2031e276ec8cf9330407120aadb8537853 100644 --- a/src/amd/compiler/aco_instruction_selection_setup.cpp +++ b/src/amd/compiler/aco_instruction_selection_setup.cpp @@ -603,6 +603,7 @@ init_context(isel_context* ctx, nir_shader* shader) case nir_intrinsic_load_workgroup_id: case nir_intrinsic_load_num_workgroups: case nir_intrinsic_load_ray_launch_size_addr_amd: + case nir_intrinsic_load_sbt_base_amd: case nir_intrinsic_load_subgroup_id: case nir_intrinsic_load_num_subgroups: case nir_intrinsic_load_first_vertex: @@ -725,7 +726,6 @@ init_context(isel_context* ctx, nir_shader* shader) case nir_intrinsic_inclusive_scan: case nir_intrinsic_exclusive_scan: case nir_intrinsic_reduce: - case nir_intrinsic_load_sbt_amd: case nir_intrinsic_load_ubo: case nir_intrinsic_load_ssbo: case nir_intrinsic_load_global_amd: diff --git a/src/amd/vulkan/radv_acceleration_structure.c b/src/amd/vulkan/radv_acceleration_structure.c index 4394ead136ba7bcf85f1d95cdd4148d6af4605d3..0ab407ba289d6e1b997f8524528644992f043a71 100644 --- a/src/amd/vulkan/radv_acceleration_structure.c +++ b/src/amd/vulkan/radv_acceleration_structure.c @@ -211,6 +211,12 @@ radv_WriteAccelerationStructuresPropertiesKHR( case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SERIALIZATION_SIZE_KHR: value = header->serialization_size; break; + case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SERIALIZATION_BOTTOM_LEVEL_POINTERS_KHR: + value = header->instance_count; + break; + case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SIZE_KHR: + value = accel->size; + break; default: unreachable("Unhandled acceleration structure query"); } @@ -755,6 +761,8 @@ build_bvh(struct radv_device *device, const VkAccelerationStructureBuildGeometry sizeof(uint64_t) * header->instance_count, 128); + header->size = accel->size; + fail: device->ws->buffer_unmap(accel->bo); return result; @@ -2281,6 +2289,8 @@ radv_CmdBuildAccelerationStructuresKHR( sizeof(uint64_t) * header.instance_count, 128); + header.size = accel_struct->size; + radv_update_buffer_cp(cmd_buffer, radv_buffer_get_va(accel_struct->bo) + accel_struct->mem_offset + base, (const char *)&header + base, sizeof(header) - base); diff --git a/src/amd/vulkan/radv_acceleration_structure.h b/src/amd/vulkan/radv_acceleration_structure.h index 4953abbdced674c0ae991aeb8ccd8a6ab72f3c5d..2bc3ac0b80c597b8c9a9a7e760715635330e3fed 100644 --- a/src/amd/vulkan/radv_acceleration_structure.h +++ b/src/amd/vulkan/radv_acceleration_structure.h @@ -54,6 +54,7 @@ struct radv_accel_struct_header { uint32_t copy_dispatch_size[3]; uint64_t instance_offset; uint64_t instance_count; + uint64_t size; }; struct radv_bvh_triangle_node { diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 1caf50522f20243d8c4d427712687d8236a326c2..b41c9b8f3e357c72157501a1dae8241c7a834ca9 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -3925,6 +3925,7 @@ radv_stage_flush(struct radv_cmd_buffer *cmd_buffer, VkPipelineStageFlags2 src_s if (src_stage_mask & (VK_PIPELINE_STAGE_2_COMPUTE_SHADER_BIT | VK_PIPELINE_STAGE_2_TRANSFER_BIT | VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR | + VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR | VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR | VK_PIPELINE_STAGE_2_BOTTOM_OF_PIPE_BIT | VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT)) { cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH; @@ -4117,6 +4118,7 @@ radv_dst_access_flush(struct radv_cmd_buffer *cmd_buffer, VkAccessFlags2 dst_fla if (!image_is_coherent) flush_bits |= RADV_CMD_FLAG_INV_L2; break; + case VK_ACCESS_2_SHADER_BINDING_TABLE_READ_BIT_KHR: case VK_ACCESS_2_SHADER_READ_BIT: case VK_ACCESS_2_SHADER_STORAGE_READ_BIT: flush_bits |= RADV_CMD_FLAG_INV_VCACHE; @@ -7681,62 +7683,67 @@ radv_indirect_dispatch(struct radv_cmd_buffer *cmd_buffer, struct radeon_winsys_ radv_compute_dispatch(cmd_buffer, &info); } -static void -radv_rt_dispatch(struct radv_cmd_buffer *cmd_buffer, const struct radv_dispatch_info *info) -{ - radv_dispatch(cmd_buffer, info, cmd_buffer->state.rt_pipeline, - VK_PIPELINE_BIND_POINT_RAY_TRACING_KHR); -} +enum radv_rt_mode { + radv_rt_mode_direct, + radv_rt_mode_indirect, + radv_rt_mode_indirect2, +}; -static bool -radv_rt_set_args(struct radv_cmd_buffer *cmd_buffer, - const VkStridedDeviceAddressRegionKHR *tables, uint64_t launch_size_va, - struct radv_dispatch_info *info) +static void +radv_trace_rays(struct radv_cmd_buffer *cmd_buffer, const VkTraceRaysIndirectCommand2KHR *tables, + uint64_t indirect_va, enum radv_rt_mode mode) { struct radv_compute_pipeline *pipeline = cmd_buffer->state.rt_pipeline; uint32_t base_reg = pipeline->base.user_data_0[MESA_SHADER_COMPUTE]; - void *ptr; - uint32_t *write_ptr; - uint32_t offset; - info->unaligned = true; + struct radv_dispatch_info info = {0}; + info.unaligned = true; - if (!radv_cmd_buffer_upload_alloc(cmd_buffer, 64 + (launch_size_va ? 0 : 12), &offset, &ptr)) - return false; + uint64_t launch_size_va; + uint64_t sbt_va; - write_ptr = ptr; - for (unsigned i = 0; i < 4; ++i, write_ptr += 4) { - write_ptr[0] = tables[i].deviceAddress; - write_ptr[1] = tables[i].deviceAddress >> 32; - write_ptr[2] = tables[i].stride; - write_ptr[3] = 0; - } + if (mode != radv_rt_mode_indirect2) { + uint32_t upload_size = mode == radv_rt_mode_direct + ? sizeof(VkTraceRaysIndirectCommand2KHR) + : offsetof(VkTraceRaysIndirectCommand2KHR, width); + + uint32_t offset; + if (!radv_cmd_buffer_upload_data(cmd_buffer, upload_size, tables, &offset)) + return; + + uint64_t upload_va = radv_buffer_get_va(cmd_buffer->upload.upload_bo) + offset; - if (!launch_size_va) { - write_ptr[0] = info->blocks[0]; - write_ptr[1] = info->blocks[1]; - write_ptr[2] = info->blocks[2]; + launch_size_va = (mode == radv_rt_mode_direct) + ? upload_va + offsetof(VkTraceRaysIndirectCommand2KHR, width) + : indirect_va; + sbt_va = upload_va; } else { - info->va = launch_size_va; + launch_size_va = indirect_va + offsetof(VkTraceRaysIndirectCommand2KHR, width); + sbt_va = indirect_va; } - uint64_t va = radv_buffer_get_va(cmd_buffer->upload.upload_bo) + offset; + if (mode == radv_rt_mode_direct) { + info.blocks[0] = tables->width; + info.blocks[1] = tables->height; + info.blocks[2] = tables->depth; + } else + info.va = launch_size_va; struct radv_userdata_info *desc_loc = radv_lookup_user_sgpr(&pipeline->base, MESA_SHADER_COMPUTE, AC_UD_CS_SBT_DESCRIPTORS); if (desc_loc->sgpr_idx != -1) { radv_emit_shader_pointer(cmd_buffer->device, cmd_buffer->cs, - base_reg + desc_loc->sgpr_idx * 4, va, false); + base_reg + desc_loc->sgpr_idx * 4, sbt_va, false); } struct radv_userdata_info *size_loc = radv_lookup_user_sgpr(&pipeline->base, MESA_SHADER_COMPUTE, AC_UD_CS_RAY_LAUNCH_SIZE_ADDR); if (size_loc->sgpr_idx != -1) { radv_emit_shader_pointer(cmd_buffer->device, cmd_buffer->cs, - base_reg + size_loc->sgpr_idx * 4, launch_size_va ? launch_size_va : (va + 64), false); + base_reg + size_loc->sgpr_idx * 4, launch_size_va, false); } - return true; + radv_dispatch(cmd_buffer, &info, pipeline, VK_PIPELINE_BIND_POINT_RAY_TRACING_KHR); } VKAPI_ATTR void VKAPI_CALL @@ -7748,23 +7755,25 @@ radv_CmdTraceRaysKHR(VkCommandBuffer commandBuffer, uint32_t width, uint32_t height, uint32_t depth) { RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); - struct radv_dispatch_info info = {0}; - info.blocks[0] = width; - info.blocks[1] = height; - info.blocks[2] = depth; - - const VkStridedDeviceAddressRegionKHR tables[] = { - *pRaygenShaderBindingTable, - *pMissShaderBindingTable, - *pHitShaderBindingTable, - *pCallableShaderBindingTable, + VkTraceRaysIndirectCommand2KHR tables = { + .raygenShaderRecordAddress = pRaygenShaderBindingTable->deviceAddress, + .raygenShaderRecordSize = pRaygenShaderBindingTable->size, + .missShaderBindingTableAddress = pMissShaderBindingTable->deviceAddress, + .missShaderBindingTableSize = pMissShaderBindingTable->size, + .missShaderBindingTableStride = pMissShaderBindingTable->stride, + .hitShaderBindingTableAddress = pHitShaderBindingTable->deviceAddress, + .hitShaderBindingTableSize = pHitShaderBindingTable->size, + .hitShaderBindingTableStride = pHitShaderBindingTable->stride, + .callableShaderBindingTableAddress = pCallableShaderBindingTable->deviceAddress, + .callableShaderBindingTableSize = pCallableShaderBindingTable->size, + .callableShaderBindingTableStride = pCallableShaderBindingTable->stride, + .width = width, + .height = height, + .depth = depth, }; - if (!radv_rt_set_args(cmd_buffer, tables, 0, &info)) - return; - - radv_rt_dispatch(cmd_buffer, &info); + radv_trace_rays(cmd_buffer, &tables, 0, radv_rt_mode_direct); } VKAPI_ATTR void VKAPI_CALL @@ -7779,18 +7788,31 @@ radv_CmdTraceRaysIndirectKHR(VkCommandBuffer commandBuffer, assert(cmd_buffer->device->use_global_bo_list); - const VkStridedDeviceAddressRegionKHR tables[] = { - *pRaygenShaderBindingTable, - *pMissShaderBindingTable, - *pHitShaderBindingTable, - *pCallableShaderBindingTable, + VkTraceRaysIndirectCommand2KHR tables = { + .raygenShaderRecordAddress = pRaygenShaderBindingTable->deviceAddress, + .raygenShaderRecordSize = pRaygenShaderBindingTable->size, + .missShaderBindingTableAddress = pMissShaderBindingTable->deviceAddress, + .missShaderBindingTableSize = pMissShaderBindingTable->size, + .missShaderBindingTableStride = pMissShaderBindingTable->stride, + .hitShaderBindingTableAddress = pHitShaderBindingTable->deviceAddress, + .hitShaderBindingTableSize = pHitShaderBindingTable->size, + .hitShaderBindingTableStride = pHitShaderBindingTable->stride, + .callableShaderBindingTableAddress = pCallableShaderBindingTable->deviceAddress, + .callableShaderBindingTableSize = pCallableShaderBindingTable->size, + .callableShaderBindingTableStride = pCallableShaderBindingTable->stride, }; - struct radv_dispatch_info info = {0}; - if (!radv_rt_set_args(cmd_buffer, tables, indirectDeviceAddress, &info)) - return; + radv_trace_rays(cmd_buffer, &tables, indirectDeviceAddress, radv_rt_mode_indirect); +} + +VKAPI_ATTR void VKAPI_CALL +radv_CmdTraceRaysIndirect2KHR(VkCommandBuffer commandBuffer, VkDeviceAddress indirectDeviceAddress) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + + assert(cmd_buffer->device->use_global_bo_list); - radv_rt_dispatch(cmd_buffer, &info); + radv_trace_rays(cmd_buffer, NULL, indirectDeviceAddress, radv_rt_mode_indirect2); } static void diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index e92b56a8a05e6d1caf43f726e15882f8092de687..e3b342b01e2c61fb9e1cff774709092a3702411b 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -437,6 +437,7 @@ radv_physical_device_get_supported_extensions(const struct radv_physical_device .KHR_pipeline_library = !device->use_llvm, .KHR_push_descriptor = true, .KHR_ray_query = radv_enable_rt(device, false), + .KHR_ray_tracing_maintenance1 = radv_enable_rt(device, false), .KHR_ray_tracing_pipeline = radv_enable_rt(device, true), .KHR_relaxed_block_layout = true, .KHR_sampler_mirror_clamp_to_edge = true, @@ -1678,6 +1679,13 @@ radv_GetPhysicalDeviceFeatures2(VkPhysicalDevice physicalDevice, features->rayTraversalPrimitiveCulling = true; break; } + case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_RAY_TRACING_MAINTENANCE_1_FEATURES_KHR: { + VkPhysicalDeviceRayTracingMaintenance1FeaturesKHR *features = + (VkPhysicalDeviceRayTracingMaintenance1FeaturesKHR *)ext; + features->rayTracingMaintenance1 = true; + features->rayTracingPipelineTraceRaysIndirect2 = radv_enable_rt(pdevice, true); + break; + } case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MAINTENANCE_4_FEATURES: { VkPhysicalDeviceMaintenance4Features *features = (VkPhysicalDeviceMaintenance4Features *)ext; diff --git a/src/amd/vulkan/radv_pipeline_rt.c b/src/amd/vulkan/radv_pipeline_rt.c index 4205fe67dfab5351785c2cf08c3087b122c4e94b..c1b0042cc5d4539a191bdf2291aea6168c470282 100644 --- a/src/amd/vulkan/radv_pipeline_rt.c +++ b/src/amd/vulkan/radv_pipeline_rt.c @@ -333,23 +333,25 @@ insert_rt_return(nir_builder *b, const struct rt_variables *vars) } enum sbt_type { - SBT_RAYGEN, - SBT_MISS, - SBT_HIT, - SBT_CALLABLE, + SBT_RAYGEN = offsetof(VkTraceRaysIndirectCommand2KHR, raygenShaderRecordAddress), + SBT_MISS = offsetof(VkTraceRaysIndirectCommand2KHR, missShaderBindingTableAddress), + SBT_HIT = offsetof(VkTraceRaysIndirectCommand2KHR, hitShaderBindingTableAddress), + SBT_CALLABLE = offsetof(VkTraceRaysIndirectCommand2KHR, callableShaderBindingTableAddress), }; static nir_ssa_def * get_sbt_ptr(nir_builder *b, nir_ssa_def *idx, enum sbt_type binding) { - nir_ssa_def *desc = nir_load_sbt_amd(b, 4, .binding = binding); - nir_ssa_def *base_addr = nir_pack_64_2x32(b, nir_channels(b, desc, 0x3)); - nir_ssa_def *stride = nir_channel(b, desc, 2); + nir_ssa_def *desc_base_addr = nir_load_sbt_base_amd(b); - nir_ssa_def *ret = nir_imul(b, idx, stride); - ret = nir_iadd(b, base_addr, nir_u2u64(b, ret)); + nir_ssa_def *desc = + nir_pack_64_2x32(b, nir_build_load_smem_amd(b, 2, desc_base_addr, nir_imm_int(b, binding))); - return ret; + nir_ssa_def *stride_offset = nir_imm_int(b, binding + (binding == SBT_RAYGEN ? 8 : 16)); + nir_ssa_def *stride = + nir_pack_64_2x32(b, nir_build_load_smem_amd(b, 2, desc_base_addr, stride_offset)); + + return nir_iadd(b, desc, nir_imul(b, nir_u2u64(b, idx), stride)); } static void @@ -647,6 +649,12 @@ lower_rt_instructions(nir_shader *shader, struct rt_variables *vars, unsigned ca nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret); break; } + case nir_intrinsic_load_cull_mask: { + b_shader.cursor = nir_instr_remove(instr); + nir_ssa_def *ret = nir_load_var(&b_shader, vars->cull_mask); + nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret); + break; + } case nir_intrinsic_ignore_ray_intersection: { b_shader.cursor = nir_instr_remove(instr); nir_store_var(&b_shader, vars->ahit_status, nir_imm_int(&b_shader, 1), 1); diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c index 074ab33be5b275ecc7e30aeeafc71ff52a92d2bd..5a6030b84c1ec7106e71665be697bff56427770f 100644 --- a/src/amd/vulkan/radv_query.c +++ b/src/amd/vulkan/radv_query.c @@ -934,6 +934,8 @@ radv_CreateQueryPool(VkDevice _device, const VkQueryPoolCreateInfo *pCreateInfo, case VK_QUERY_TYPE_TIMESTAMP: case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_COMPACTED_SIZE_KHR: case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SERIALIZATION_SIZE_KHR: + case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SERIALIZATION_BOTTOM_LEVEL_POINTERS_KHR: + case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SIZE_KHR: pool->stride = 8; break; case VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT: @@ -1000,7 +1002,9 @@ radv_GetQueryPoolResults(VkDevice _device, VkQueryPool queryPool, uint32_t first switch (pool->type) { case VK_QUERY_TYPE_TIMESTAMP: case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_COMPACTED_SIZE_KHR: - case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SERIALIZATION_SIZE_KHR: { + case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SERIALIZATION_SIZE_KHR: + case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SERIALIZATION_BOTTOM_LEVEL_POINTERS_KHR: + case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SIZE_KHR: { uint64_t const *src64 = (uint64_t const *)src; uint64_t value; @@ -1203,6 +1207,8 @@ radv_query_result_size(const struct radv_query_pool *pool, VkQueryResultFlags fl case VK_QUERY_TYPE_TIMESTAMP: case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_COMPACTED_SIZE_KHR: case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SERIALIZATION_SIZE_KHR: + case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SERIALIZATION_BOTTOM_LEVEL_POINTERS_KHR: + case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SIZE_KHR: case VK_QUERY_TYPE_OCCLUSION: values += 1; break; @@ -1290,6 +1296,8 @@ radv_CmdCopyQueryPoolResults(VkCommandBuffer commandBuffer, VkQueryPool queryPoo case VK_QUERY_TYPE_TIMESTAMP: case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_COMPACTED_SIZE_KHR: case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SERIALIZATION_SIZE_KHR: + case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SERIALIZATION_BOTTOM_LEVEL_POINTERS_KHR: + case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SIZE_KHR: if (flags & VK_QUERY_RESULT_WAIT_BIT) { for (unsigned i = 0; i < queryCount; ++i, dest_va += stride) { unsigned query = firstQuery + i; @@ -1343,6 +1351,8 @@ query_clear_value(VkQueryType type) case VK_QUERY_TYPE_TIMESTAMP: case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_COMPACTED_SIZE_KHR: case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SERIALIZATION_SIZE_KHR: + case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SERIALIZATION_BOTTOM_LEVEL_POINTERS_KHR: + case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SIZE_KHR: return (uint32_t)TIMESTAMP_NOT_READY; default: return 0; @@ -1755,6 +1765,12 @@ radv_CmdWriteAccelerationStructuresPropertiesKHR( case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SERIALIZATION_SIZE_KHR: va += offsetof(struct radv_accel_struct_header, serialization_size); break; + case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SERIALIZATION_BOTTOM_LEVEL_POINTERS_KHR: + va += offsetof(struct radv_accel_struct_header, instance_count); + break; + case VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SIZE_KHR: + va += offsetof(struct radv_accel_struct_header, size); + break; default: unreachable("Unhandle accel struct query type."); } diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index f7e5470aec7264b995d3f80f184812989b23449c..a0233ef4df785e0e3201443e5991c1906472278c 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -666,6 +666,7 @@ radv_shader_spirv_to_nir(struct radv_device *device, const struct radv_pipeline_ .multiview = true, .physical_storage_buffer_address = true, .post_depth_coverage = true, + .ray_cull_mask = true, .ray_query = true, .ray_tracing = true, .ray_traversal_primitive_culling = true, diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c index 58cb5eaf1bae73a9f3b154927efcc3f76691ab1a..eabee36bb6413cba7590508b7308ab3d6500d86f 100644 --- a/src/amd/vulkan/radv_shader_info.c +++ b/src/amd/vulkan/radv_shader_info.c @@ -197,7 +197,7 @@ gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr, case nir_intrinsic_store_output: gather_intrinsic_store_output_info(nir, instr, info); break; - case nir_intrinsic_load_sbt_amd: + case nir_intrinsic_load_sbt_base_amd: info->cs.uses_sbt = true; break; case nir_intrinsic_load_force_vrs_rates_amd: diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c index be5bbfc993a3dc6b493b1ca4f7f61f3eb7051708..657de0b9d41ed9288ea9943df9a6c55b710c9140 100644 --- a/src/compiler/nir/nir.c +++ b/src/compiler/nir/nir.c @@ -2507,6 +2507,8 @@ nir_intrinsic_from_system_value(gl_system_value val) return nir_intrinsic_load_ray_geometry_index; case SYSTEM_VALUE_RAY_INSTANCE_CUSTOM_INDEX: return nir_intrinsic_load_ray_instance_custom_index; + case SYSTEM_VALUE_CULL_MASK: + return nir_intrinsic_load_cull_mask; case SYSTEM_VALUE_MESH_VIEW_COUNT: return nir_intrinsic_load_mesh_view_count; case SYSTEM_VALUE_FRAG_SHADING_RATE: @@ -2652,6 +2654,8 @@ nir_system_value_from_intrinsic(nir_intrinsic_op intrin) return SYSTEM_VALUE_RAY_GEOMETRY_INDEX; case nir_intrinsic_load_ray_instance_custom_index: return SYSTEM_VALUE_RAY_INSTANCE_CUSTOM_INDEX; + case nir_intrinsic_load_cull_mask: + return SYSTEM_VALUE_CULL_MASK; case nir_intrinsic_load_frag_shading_rate: return SYSTEM_VALUE_FRAG_SHADING_RATE; case nir_intrinsic_load_mesh_view_count: diff --git a/src/compiler/nir/nir_divergence_analysis.c b/src/compiler/nir/nir_divergence_analysis.c index 600a3d3609205bc4e68311b756af357b6a28b958..48033cc8235f3e3a8fe3af676a5ad27009d4e415 100644 --- a/src/compiler/nir/nir_divergence_analysis.c +++ b/src/compiler/nir/nir_divergence_analysis.c @@ -107,6 +107,7 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr) case nir_intrinsic_load_num_subgroups: case nir_intrinsic_load_ray_launch_size: case nir_intrinsic_load_ray_launch_size_addr_amd: + case nir_intrinsic_load_sbt_base_amd: case nir_intrinsic_load_subgroup_size: case nir_intrinsic_load_subgroup_eq_mask: case nir_intrinsic_load_subgroup_ge_mask: @@ -373,7 +374,6 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr) case nir_intrinsic_masked_swizzle_amd: case nir_intrinsic_is_sparse_texels_resident: case nir_intrinsic_sparse_residency_code_and: - case nir_intrinsic_load_sbt_amd: case nir_intrinsic_bvh64_intersect_ray_amd: case nir_intrinsic_image_deref_load_param_intel: case nir_intrinsic_image_load_raw_intel: diff --git a/src/compiler/nir/nir_intrinsics.py b/src/compiler/nir/nir_intrinsics.py index 2276f424a8ca7569f01f311436c925e36a9daa15..b5995947f69398d1fb88d72b9a8888989790ca83 100644 --- a/src/compiler/nir/nir_intrinsics.py +++ b/src/compiler/nir/nir_intrinsics.py @@ -856,6 +856,7 @@ system_value("ray_flags", 1) system_value("ray_geometry_index", 1) system_value("ray_instance_custom_index", 1) system_value("shader_record_ptr", 1, bit_sizes=[64]) +system_value("cull_mask", 1) # Driver-specific viewport scale/offset parameters. # @@ -1355,10 +1356,8 @@ intrinsic("overwrite_vs_arguments_amd", src_comp=[1, 1], indices=[]) # Overwrites TES input registers, for use with vertex compaction after culling. src = {tes_u, tes_v, rel_patch_id, patch_id}. intrinsic("overwrite_tes_arguments_amd", src_comp=[1, 1, 1, 1], indices=[]) -# loads a descriptor for an sbt. -# src = [index] BINDING = which table -intrinsic("load_sbt_amd", dest_comp=4, bit_sizes=[32], indices=[BINDING], - flags=[CAN_ELIMINATE, CAN_REORDER]) +# The address of the sbt descriptors. +system_value("sbt_base_amd", 1, bit_sizes=[64]) # 1. HW descriptor # 2. BVH node(64-bit pointer as 2x32 ...) diff --git a/src/compiler/nir/nir_opt_preamble.c b/src/compiler/nir/nir_opt_preamble.c index fce0844a97702a28ade530be53b1500bcbdd2818..0a9224de15fff8985c533e51f1a6eeabf4eccf95 100644 --- a/src/compiler/nir/nir_opt_preamble.c +++ b/src/compiler/nir/nir_opt_preamble.c @@ -118,6 +118,8 @@ can_move_intrinsic(nir_intrinsic_instr *instr, opt_preamble_ctx *ctx) case nir_intrinsic_load_num_workgroups: case nir_intrinsic_load_workgroup_size: case nir_intrinsic_load_ray_launch_size: + case nir_intrinsic_load_ray_launch_size_addr_amd: + case nir_intrinsic_load_sbt_base_amd: case nir_intrinsic_load_is_indexed_draw: case nir_intrinsic_load_viewport_scale: case nir_intrinsic_load_user_clip_plane: @@ -187,7 +189,6 @@ can_move_intrinsic(nir_intrinsic_instr *instr, opt_preamble_ctx *ctx) case nir_intrinsic_load_vulkan_descriptor: case nir_intrinsic_quad_swizzle_amd: case nir_intrinsic_masked_swizzle_amd: - case nir_intrinsic_load_sbt_amd: case nir_intrinsic_load_ssbo_address: case nir_intrinsic_bindless_resource_ir3: return can_move_srcs(&instr->instr, ctx); diff --git a/src/compiler/shader_enums.c b/src/compiler/shader_enums.c index c90906c5790df38eb18a905db736de5ccabbb032..65b2164b024c96318fbf347e2e2529fe60182444 100644 --- a/src/compiler/shader_enums.c +++ b/src/compiler/shader_enums.c @@ -331,6 +331,7 @@ gl_system_value_name(gl_system_value sysval) ENUM(SYSTEM_VALUE_RAY_HIT_KIND), ENUM(SYSTEM_VALUE_RAY_FLAGS), ENUM(SYSTEM_VALUE_RAY_GEOMETRY_INDEX), + ENUM(SYSTEM_VALUE_CULL_MASK), ENUM(SYSTEM_VALUE_MESH_VIEW_COUNT), ENUM(SYSTEM_VALUE_MESH_VIEW_INDICES), ENUM(SYSTEM_VALUE_GS_HEADER_IR3), diff --git a/src/compiler/shader_enums.h b/src/compiler/shader_enums.h index 6301b4b02baee2c5a29e96c1c8fb956c81d694f3..0d93726d9e6017143b464146480160c49d28834c 100644 --- a/src/compiler/shader_enums.h +++ b/src/compiler/shader_enums.h @@ -825,6 +825,7 @@ typedef enum SYSTEM_VALUE_RAY_FLAGS, SYSTEM_VALUE_RAY_GEOMETRY_INDEX, SYSTEM_VALUE_RAY_INSTANCE_CUSTOM_INDEX, + SYSTEM_VALUE_CULL_MASK, /*@}*/ /** diff --git a/src/compiler/shader_info.h b/src/compiler/shader_info.h index 20974ad8dd67df40a1aabc0a2089476de171ba2d..186cef2619c4c799c689ddff30585fce32b27a08 100644 --- a/src/compiler/shader_info.h +++ b/src/compiler/shader_info.h @@ -81,6 +81,7 @@ struct spirv_supported_capabilities { bool physical_storage_buffer_address; bool post_depth_coverage; bool printf; + bool ray_cull_mask; bool ray_tracing; bool ray_query; bool ray_traversal_primitive_culling; diff --git a/src/compiler/spirv/spirv.core.grammar.json b/src/compiler/spirv/spirv.core.grammar.json index 766a4ed21de7ee3abd2e5f8f8f1b8b1181762639..d124018fee5e8a568900d50b44b4c0cbf723922b 100644 --- a/src/compiler/spirv/spirv.core.grammar.json +++ b/src/compiler/spirv/spirv.core.grammar.json @@ -4183,6 +4183,21 @@ "capabilities" : [ "SubgroupVoteKHR" ], "version" : "None" }, + { + "opname" : "OpGroupNonUniformRotateKHR", + "class" : "Group", + "opcode" : 4431, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdScope", "name" : "'Execution'" }, + { "kind" : "IdRef", "name" : "'Value'" }, + { "kind" : "IdRef", "name" : "'Delta'" }, + { "kind" : "IdRef", "name" : "'ClusterSize'", "quantifier" : "?" } + ], + "capabilities" : [ "GroupNonUniformRotateKHR" ], + "version" : "None" + }, { "opname" : "OpSubgroupReadInvocationKHR", "class" : "Group", @@ -5029,7 +5044,7 @@ "opname" : "OpDemoteToHelperInvocationEXT", "class" : "Control-Flow", "opcode" : 5380, - "capabilities" : [ "DemoteToHelperInvocation" ], + "capabilities" : [ "DemoteToHelperInvocationEXT" ], "version" : "1.6" }, { @@ -7869,6 +7884,43 @@ "extensions" : [ "SPV_INTEL_unstructured_loop_controls" ], "version" : "None" }, + { + "opname" : "OpAliasDomainDeclINTEL", + "class" : "@exclude", + "opcode" : 5911, + "operands" : [ + { "kind" : "IdResult"}, + { "kind" : "IdRef", "quantifier" : "?", "name" : "'Name'" } + ], + "capabilities" : [ "MemoryAccessAliasingINTEL" ], + "extensions" : [ "SPV_INTEL_memory_access_aliasing" ], + "version" : "None" + }, + { + "opname" : "OpAliasScopeDeclINTEL", + "class" : "@exclude", + "opcode" : 5912, + "operands" : [ + { "kind" : "IdResult"}, + { "kind" : "IdRef", "name" : "'Alias Domain'"}, + { "kind" : "IdRef", "quantifier" : "?", "name" : "'Name'" } + ], + "capabilities" : [ "MemoryAccessAliasingINTEL" ], + "extensions" : [ "SPV_INTEL_memory_access_aliasing" ], + "version" : "None" + }, + { + "opname" : "OpAliasScopeListDeclINTEL", + "class" : "@exclude", + "opcode" : 5913, + "operands" : [ + { "kind" : "IdResult"}, + { "kind" : "IdRef", "quantifier" : "*", "name" : "'AliasScope1, AliasScope2, ...'" } + ], + "capabilities" : [ "MemoryAccessAliasingINTEL" ], + "extensions" : [ "SPV_INTEL_memory_access_aliasing" ], + "version" : "None" + }, { "opname" : "OpFixedSqrtINTEL", "class" : "@exclude", @@ -8512,6 +8564,142 @@ ], "capabilities" : [ "LongConstantCompositeINTEL" ], "version" : "None" + }, + { + "opname" : "OpControlBarrierArriveINTEL", + "class" : "Barrier", + "opcode" : 6142, + "operands" : [ + { "kind" : "IdScope", "name" : "'Execution'" }, + { "kind" : "IdScope", "name" : "'Memory'" }, + { "kind" : "IdMemorySemantics", "name" : "'Semantics'" } + ], + "capabilities" : [ "SplitBarrierINTEL" ], + "version" : "None" + }, + { + "opname" : "OpControlBarrierWaitINTEL", + "class" : "Barrier", + "opcode" : 6143, + "operands" : [ + { "kind" : "IdScope", "name" : "'Execution'" }, + { "kind" : "IdScope", "name" : "'Memory'" }, + { "kind" : "IdMemorySemantics", "name" : "'Semantics'" } + ], + "capabilities" : [ "SplitBarrierINTEL" ], + "version" : "None" + }, + { + "opname" : "OpGroupIMulKHR", + "class" : "Group", + "opcode" : 6401, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdScope", "name" : "'Execution'" }, + { "kind" : "GroupOperation", "name" : "'Operation'" }, + { "kind" : "IdRef", "name" : "'X'" } + ], + "capabilities" : [ "GroupUniformArithmeticKHR" ], + "version" : "None" + }, + { + "opname" : "OpGroupFMulKHR", + "class" : "Group", + "opcode" : 6402, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdScope", "name" : "'Execution'" }, + { "kind" : "GroupOperation", "name" : "'Operation'" }, + { "kind" : "IdRef", "name" : "'X'" } + ], + "capabilities" : [ "GroupUniformArithmeticKHR" ], + "version" : "None" + }, + { + "opname" : "OpGroupBitwiseAndKHR", + "class" : "Group", + "opcode" : 6403, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdScope", "name" : "'Execution'" }, + { "kind" : "GroupOperation", "name" : "'Operation'" }, + { "kind" : "IdRef", "name" : "'X'" } + ], + "capabilities" : [ "GroupUniformArithmeticKHR" ], + "version" : "None" + }, + { + "opname" : "OpGroupBitwiseOrKHR", + "class" : "Group", + "opcode" : 6404, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdScope", "name" : "'Execution'" }, + { "kind" : "GroupOperation", "name" : "'Operation'" }, + { "kind" : "IdRef", "name" : "'X'" } + ], + "capabilities" : [ "GroupUniformArithmeticKHR" ], + "version" : "None" + }, + { + "opname" : "OpGroupBitwiseXorKHR", + "class" : "Group", + "opcode" : 6405, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdScope", "name" : "'Execution'" }, + { "kind" : "GroupOperation", "name" : "'Operation'" }, + { "kind" : "IdRef", "name" : "'X'" } + ], + "capabilities" : [ "GroupUniformArithmeticKHR" ], + "version" : "None" + }, + { + "opname" : "OpGroupLogicalAndKHR", + "class" : "Group", + "opcode" : 6406, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdScope", "name" : "'Execution'" }, + { "kind" : "GroupOperation", "name" : "'Operation'" }, + { "kind" : "IdRef", "name" : "'X'" } + ], + "capabilities" : [ "GroupUniformArithmeticKHR" ], + "version" : "None" + }, + { + "opname" : "OpGroupLogicalOrKHR", + "class" : "Group", + "opcode" : 6407, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdScope", "name" : "'Execution'" }, + { "kind" : "GroupOperation", "name" : "'Operation'" }, + { "kind" : "IdRef", "name" : "'X'" } + ], + "capabilities" : [ "GroupUniformArithmeticKHR" ], + "version" : "None" + }, + { + "opname" : "OpGroupLogicalXorKHR", + "class" : "Group", + "opcode" : 6408, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdScope", "name" : "'Execution'" }, + { "kind" : "GroupOperation", "name" : "'Operation'" }, + { "kind" : "IdRef", "name" : "'X'" } + ], + "capabilities" : [ "GroupUniformArithmeticKHR" ], + "version" : "None" } ], "operand_kinds" : [ @@ -9090,6 +9278,26 @@ "capabilities" : [ "VulkanMemoryModel" ], "extensions" : [ "SPV_KHR_vulkan_memory_model" ], "version" : "1.5" + }, + { + "enumerant" : "AliasScopeINTELMask", + "value" : "0x10000", + "parameters" : [ + { "kind" : "IdRef" } + ], + "capabilities" : [ "MemoryAccessAliasingINTEL" ], + "extensions" : [ "SPV_INTEL_memory_access_aliasing" ], + "version" : "None" + }, + { + "enumerant" : "NoAliasINTELMask", + "parameters" : [ + { "kind" : "IdRef" } + ], + "value" : "0x20000", + "capabilities" : [ "MemoryAccessAliasingINTEL" ], + "extensions" : [ "SPV_INTEL_memory_access_aliasing" ], + "version" : "None" } ] }, @@ -9241,6 +9449,10 @@ { "enumerant" : "CPP_for_OpenCL", "value" : 6 + }, + { + "enumerant" : "SYCL", + "value" : 7 } ] }, @@ -9738,6 +9950,13 @@ ], "version" : "1.4" }, + { + "enumerant": "EarlyAndLateFragmentTestsAMD", + "value": 5017, + "capabilities": [ "Shader" ], + "extensions": [ "SPV_AMD_shader_early_and_late_fragment_tests" ], + "version": "None" + }, { "enumerant" : "StencilRefReplacingEXT", "value" : 5027, @@ -9745,6 +9964,48 @@ "extensions" : [ "SPV_EXT_shader_stencil_export" ], "version" : "None" }, + { + "enumerant": "StencilRefUnchangedFrontAMD", + "value": 5079, + "capabilities": [ "StencilExportEXT" ], + "extensions": [ "SPV_AMD_shader_early_and_late_fragment_tests", "SPV_EXT_shader_stencil_export" ], + "version": "None" + }, + { + "enumerant": "StencilRefGreaterFrontAMD", + "value": 5080, + "capabilities": [ "StencilExportEXT" ], + "extensions": [ "SPV_AMD_shader_early_and_late_fragment_tests", "SPV_EXT_shader_stencil_export" ], + "version": "None" + }, + { + "enumerant": "StencilRefLessFrontAMD", + "value": 5081, + "capabilities": [ "StencilExportEXT" ], + "extensions": [ "SPV_AMD_shader_early_and_late_fragment_tests", "SPV_EXT_shader_stencil_export" ], + "version": "None" + }, + { + "enumerant": "StencilRefUnchangedBackAMD", + "value": 5082, + "capabilities": [ "StencilExportEXT" ], + "extensions": [ "SPV_AMD_shader_early_and_late_fragment_tests", "SPV_EXT_shader_stencil_export" ], + "version": "None" + }, + { + "enumerant": "StencilRefGreaterBackAMD", + "value": 5083, + "capabilities": [ "StencilExportEXT" ], + "extensions": [ "SPV_AMD_shader_early_and_late_fragment_tests", "SPV_EXT_shader_stencil_export" ], + "version": "None" + }, + { + "enumerant": "StencilRefLessBackAMD", + "value": 5084, + "capabilities": [ "StencilExportEXT" ], + "extensions": [ "SPV_AMD_shader_early_and_late_fragment_tests", "SPV_EXT_shader_stencil_export" ], + "version": "None" + }, { "enumerant" : "OutputLinesNV", "value" : 5269, @@ -9917,6 +10178,15 @@ ], "capabilities" : [ "FPGAKernelAttributesINTEL" ], "version" : "None" + }, + { + "enumerant" : "NamedBarrierCountINTEL", + "value" : 6417, + "parameters" : [ + { "kind" : "LiteralInteger", "name" : "'Barrier Count'" } + ], + "capabilities" : [ "VectorComputeINTEL" ], + "version" : "None" } ] }, @@ -11579,6 +11849,24 @@ "capabilities" : [ "LoopFuseINTEL" ], "version" : "None" }, + { + "enumerant" : "AliasScopeINTEL", + "value" : 5914, + "parameters" : [ + { "kind" : "IdRef", "name" : "'Aliasing Scopes List'" } + ], + "capabilities" : [ "MemoryAccessAliasingINTEL" ], + "version" : "None" + }, + { + "enumerant" : "NoAliasINTEL", + "value" : 5915, + "parameters" : [ + { "kind" : "IdRef", "name" : "'Aliasing Scopes List'" } + ], + "capabilities" : [ "MemoryAccessAliasingINTEL" ], + "version" : "None" + }, { "enumerant" : "BufferLocationINTEL", "value" : 5921, @@ -12377,6 +12665,13 @@ "capabilities" : [ "ShaderSMBuiltinsNV" ], "extensions" : [ "SPV_NV_shader_sm_builtins" ], "version" : "None" + }, + { + "enumerant" : "CullMaskKHR", + "value" : 6021, + "capabilities" : [ "RayCullMaskKHR" ], + "extensions" : [ "SPV_KHR_ray_cull_mask" ], + "version" : "None" } ] }, @@ -13677,6 +13972,12 @@ "extensions" : [ "SPV_INTEL_loop_fuse" ], "version" : "None" }, + { + "enumerant" : "MemoryAccessAliasingINTEL", + "value" : 5910, + "extensions" : [ "SPV_INTEL_memory_access_aliasing" ], + "version" : "None" + }, { "enumerant" : "FPGABufferLocationINTEL", "value" : 5920, @@ -13759,12 +14060,25 @@ "extensions" : [ "SPV_KHR_integer_dot_product" ], "version" : "1.6" }, + { + "enumerant" : "RayCullMaskKHR", + "value" : 6020, + "extensions" : [ "SPV_KHR_ray_cull_mask" ], + "version" : "None" + }, { "enumerant" : "BitInstructions", "value" : 6025, "extensions" : [ "SPV_KHR_bit_instructions" ], "version" : "None" }, + { + "enumerant" : "GroupNonUniformRotateKHR", + "value" : 6026, + "capabilities" : [ "GroupNonUniform" ], + "extensions" : [ "SPV_KHR_subgroup_rotate" ], + "version" : "None" + }, { "enumerant" : "AtomicFloat32AddEXT", "value" : 6033, @@ -13800,6 +14114,18 @@ "value" : 6114, "extensions" : [ "SPV_INTEL_debug_module" ], "version" : "None" + }, + { + "enumerant" : "SplitBarrierINTEL", + "value" : 6141, + "extensions" : [ "SPV_INTEL_split_barrier" ], + "version" : "None" + }, + { + "enumerant" : "GroupUniformArithmeticKHR", + "value" : 6400, + "extensions" : [ "SPV_KHR_uniform_group_instructions"], + "version" : "None" } ] }, diff --git a/src/compiler/spirv/spirv.h b/src/compiler/spirv/spirv.h index c15736e255bd817c6e857532f1e84fe96dbb7d88..6f3424054296def1b12ec119f86459b653bc0686 100644 --- a/src/compiler/spirv/spirv.h +++ b/src/compiler/spirv/spirv.h @@ -31,7 +31,7 @@ /* ** Enumeration tokens for SPIR-V, in various styles: -** C, C++, C++11, JSON, Lua, Python, C#, D +** C, C++, C++11, JSON, Lua, Python, C#, D, Beef ** ** - C will have tokens with a "Spv" prefix, e.g.: SpvSourceLanguageGLSL ** - C++ will have tokens in the "spv" name space, e.g.: spv::SourceLanguageGLSL @@ -41,6 +41,8 @@ ** - C# will use enum classes in the Specification class located in the "Spv" namespace, ** e.g.: Spv.Specification.SourceLanguage.GLSL ** - D will have tokens under the "spv" module, e.g: spv.SourceLanguage.GLSL +** - Beef will use enum classes in the Specification class located in the "Spv" namespace, +** e.g.: Spv.Specification.SourceLanguage.GLSL ** ** Some tokens act like mask values, which can be OR'd together, ** while others are mutually exclusive. The mask-like ones have @@ -70,6 +72,7 @@ typedef enum SpvSourceLanguage_ { SpvSourceLanguageOpenCL_CPP = 4, SpvSourceLanguageHLSL = 5, SpvSourceLanguageCPP_for_OpenCL = 6, + SpvSourceLanguageSYCL = 7, SpvSourceLanguageMax = 0x7fffffff, } SpvSourceLanguage; @@ -162,7 +165,14 @@ typedef enum SpvExecutionMode_ { SpvExecutionModeSignedZeroInfNanPreserve = 4461, SpvExecutionModeRoundingModeRTE = 4462, SpvExecutionModeRoundingModeRTZ = 4463, + SpvExecutionModeEarlyAndLateFragmentTestsAMD = 5017, SpvExecutionModeStencilRefReplacingEXT = 5027, + SpvExecutionModeStencilRefUnchangedFrontAMD = 5079, + SpvExecutionModeStencilRefGreaterFrontAMD = 5080, + SpvExecutionModeStencilRefLessFrontAMD = 5081, + SpvExecutionModeStencilRefUnchangedBackAMD = 5082, + SpvExecutionModeStencilRefGreaterBackAMD = 5083, + SpvExecutionModeStencilRefLessBackAMD = 5084, SpvExecutionModeOutputLinesNV = 5269, SpvExecutionModeOutputPrimitivesNV = 5270, SpvExecutionModeDerivativeGroupQuadsNV = 5289, @@ -184,6 +194,7 @@ typedef enum SpvExecutionMode_ { SpvExecutionModeNoGlobalOffsetINTEL = 5895, SpvExecutionModeNumSIMDWorkitemsINTEL = 5896, SpvExecutionModeSchedulerTargetFmaxMhzINTEL = 5903, + SpvExecutionModeNamedBarrierCountINTEL = 6417, SpvExecutionModeMax = 0x7fffffff, } SpvExecutionMode; @@ -546,6 +557,8 @@ typedef enum SpvDecoration_ { SpvDecorationPrefetchINTEL = 5902, SpvDecorationStallEnableINTEL = 5905, SpvDecorationFuseLoopsInFunctionINTEL = 5907, + SpvDecorationAliasScopeINTEL = 5914, + SpvDecorationNoAliasINTEL = 5915, SpvDecorationBufferLocationINTEL = 5921, SpvDecorationIOPipeStorageINTEL = 5944, SpvDecorationFunctionFloatingPointModeINTEL = 6080, @@ -677,6 +690,7 @@ typedef enum SpvBuiltIn_ { SpvBuiltInSMCountNV = 5375, SpvBuiltInWarpIDNV = 5376, SpvBuiltInSMIDNV = 5377, + SpvBuiltInCullMaskKHR = 6021, SpvBuiltInMax = 0x7fffffff, } SpvBuiltIn; @@ -804,6 +818,8 @@ typedef enum SpvMemoryAccessShift_ { SpvMemoryAccessMakePointerVisibleKHRShift = 4, SpvMemoryAccessNonPrivatePointerShift = 5, SpvMemoryAccessNonPrivatePointerKHRShift = 5, + SpvMemoryAccessAliasScopeINTELMaskShift = 16, + SpvMemoryAccessNoAliasINTELMaskShift = 17, SpvMemoryAccessMax = 0x7fffffff, } SpvMemoryAccessShift; @@ -818,6 +834,8 @@ typedef enum SpvMemoryAccessMask_ { SpvMemoryAccessMakePointerVisibleKHRMask = 0x00000010, SpvMemoryAccessNonPrivatePointerMask = 0x00000020, SpvMemoryAccessNonPrivatePointerKHRMask = 0x00000020, + SpvMemoryAccessAliasScopeINTELMaskMask = 0x00010000, + SpvMemoryAccessNoAliasINTELMaskMask = 0x00020000, } SpvMemoryAccessMask; typedef enum SpvScope_ { @@ -1059,6 +1077,7 @@ typedef enum SpvCapability_ { SpvCapabilityFPGAMemoryAccessesINTEL = 5898, SpvCapabilityFPGAClusterAttributesINTEL = 5904, SpvCapabilityLoopFuseINTEL = 5906, + SpvCapabilityMemoryAccessAliasingINTEL = 5910, SpvCapabilityFPGABufferLocationINTEL = 5920, SpvCapabilityArbitraryPrecisionFixedPointINTEL = 5922, SpvCapabilityUSMStorageClassesINTEL = 5935, @@ -1073,13 +1092,17 @@ typedef enum SpvCapability_ { SpvCapabilityDotProductInput4x8BitPackedKHR = 6018, SpvCapabilityDotProduct = 6019, SpvCapabilityDotProductKHR = 6019, + SpvCapabilityRayCullMaskKHR = 6020, SpvCapabilityBitInstructions = 6025, + SpvCapabilityGroupNonUniformRotateKHR = 6026, SpvCapabilityAtomicFloat32AddEXT = 6033, SpvCapabilityAtomicFloat64AddEXT = 6034, SpvCapabilityLongConstantCompositeINTEL = 6089, SpvCapabilityOptNoneINTEL = 6094, SpvCapabilityAtomicFloat16AddEXT = 6095, SpvCapabilityDebugInfoModuleINTEL = 6114, + SpvCapabilitySplitBarrierINTEL = 6141, + SpvCapabilityGroupUniformArithmeticKHR = 6400, SpvCapabilityMax = 0x7fffffff, } SpvCapability; @@ -1535,6 +1558,7 @@ typedef enum SpvOp_ { SpvOpSubgroupAllKHR = 4428, SpvOpSubgroupAnyKHR = 4429, SpvOpSubgroupAllEqualKHR = 4430, + SpvOpGroupNonUniformRotateKHR = 4431, SpvOpSubgroupReadInvocationKHR = 4432, SpvOpTraceRayKHR = 4445, SpvOpExecuteCallableKHR = 4446, @@ -1801,6 +1825,9 @@ typedef enum SpvOp_ { SpvOpArbitraryFloatPowRINTEL = 5881, SpvOpArbitraryFloatPowNINTEL = 5882, SpvOpLoopControlINTEL = 5887, + SpvOpAliasDomainDeclINTEL = 5911, + SpvOpAliasScopeDeclINTEL = 5912, + SpvOpAliasScopeListDeclINTEL = 5913, SpvOpFixedSqrtINTEL = 5923, SpvOpFixedRecipINTEL = 5924, SpvOpFixedRsqrtINTEL = 5925, @@ -1839,10 +1866,23 @@ typedef enum SpvOp_ { SpvOpTypeStructContinuedINTEL = 6090, SpvOpConstantCompositeContinuedINTEL = 6091, SpvOpSpecConstantCompositeContinuedINTEL = 6092, + SpvOpControlBarrierArriveINTEL = 6142, + SpvOpControlBarrierWaitINTEL = 6143, + SpvOpGroupIMulKHR = 6401, + SpvOpGroupFMulKHR = 6402, + SpvOpGroupBitwiseAndKHR = 6403, + SpvOpGroupBitwiseOrKHR = 6404, + SpvOpGroupBitwiseXorKHR = 6405, + SpvOpGroupLogicalAndKHR = 6406, + SpvOpGroupLogicalOrKHR = 6407, + SpvOpGroupLogicalXorKHR = 6408, SpvOpMax = 0x7fffffff, } SpvOp; #ifdef SPV_ENABLE_UTILITY_CODE +#ifndef __cplusplus +#include +#endif inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultType) { *hasResult = *hasResultType = false; switch (opcode) { @@ -2197,6 +2237,7 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy case SpvOpSubgroupAllKHR: *hasResult = true; *hasResultType = true; break; case SpvOpSubgroupAnyKHR: *hasResult = true; *hasResultType = true; break; case SpvOpSubgroupAllEqualKHR: *hasResult = true; *hasResultType = true; break; + case SpvOpGroupNonUniformRotateKHR: *hasResult = true; *hasResultType = true; break; case SpvOpSubgroupReadInvocationKHR: *hasResult = true; *hasResultType = true; break; case SpvOpTraceRayKHR: *hasResult = false; *hasResultType = false; break; case SpvOpExecuteCallableKHR: *hasResult = false; *hasResultType = false; break; @@ -2452,6 +2493,9 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy case SpvOpArbitraryFloatPowRINTEL: *hasResult = true; *hasResultType = true; break; case SpvOpArbitraryFloatPowNINTEL: *hasResult = true; *hasResultType = true; break; case SpvOpLoopControlINTEL: *hasResult = false; *hasResultType = false; break; + case SpvOpAliasDomainDeclINTEL: *hasResult = true; *hasResultType = false; break; + case SpvOpAliasScopeDeclINTEL: *hasResult = true; *hasResultType = false; break; + case SpvOpAliasScopeListDeclINTEL: *hasResult = true; *hasResultType = false; break; case SpvOpFixedSqrtINTEL: *hasResult = true; *hasResultType = true; break; case SpvOpFixedRecipINTEL: *hasResult = true; *hasResultType = true; break; case SpvOpFixedRsqrtINTEL: *hasResult = true; *hasResultType = true; break; @@ -2490,6 +2534,16 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy case SpvOpTypeStructContinuedINTEL: *hasResult = false; *hasResultType = false; break; case SpvOpConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; case SpvOpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; + case SpvOpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break; + case SpvOpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break; + case SpvOpGroupIMulKHR: *hasResult = true; *hasResultType = true; break; + case SpvOpGroupFMulKHR: *hasResult = true; *hasResultType = true; break; + case SpvOpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break; + case SpvOpGroupBitwiseOrKHR: *hasResult = true; *hasResultType = true; break; + case SpvOpGroupBitwiseXorKHR: *hasResult = true; *hasResultType = true; break; + case SpvOpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break; + case SpvOpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break; + case SpvOpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break; } } #endif /* SPV_ENABLE_UTILITY_CODE */ diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index cb5f99f3fb208057e1a38cf828a39b90ecbf2bca..ca2e92ab148a3c13470a2d1c554a6da5936a07a4 100644 --- a/src/compiler/spirv/spirv_to_nir.c +++ b/src/compiler/spirv/spirv_to_nir.c @@ -4789,6 +4789,10 @@ vtn_handle_preamble_instruction(struct vtn_builder *b, SpvOp opcode, spv_check_supported(intel_subgroup_buffer_block_io, cap); break; + case SpvCapabilityRayCullMaskKHR: + spv_check_supported(ray_cull_mask, cap); + break; + case SpvCapabilityRayTracingKHR: spv_check_supported(ray_tracing, cap); break; diff --git a/src/compiler/spirv/vtn_gather_types_c.py b/src/compiler/spirv/vtn_gather_types_c.py index d30a91d2b7a41271ddcd02ea80f8582e2d03021b..17324f950be5532f5712185afdb900883a1f757b 100644 --- a/src/compiler/spirv/vtn_gather_types_c.py +++ b/src/compiler/spirv/vtn_gather_types_c.py @@ -58,7 +58,7 @@ def find_result_types(spirv): 'OpDecorationGroup', 'OpLabel', ] - assert name.startswith('OpType') or name in untyped_insts + assert name.startswith('OpType') or name.startswith('OpAlias') or name in untyped_insts if res_arg_idx >= 0 or res_type_arg_idx >= 0: yield (name, res_arg_idx, res_type_arg_idx) diff --git a/src/compiler/spirv/vtn_variables.c b/src/compiler/spirv/vtn_variables.c index b258611448069f6226e275b0877f907b24b98ebd..e8161e2e5657c1bfaa11101eae7606c52d8ecbf4 100644 --- a/src/compiler/spirv/vtn_variables.c +++ b/src/compiler/spirv/vtn_variables.c @@ -1121,6 +1121,10 @@ vtn_get_builtin_location(struct vtn_builder *b, *location = SYSTEM_VALUE_RAY_GEOMETRY_INDEX; set_mode_system_value(b, mode); break; + case SpvBuiltInCullMaskKHR: + *location = SYSTEM_VALUE_CULL_MASK; + set_mode_system_value(b, mode); + break; case SpvBuiltInShadingRateKHR: *location = SYSTEM_VALUE_FRAG_SHADING_RATE; set_mode_system_value(b, mode); diff --git a/src/vulkan/registry/vk.xml b/src/vulkan/registry/vk.xml index 97ec3b068420a9c0d1c54548ff480e839f5db000..6d9f7295240b772cb5ab501b49db482deec7dbbc 100644 --- a/src/vulkan/registry/vk.xml +++ b/src/vulkan/registry/vk.xml @@ -159,7 +159,7 @@ branch of the member gitlab server. // Vulkan 1.3 version number #define VK_API_VERSION_1_3 VK_MAKE_API_VERSION(0, 1, 3, 0)// Patch version should always be set to 0 // Version of this file -#define VK_HEADER_VERSION 211 +#define VK_HEADER_VERSION 216 // Complete version of this file #define VK_HEADER_VERSION_COMPLETE VK_MAKE_API_VERSION(0, 1, 3, VK_HEADER_VERSION) @@ -399,6 +399,8 @@ typedef void CAMetalLayer; typedef VkFlags VkImageFormatConstraintsFlagsFUCHSIA; typedef VkFlags VkImageConstraintsInfoFlagsFUCHSIA; typedef VkFlags VkGraphicsPipelineLibraryFlagsEXT; + typedef VkFlags VkImageCompressionFlagsEXT; + typedef VkFlags VkImageCompressionFixedRateFlagsEXT; Video Core extension typedef VkFlags VkVideoCodecOperationFlagsKHR; @@ -648,6 +650,7 @@ typedef void CAMetalLayer; + @@ -661,6 +664,8 @@ typedef void CAMetalLayer; + + WSI extensions @@ -944,8 +949,8 @@ typedef void CAMetalLayer; const char* const* ppEnabledExtensionNamesExtension names to be enabled - VkQueueFlags queueFlagsQueue flags - uint32_t queueCount + VkQueueFlags queueFlagsQueue flags + uint32_t queueCount uint32_t timestampValidBits VkExtent3D minImageTransferGranularityMinimum alignment requirement for image transfers @@ -994,9 +999,9 @@ typedef void CAMetalLayer; VkDeviceSize sizeSize of the range within the memory object - VkFormatFeatureFlags linearTilingFeaturesFormat features in case of linear tiling - VkFormatFeatureFlags optimalTilingFeaturesFormat features in case of optimal tiling - VkFormatFeatureFlags bufferFeaturesFormat features supported by buffers + VkFormatFeatureFlags linearTilingFeaturesFormat features in case of linear tiling + VkFormatFeatureFlags optimalTilingFeaturesFormat features in case of optimal tiling + VkFormatFeatureFlags bufferFeaturesFormat features supported by buffers VkExtent3D maxExtentmax image dimensions for this resource type @@ -1245,7 +1250,7 @@ typedef void CAMetalLayer; const void* pNext VkDescriptorPoolCreateFlags flags uint32_t maxSets - uint32_t poolSizeCount + uint32_t poolSizeCount const VkDescriptorPoolSize* pPoolSizes @@ -2133,9 +2138,9 @@ typedef void CAMetalLayer; uint32_t maxIndirectCommandsStreamCount uint32_t maxIndirectCommandsTokenOffset uint32_t maxIndirectCommandsStreamStride - uint32_t minSequencesCountBufferOffsetAlignment - uint32_t minSequencesIndexBufferOffsetAlignment - uint32_t minIndirectCommandsBufferOffsetAlignment + uint32_t minSequencesCountBufferOffsetAlignment + uint32_t minSequencesIndexBufferOffsetAlignment + uint32_t minIndirectCommandsBufferOffsetAlignment VkStructureType sType @@ -2267,7 +2272,7 @@ typedef void CAMetalLayer; VkStructureType sType void* pNext - VkQueueFamilyProperties queueFamilyProperties + VkQueueFamilyProperties queueFamilyProperties @@ -3441,8 +3446,8 @@ typedef void CAMetalLayer; VkStructureType sType void* pNext - uint32_t priorityCount - VkQueueGlobalPriorityKHR priorities[VK_MAX_GLOBAL_PRIORITY_SIZE_KHR] + uint32_t priorityCount + VkQueueGlobalPriorityKHR priorities[VK_MAX_GLOBAL_PRIORITY_SIZE_KHR] @@ -3907,7 +3912,7 @@ typedef void CAMetalLayer; VkStructureType sType void* pNext - VkPipelineStageFlags checkpointExecutionStageMask + VkPipelineStageFlags checkpointExecutionStageMask VkStructureType sType @@ -3956,7 +3961,7 @@ typedef void CAMetalLayer; VkDeviceSize maxTransformFeedbackBufferSize uint32_t maxTransformFeedbackStreamDataSize uint32_t maxTransformFeedbackBufferDataSize - uint32_t maxTransformFeedbackBufferDataStride + uint32_t maxTransformFeedbackBufferDataStride VkBool32 transformFeedbackQueries VkBool32 transformFeedbackStreamsLinesTriangles VkBool32 transformFeedbackRasterizationStreamSelect @@ -4000,11 +4005,7 @@ typedef void CAMetalLayer; VkBool32 computeDerivativeGroupQuads VkBool32 computeDerivativeGroupLinear - - VkStructureType sType - void* pNext - VkBool32 fragmentShaderBarycentric - + VkStructureType sType void* pNext @@ -4282,6 +4283,28 @@ typedef void CAMetalLayer; uint32_t height uint32_t depth + + VkDeviceAddress raygenShaderRecordAddress + VkDeviceSize raygenShaderRecordSize + VkDeviceAddress missShaderBindingTableAddress + VkDeviceSize missShaderBindingTableSize + VkDeviceSize missShaderBindingTableStride + VkDeviceAddress hitShaderBindingTableAddress + VkDeviceSize hitShaderBindingTableSize + VkDeviceSize hitShaderBindingTableStride + VkDeviceAddress callableShaderBindingTableAddress + VkDeviceSize callableShaderBindingTableSize + VkDeviceSize callableShaderBindingTableStride + uint32_t width + uint32_t height + uint32_t depth + + + VkStructureType sType + void* pNext + VkBool32 rayTracingMaintenance1 + VkBool32 rayTracingPipelineTraceRaysIndirect2 + VkStructureType sType void* pNext @@ -4774,6 +4797,7 @@ typedef void CAMetalLayer; const void* pNext VkPipeline pipeline + VkStructureType sType void* pNext @@ -5560,7 +5584,7 @@ typedef void CAMetalLayer; VkBool32 fragmentShadingRateNonTrivialCombinerOps VkExtent2D maxFragmentSize uint32_t maxFragmentSizeAspectRatio - uint32_t maxFragmentShadingRateCoverageSamples + uint32_t maxFragmentShadingRateCoverageSamples VkSampleCountFlagBits maxFragmentShadingRateRasterizationSamples VkBool32 fragmentShadingRateWithShaderDepthStencilWrites VkBool32 fragmentShadingRateWithSampleMask @@ -5757,7 +5781,7 @@ typedef void CAMetalLayer; VkStructureType sType void* pNext - VkPipelineStageFlags2 checkpointExecutionStageMask + VkPipelineStageFlags2 checkpointExecutionStageMask VkStructureType sType @@ -5781,7 +5805,7 @@ typedef void CAMetalLayer; VkStructureTypesType void* pNext - VkVideoCodecOperationFlagsKHR videoCodecOperations + VkVideoCodecOperationFlagsKHR videoCodecOperations VkStructureTypesType @@ -6451,6 +6475,16 @@ typedef void CAMetalLayer; int64_t renderMajor int64_t renderMinor + + VkStructureType sType + void* pNext + VkBool32 fragmentShaderBarycentric + + + VkStructureType sType + void* pNext + VkBool32 triStripVertexOrderIndependentOfProvokingVertex + VkStructureType sType void* pNext @@ -6609,9 +6643,9 @@ typedef void CAMetalLayer; VkStructureType sType void* pNext - VkFormatFeatureFlags2 linearTilingFeatures - VkFormatFeatureFlags2 optimalTilingFeatures - VkFormatFeatureFlags2 bufferFeatures + VkFormatFeatureFlags2 linearTilingFeatures + VkFormatFeatureFlags2 optimalTilingFeatures + VkFormatFeatureFlags2 bufferFeatures @@ -6773,6 +6807,82 @@ typedef void CAMetalLayer; size_t descriptorOffset uint32_t descriptorSize + + VkStructureType sType + const void* pNext + VkImageCompressionFlagsEXT flags + uint32_t compressionControlPlaneCount + VkImageCompressionFixedRateFlagsEXT* pFixedRateFlags + + + VkStructureType sType + void* pNext + VkBool32 imageCompressionControl + + + VkStructureType sType + void* pNext + VkImageCompressionFlagsEXT imageCompressionFlags + VkImageCompressionFixedRateFlagsEXT imageCompressionFixedRateFlags + + + VkStructureType sType + void* pNext + VkBool32 imageCompressionControlSwapchain + + + VkStructureType sType + void* pNext + VkImageSubresource imageSubresource + + + VkStructureType sType + void* pNext + VkSubresourceLayout subresourceLayout + + + VkStructureType sType + const void* pNext + VkBool32 disallowMerging + + + uint32_t postMergeSubpassCount + + + VkStructureType sType + const void* pNext + VkRenderPassCreationFeedbackInfoEXT* pRenderPassFeedback + + + VkSubpassMergeStatusEXT subpassMergeStatus + char description[VK_MAX_DESCRIPTION_SIZE] + uint32_t postMergeIndex + + + VkStructureType sType + const void* pNext + VkRenderPassSubpassFeedbackInfoEXT* pSubpassFeedback + + + VkStructureType sType + void* pNext + VkBool32 subpassMergeFeedback + + + VkStructureType sType + void* pNext + uint8_t pipelineIdentifier[VK_UUID_SIZE] + + + VkStructureType sType + void* pNext + VkBool32 pipelinePropertiesIdentifier + + + VkStructureType sType + void* pNext + VkBool32 shaderEarlyAndLateFragmentTests + Vulkan enumerant (token) definitions @@ -7293,7 +7403,7 @@ typedef void CAMetalLayer; Error codes (negative values) - + @@ -8078,6 +8188,7 @@ typedef void CAMetalLayer; + @@ -8211,6 +8322,22 @@ typedef void CAMetalLayer; + + + + + + + + + + + + + + + + @@ -8409,29 +8536,31 @@ typedef void CAMetalLayer; - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + @@ -8577,6 +8706,39 @@ typedef void CAMetalLayer; + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -8941,7 +9103,7 @@ typedef void CAMetalLayer; VkBufferView bufferView const VkAllocationCallbacks* pAllocator - + VkResult vkCreateImage VkDevice device const VkImageCreateInfo* pCreateInfo @@ -9680,7 +9842,7 @@ typedef void CAMetalLayer; uint32_t* pPresentModeCount VkPresentModeKHR* pPresentModes - + VkResult vkCreateSwapchainKHR VkDevice device const VkSwapchainCreateInfoKHR* pCreateInfo @@ -11016,6 +11178,11 @@ typedef void CAMetalLayer; const VkStridedDeviceAddressRegionKHR* pCallableShaderBindingTable VkDeviceAddress indirectDeviceAddress + + void vkCmdTraceRaysIndirect2KHR + VkCommandBuffer commandBuffer + VkDeviceAddress indirectDeviceAddress + void vkGetDeviceAccelerationStructureCompatibilityKHR VkDevice device @@ -11745,6 +11912,19 @@ typedef void CAMetalLayer; VkDescriptorSet descriptorSet void** ppData + + void vkGetImageSubresourceLayout2EXT + VkDevice device + VkImage image + const VkImageSubresource2EXT* pSubresource + VkSubresourceLayout2EXT* pLayout + + + VkResult vkGetPipelinePropertiesEXT + VkDevice device + const VkPipelineInfoEXT* pPipelineInfo + VkBaseOutStructure* pPipelineProperties + @@ -11768,6 +11948,24 @@ typedef void CAMetalLayer; + + + + + + + + + + + + + + + + + + @@ -11796,18 +11994,6 @@ typedef void CAMetalLayer; - - - - - - - - - - - - @@ -12786,6 +12972,9 @@ typedef void CAMetalLayer; + + + @@ -13604,7 +13793,7 @@ typedef void CAMetalLayer; - + @@ -13734,7 +13923,7 @@ typedef void CAMetalLayer; - + @@ -14573,7 +14762,7 @@ typedef void CAMetalLayer; - + @@ -15993,11 +16182,11 @@ typedef void CAMetalLayer; - + - + @@ -17128,7 +17317,7 @@ typedef void CAMetalLayer; - + @@ -17374,16 +17563,22 @@ typedef void CAMetalLayer; - + - - + + + + - + - - + + + + + + @@ -17556,10 +17751,26 @@ typedef void CAMetalLayer; - - - - + + + + + + + + + + + + + + + + + + + + @@ -17567,6 +17778,9 @@ typedef void CAMetalLayer; + + + @@ -17880,10 +18094,17 @@ typedef void CAMetalLayer; - + - - + + + + + + + + + @@ -17893,7 +18114,6 @@ typedef void CAMetalLayer; - @@ -17996,12 +18216,24 @@ typedef void CAMetalLayer; - + - - - - + + + + + + + + + + + + + + + + @@ -18246,6 +18478,7 @@ typedef void CAMetalLayer; + @@ -18377,10 +18610,12 @@ typedef void CAMetalLayer; - + - - + + + + @@ -18513,10 +18748,21 @@ typedef void CAMetalLayer; - + - - + + + + + + + + + + + + + @@ -18576,6 +18822,7 @@ typedef void CAMetalLayer; + @@ -18584,6 +18831,90 @@ typedef void CAMetalLayer; + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -20071,6 +20402,9 @@ typedef void CAMetalLayer; + + + @@ -20127,6 +20461,9 @@ typedef void CAMetalLayer; + + + @@ -20516,6 +20853,9 @@ typedef void CAMetalLayer; + + + @@ -20588,5 +20928,8 @@ typedef void CAMetalLayer; + + +