ir3: Rewrite (ss) and (sy) accounting, use (ss) for shared reg writes

It turns out that we need to wait on (ss) when reading instructions that write shared register, which is currently just movs and movmsk. To do this properly, we should also make the scheduler aware of this, but currently a number of places have a hardcoded assumption that (ss) is only for sfu instructions. Even worse, the schedulers also have it hardcoded that (sy) only applies to texture instructions, which means we don't try to hide latency for ldc and ldib at all. To solve the latter problem, I also needed a proper way to compare changes. This led to some experimentation with computerator and the first commit which adds proper numbers for a few key (sy)-producing instructions and the introduction of a systall metric that complements sstall. This also adds some helper functions that are used in the next commit to clean up sched/postsched/delay, so they now all use the same metric. All this makes fixing shared register writes in the final commit much easier.

Because this vastly increases the amount of latency-hiding we do, this does lead to some regressions in occupancy. If we want, we can artificially reduce the delay in sched to compensate, although I think the benefit of actually basing things on a real measurable metric rather than "meh, I guess 10 cycles is ok" outweighs it.