diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
index 5ef3a0d7e8495f9afd8b9c454d368ae8f15da7a8..b24a759194504f7691be9d372c33c1af22028966 100644
--- a/src/amd/common/ac_surface.c
+++ b/src/amd/common/ac_surface.c
@@ -185,7 +185,7 @@ bool ac_is_modifier_supported(const struct radeon_info *info,
 
    if (util_format_is_compressed(format) ||
        util_format_is_depth_or_stencil(format) ||
-       util_format_get_blocksize(format) > 8)
+       util_format_get_blocksizebits(format) > 64)
       return false;
 
    if (info->chip_class < GFX9)
@@ -194,7 +194,8 @@ bool ac_is_modifier_supported(const struct radeon_info *info,
    if(modifier == DRM_FORMAT_MOD_LINEAR)
       return true;
 
-   if (util_format_get_num_planes(format) > 1)
+   /* GFX8 may need a different modifier for each plane */
+   if (info->chip_class < GFX9 && util_format_get_num_planes(format) > 1)
       return false;
 
    uint32_t allowed_swizzles = 0xFFFFFFFF;
@@ -214,6 +215,10 @@ bool ac_is_modifier_supported(const struct radeon_info *info,
       return false;
 
    if (ac_modifier_has_dcc(modifier)) {
+      /* TODO: support multi-planar formats with DCC */
+      if (util_format_get_num_planes(format) > 1)
+         return false;
+
       if (!info->has_graphics)
          return false;
 
@@ -276,7 +281,7 @@ bool ac_get_supported_modifiers(const struct radeon_info *info,
               common_dcc |
               AMD_FMT_MOD_SET(PIPE, pipes))
 
-      if (util_format_get_blocksize(format) == 4) {
+      if (util_format_get_blocksizebits(format) == 32) {
          if (info->max_render_backends == 1) {
             ADD_MOD(AMD_FMT_MOD |
                     AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_S_X) |
@@ -365,7 +370,7 @@ bool ac_get_supported_modifiers(const struct radeon_info *info,
               AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_S_X) |
               AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits))
 
-      if (util_format_get_blocksize(format) != 4) {
+      if (util_format_get_blocksizebits(format) != 32) {
          ADD_MOD(AMD_FMT_MOD |
                  AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_D) |
                  AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX9));
diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c
index 312934d19e9b92201ab01089eac977a2dda04fbb..310eb9aadf6d303b46c18e5a8f01634bd9d994f4 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_dec.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_dec.c
@@ -1651,8 +1651,13 @@ static struct pb_buffer *rvcn_dec_message_decode(struct radeon_decoder *dec,
    decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.blk_w;
    decode->dt_uv_pitch = decode->dt_pitch / 2;
 
+   if (luma->surface.meta_offset) {
+      RVID_ERR("DCC surfaces not supported.\n");
+      return NULL;
+   }
+
    decode->dt_tiling_mode = 0;
-   decode->dt_swizzle_mode = RDECODE_SW_MODE_LINEAR;
+   decode->dt_swizzle_mode = luma->surface.u.gfx9.swizzle_mode;
    decode->dt_array_mode = RDECODE_ARRAY_MODE_LINEAR;
    decode->dt_field_mode = ((struct vl_video_buffer *)target)->base.interlaced;
    decode->dt_surf_tile_config = 0;
diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c
index c54cf2d9f45c3814dade5796d6bde1546ca322c8..50621e0ed8c1aeb906b2306d99c2777a7f03442e 100644
--- a/src/gallium/drivers/radeonsi/si_texture.c
+++ b/src/gallium/drivers/radeonsi/si_texture.c
@@ -1341,16 +1341,6 @@ static void si_query_dmabuf_modifiers(struct pipe_screen *screen,
 {
    struct si_screen *sscreen = (struct si_screen *)screen;
 
-   if (util_format_is_yuv(format)) {
-      if (max) {
-         *modifiers = DRM_FORMAT_MOD_LINEAR;
-         if (external_only)
-            *external_only = 1;
-      }
-      *count = 1;
-      return;
-   }
-
    unsigned ac_mod_count = max;
    ac_get_supported_modifiers(&sscreen->info, &(struct ac_modifier_options) {
          .dcc = !(sscreen->debug_flags & DBG(NO_DCC)),
@@ -1361,7 +1351,7 @@ static void si_query_dmabuf_modifiers(struct pipe_screen *screen,
       }, format, &ac_mod_count,  max ? modifiers : NULL);
    if (max && external_only) {
       for (unsigned i = 0; i < ac_mod_count; ++i)
-         external_only[i] = 0;
+         external_only[i] = util_format_is_yuv(format);
    }
    *count = ac_mod_count;
 }
diff --git a/src/util/format/u_format.csv b/src/util/format/u_format.csv
index cab28847abab88bb5d5ad18eb71c94210dac7324..8cb7e88de2fd918faa8d39a51ecce91cdb83637e 100644
--- a/src/util/format/u_format.csv
+++ b/src/util/format/u_format.csv
@@ -34,6 +34,7 @@
 # - layout, per enum util_format_layout, in shortened lower caps
 # - pixel block's width
 # - pixel block's height
+# - pixel block's depth, in number of pixels
 # - channel encoding (only meaningful for plain layout), containing for each
 #   channel the following information:
 #   - type, one of