virpipe: tess ctrl outputs dependant on ordering for correct results
The new NIR varying linker to be added via !15731 (merged) appears to expose an existing bug in the drivers handling of varyings.
For example with the piglit test:
tests/spec/arb_tessellation_shader/execution/variable-indexing/tcs-output-array-float-index-rd-after-barrier.shader_test
Due to the new linker only bothering to sort external facing SSO shader interface in alphabetical order as opposed to the GLSL IR sorting all varyings. We just happen to end up with the TCS going from:
decl_var shader_out INTERP_MODE_NONE vec4[4] color (32.xyzw, 3, 0)
decl_var shader_out INTERP_MODE_NONE float[4][16] m1 (33.x, 4, 0)
decl_var shader_out INTERP_MODE_NONE float[4][14] m2 (49.x, 20, 0)
to
decl_var shader_out INTERP_MODE_NONE float[4][16] m1 (32.x, 3, 0)
decl_var shader_out INTERP_MODE_NONE float[4][14] m2 (48.x, 19, 0)
decl_var shader_out INTERP_MODE_NONE vec4[4] color (62.xyzw, 33, 0)
The m1 and m2 outputs are only used internally in TCS by other instances and not read by the TES. It seems that because color is no longer in the first input slot that the shader ends up failing for some reason.
@airlied thoughts? I have no idea where to begin looking.