freedreno/ir3: image coherency issues
The non-coherent imageLoads look like they're not quite following the rules. See piglit arb_shader_image_load_store-layer
for example. GLSL ES 3.2 says:
Within a single shader invocation, the visibility and order of writes made by that invocation are well- defined. However, the relative order of reads and writes to a single shared memory address from multiple separate shader invocations is largely undefined. Additionally, the order of accesses to multiple memory addresses performed by a single shader invocation, as observed by other shader invocations, is also undefined.
The shader does:
#version 150
#extension GL_ARB_shader_image_load_store : enable
#define W 16
#define H 96
#define N 1536
#define GRID_T vec4
#define RET_IMAGE_UNIFORM_T layout(rgba32f) uniform image2D
#define IN(name) v##name
#define BASE_T float
#define DATA_T vec4
#define SCALE vec4(1.00000000e+00, 1.00000000e+00, 1.00000000e+00, 1.00000000e+00)
#define IMAGE_ADDR_(addr_t, ext, i) addr_t(ivec3(i % ext.x, i / ext.x % ext.y, i / ext.x / ext.y))
#define IMAGE_ADDR(idx) IMAGE_ADDR_(int, ivec4(1536, 1, 1, 1), ((idx).x + W * (idx).y))
#define IMAGE_LAYOUT_Q layout(rgba32f)
#define IMAGE_BARE_T image1D
#define IMAGE_UNIFORM_T IMAGE_LAYOUT_Q uniform IMAGE_BARE_T
IMAGE_UNIFORM_T img;
GRID_T op(ivec2 idx, GRID_T x) {
GRID_T v = imageLoad(img, IMAGE_ADDR(idx));
imageStore(img, IMAGE_ADDR(idx), DATA_T(33));
return v;
}
The shader we generate looks like:
[...]
MESA: info: (nop3) add.u r3.x, r0.x, c4.w
MESA: info: (nop3) sel.b32 r3.y, r3.x, r2.w, r0.x
MESA: info: (rpt2)nop
MESA: info: isam (f32)(xyzw)r3.w, r3.y, s#0, t#0
MESA: info: stib.b.typed.1d.f32.4.imm r1.x, r3.y, 0
The isam ends up getting the result after the stib has landed. If we put a memoryBarrier() in between the load and store (which I don't think is required because of the "well-defined" part of the spec text), or if we put an sy
on the stib, then the test passes.
We have barrier classes set on the sam vs the stib, should those be feeding into setting (sy)
?