1. 27 Jan, 2023 1 commit
  2. 26 Jan, 2023 1 commit
    • Emma Anholt's avatar
      ci: Add manual rules variations to disable irrelevant driver jobs. · f6c06ef2
      Emma Anholt authored and Marge Bot's avatar Marge Bot committed
      If you're only affecting one or a couple of drivers, it would be nice if
      your pipeline buttons on the web UI weren't full of manual run buttons for
      all the other drivers.
      
      This is a bunch of duplicated lines, but less than it could have been now
      that we have !references.
      
      In some of these cases (i915g, nouveau, etnaviv), we have no non-manual
      jobs for those drivers, so I could have just rewritten the original
      "driver-rules" to "driver-manual-rules".  I decided to keep things
      consistent between drivers, though, because this is all esoteric enough to
      readers already without making different drivers' rules look different.
      
      Fixes: #4891
      
      
      Acked-by: David Heidelberg's avatarDavid Heidelberg <david.heidelberg@collabora.com>
      Part-of: <!17445>
      f6c06ef2
  3. 24 Jan, 2023 1 commit
  4. 19 Jan, 2023 1 commit
  5. 16 Jan, 2023 8 commits
    • Alyssa Rosenzweig's avatar
      pan/mdg: Remove MSGS debug · f02354d3
      Alyssa Rosenzweig authored and Marge Bot's avatar Marge Bot committed
      
      
      These should all be unreachable and what's left is dead-code.
      
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
      Part-of: <!19350>
      f02354d3
    • Alyssa Rosenzweig's avatar
      pan/mdg: Scalarize LUT instructions in NIR · 23968aee
      Alyssa Rosenzweig authored and Marge Bot's avatar Marge Bot committed
      
      
      Simpler. Small shaderdb regressions from using IR registers instead of
      SSA, but that's probably what we needed for correctness (given that SSA
      is violated otherwise) hence the Cc.
      
      total instructions in shared programs: 1520220 -> 1518127 (-0.14%)
      instructions in affected programs: 167437 -> 165344 (-1.25%)
      helped: 662
      HURT: 206
      helped stats (abs) min: 1.0 max: 46.0 x̄: 3.65 x̃: 2
      helped stats (rel) min: 0.18% max: 22.22% x̄: 2.43% x̃: 1.71%
      HURT stats (abs)   min: 1.0 max: 7.0 x̄: 1.56 x̃: 1
      HURT stats (rel)   min: 0.17% max: 8.33% x̄: 2.66% x̃: 2.33%
      95% mean confidence interval for instructions value: -2.65 -2.18
      95% mean confidence interval for instructions %-change: -1.45% -0.99%
      Instructions are helped.
      
      total bundles in shared programs: 649844 -> 649345 (-0.08%)
      bundles in affected programs: 59278 -> 58779 (-0.84%)
      helped: 577
      HURT: 249
      helped stats (abs) min: 1.0 max: 39.0 x̄: 1.56 x̃: 1
      helped stats (rel) min: 0.26% max: 30.00% x̄: 3.13% x̃: 2.19%
      HURT stats (abs)   min: 1.0 max: 12.0 x̄: 1.61 x̃: 1
      HURT stats (rel)   min: 0.58% max: 25.00% x̄: 5.25% x̃: 4.00%
      95% mean confidence interval for bundles value: -0.78 -0.43
      95% mean confidence interval for bundles %-change: -0.98% -0.23%
      Bundles are helped.
      
      total quadwords in shared programs: 1136767 -> 1134956 (-0.16%)
      quadwords in affected programs: 141780 -> 139969 (-1.28%)
      helped: 744
      HURT: 311
      helped stats (abs) min: 1.0 max: 9.0 x̄: 3.13 x̃: 2
      helped stats (rel) min: 0.14% max: 26.67% x̄: 2.77% x̃: 2.13%
      HURT stats (abs)   min: 1.0 max: 8.0 x̄: 1.68 x̃: 1
      HURT stats (rel)   min: 0.35% max: 10.00% x̄: 3.17% x̃: 1.69%
      95% mean confidence interval for quadwords value: -1.89 -1.54
      95% mean confidence interval for quadwords %-change: -1.27% -0.77%
      Quadwords are helped.
      
      total registers in shared programs: 90461 -> 90273 (-0.21%)
      registers in affected programs: 2833 -> 2645 (-6.64%)
      helped: 250
      HURT: 82
      helped stats (abs) min: 1.0 max: 2.0 x̄: 1.08 x̃: 1
      helped stats (rel) min: 6.67% max: 33.33% x̄: 14.06% x̃: 12.50%
      HURT stats (abs)   min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
      HURT stats (rel)   min: 6.67% max: 50.00% x̄: 13.90% x̃: 12.50%
      95% mean confidence interval for registers value: -0.67 -0.47
      95% mean confidence interval for registers %-change: -8.62% -5.69%
      Registers are helped.
      
      total threads in shared programs: 55685 -> 55686 (<.01%)
      threads in affected programs: 76 -> 77 (1.32%)
      helped: 20
      HURT: 17
      helped stats (abs) min: 1.0 max: 2.0 x̄: 1.30 x̃: 1
      helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
      HURT stats (abs)   min: 1.0 max: 2.0 x̄: 1.47 x̃: 1
      HURT stats (rel)   min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
      95% mean confidence interval for threads value: -0.47 0.52
      95% mean confidence interval for threads %-change: 5.81% 56.35%
      Inconclusive result (value mean confidence interval includes 0).
      
      total spills in shared programs: 1387 -> 1379 (-0.58%)
      spills in affected programs: 283 -> 275 (-2.83%)
      helped: 5
      HURT: 1
      
      total fills in shared programs: 5256 -> 5176 (-1.52%)
      fills in affected programs: 557 -> 477 (-14.36%)
      helped: 5
      HURT: 1
      
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@collabora.com>
      Part-of: <!19350>
      23968aee
    • Alyssa Rosenzweig's avatar
      pan/mdg: Use special NIR ops for trig scaling · 10759d17
      Alyssa Rosenzweig authored and Marge Bot's avatar Marge Bot committed
      
      
      Otherwise the lowering is fundamentally unsound due to incorrect constant
      folding, even though it worked by chance with the old pass ordering. We're about
      to change slightly the way we handle fsin/fcos, which was enough to trigger this
      unsoundness.
      
      shader-db results are mostly a toss-up.
      
      total instructions in shared programs: 1520675 -> 1520220 (-0.03%)
      instructions in affected programs: 96841 -> 96386 (-0.47%)
      helped: 397
      HURT: 3
      helped stats (abs) min: 1.0 max: 4.0 x̄: 1.15 x̃: 1
      helped stats (rel) min: 0.22% max: 6.25% x̄: 1.15% x̃: 0.40%
      HURT stats (abs)   min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
      HURT stats (rel)   min: 0.58% max: 2.08% x̄: 1.08% x̃: 0.58%
      95% mean confidence interval for instructions value: -1.19 -1.08
      95% mean confidence interval for instructions %-change: -1.26% -1.01%
      Instructions are helped.
      
      total bundles in shared programs: 650088 -> 649844 (-0.04%)
      bundles in affected programs: 31132 -> 30888 (-0.78%)
      helped: 229
      HURT: 23
      helped stats (abs) min: 1.0 max: 4.0 x̄: 1.21 x̃: 1
      helped stats (rel) min: 0.49% max: 7.14% x̄: 1.28% x̃: 0.71%
      HURT stats (abs)   min: 1.0 max: 3.0 x̄: 1.48 x̃: 1
      HURT stats (rel)   min: 0.83% max: 8.33% x̄: 2.38% x̃: 1.85%
      95% mean confidence interval for bundles value: -1.08 -0.86
      95% mean confidence interval for bundles %-change: -1.15% -0.74%
      Bundles are helped.
      
      total quadwords in shared programs: 1137388 -> 1136767 (-0.05%)
      quadwords in affected programs: 71826 -> 71205 (-0.86%)
      helped: 367
      HURT: 17
      helped stats (abs) min: 1.0 max: 8.0 x̄: 1.80 x̃: 1
      helped stats (rel) min: 0.31% max: 17.24% x̄: 2.27% x̃: 0.96%
      HURT stats (abs)   min: 1.0 max: 6.0 x̄: 2.29 x̃: 2
      HURT stats (rel)   min: 0.44% max: 11.11% x̄: 2.18% x̃: 1.47%
      95% mean confidence interval for quadwords value: -1.76 -1.47
      95% mean confidence interval for quadwords %-change: -2.36% -1.78%
      Quadwords are helped.
      
      total registers in shared programs: 90483 -> 90461 (-0.02%)
      registers in affected programs: 890 -> 868 (-2.47%)
      helped: 67
      HURT: 44
      helped stats (abs) min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
      helped stats (rel) min: 8.33% max: 25.00% x̄: 10.52% x̃: 9.09%
      HURT stats (abs)   min: 1.0 max: 2.0 x̄: 1.02 x̃: 1
      HURT stats (rel)   min: 9.09% max: 50.00% x̄: 31.15% x̃: 33.33%
      95% mean confidence interval for registers value: -0.39 -0.01
      95% mean confidence interval for registers %-change: 1.75% 10.25%
      Inconclusive result (value mean confidence interval and %-change mean confidence interval disagree).
      
      total threads in shared programs: 55694 -> 55685 (-0.02%)
      threads in affected programs: 21 -> 12 (-42.86%)
      helped: 1
      HURT: 5
      helped stats (abs) min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
      helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
      HURT stats (abs)   min: 2.0 max: 2.0 x̄: 2.00 x̃: 2
      HURT stats (rel)   min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
      95% mean confidence interval for threads value: -2.79 -0.21
      95% mean confidence interval for threads %-change: -89.26% 39.26%
      Inconclusive result (%-change mean confidence interval includes 0).
      
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@collabora.com>
      Part-of: <!19350>
      10759d17
    • Alyssa Rosenzweig's avatar
      panfrost: Remove unused debug parameter · 7c7c38b1
      Alyssa Rosenzweig authored and Marge Bot's avatar Marge Bot committed
      
      
      We removed this path.
      
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@collabora.com>
      Part-of: <!20707>
      7c7c38b1
    • Alyssa Rosenzweig's avatar
      panfrost: Remove PAN_MESA_DEBUG=deqp · ea03d065
      Alyssa Rosenzweig authored and Marge Bot's avatar Marge Bot committed
      
      
      Now unused.
      
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@collabora.com>
      Part-of: <!20707>
      ea03d065
    • Alyssa Rosenzweig's avatar
      panfrost: Fix logic ops on Bifrost · 41d99c10
      Alyssa Rosenzweig authored and Marge Bot's avatar Marge Bot committed
      opaque should not be set when logicops are enabled, that needs blending
      even on Bifrost. Fixes is for when I believe the bug became possible to hit.
      The logical error is older.
      
      Fixes Piglit logicop tests again.
      
      Fixes: d849d977
      
       ("panfrost: Avoid blend shader when not blending")
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@collabora.com>
      Part-of: <!20685>
      41d99c10
    • Alyssa Rosenzweig's avatar
      pan/bi: Add a unit test for fsat(reg.yx) · 2f978832
      Alyssa Rosenzweig authored and Marge Bot's avatar Marge Bot committed
      
      
      This would have caught the issue from the previous commit. Split out to make
      backporting the previous change less onerous.
      
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@collabora.com>
      Part-of: <!20683>
      2f978832
    • Alyssa Rosenzweig's avatar
      pan/bi: Fix incorrect compilation of fsat(reg.yx) · ed46c617
      Alyssa Rosenzweig authored and Marge Bot's avatar Marge Bot committed
      Future changes to nir_lower_blend cause fsat(reg.yx) instructions to be
      generated, which correspond to "FCLAMP.v2f16 x.h10" pseudoinstructions. These
      get their swizzles lowered, but we forgot to clear the swizzle out, so we end up
      with extra swap (cancelling out the intended swizzle).
      
      Fix the lowering logic.
      
      Fixes: ac636f5a
      
       ("pan/bi: Use FCLAMP pseudo op for clamp prop")
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@collabora.com>
      Part-of: <!20683>
      ed46c617
  6. 14 Jan, 2023 1 commit
  7. 06 Jan, 2023 1 commit
    • Eric Engestrom's avatar
      meson: add missing dependency · aab4a260
      Eric Engestrom authored and Marge Bot's avatar Marge Bot committed
      Now that renderonly.h includes util/simple_mtx.h, which itself includes
      valgrind.h, dep_valgrind is required by any module that includes
      renderonly.h.
      
          In file included from ../src/gallium/auxiliary/renderonly/renderonly.h:33,
                           from ../src/gallium/winsys/kmsro/drm/kmsro_drm_winsys.c:39:
          ../src/util/simple_mtx.h:34:12: fatal error: valgrind.h: No such file or directory
             34 | #  include <valgrind.h>
                |            ^~~~~~~~~~~~
          compilation terminated.
      
      dep_valgrind is part of idep_mesautil, which should be used instead of
      copying the list of deps for each util header included (which would
      have to be updated every time a util header changes its own includes),
      so let's add idep_mesautil everywhere that includes renderonly.h.
      
      Fixes: ad4d7ca8
      
       ("kmsro: Fix renderonly_scanout BO aliasing")
      Tested-by: Asahi Lina's avatarAsahi Lina <lina@asahilina.net>
      Part-of: <!20530>
      aab4a260
  8. 02 Jan, 2023 3 commits
  9. 28 Dec, 2022 3 commits
  10. 26 Dec, 2022 1 commit
  11. 25 Dec, 2022 1 commit
  12. 24 Dec, 2022 6 commits
  13. 23 Dec, 2022 5 commits
  14. 17 Dec, 2022 1 commit
    • Alyssa Rosenzweig's avatar
      panfrost: Add architecture description XML for v10 · 486c3417
      Alyssa Rosenzweig authored and Marge Bot's avatar Marge Bot committed
      
      
      Add the GenXML hardware description for Mali architecture v10, as implemented in
      Mali-G610. This is not 100% complete but it should be good enough for parity
      with v9.
      
      The XML itself is forked off of v9, with all Job Managerisms replaced with
      CSFisms. This notably includes a large number of new structures defining the
      instructions that run on the Command Execution Unit (CEU).
      
      This is the first step towards supporting Mali-G610 (i.e. RK3588) upstream. Next
      up will be pandecode support.
      
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@collabora.com>
      Part-of: <!20360>
      486c3417
  15. 16 Dec, 2022 6 commits
    • Yonggang Luo's avatar
      panvk: Fixes -Werror,-Wunused-but-set-variable for clang-15 in panvk_descriptor_set.c · 9f5ace98
      Yonggang Luo authored and Marge Bot's avatar Marge Bot committed
      
      
      ../../src/panfrost/vulkan/panvk_descriptor_set.c:67:13: error: variable 'dynoffset_idx' set but not used [-Werror,-Wunused-but-set-variable]
         unsigned dynoffset_idx = 0, img_idx = 0;
                  ^
      
      Signed-off-by: Yonggang Luo's avatarYonggang Luo <luoyonggang@gmail.com>
      Reviewed-by: Jesse Natalie's avatarJesse Natalie <jenatali@microsoft.com>
      Part-of: <mesa/mesa!19875>
      9f5ace98
    • Alyssa Rosenzweig's avatar
      panfrost: Don't use texture format swizzles on v7 · 476be5cb
      Alyssa Rosenzweig authored and Marge Bot's avatar Marge Bot committed
      
      
      They're too restricted for AFBC. Fix up instead. There are two problems at play:
      
      1. We can't just map the format swizzle to the pixel format ordering on v7,
         because the "reordered" values aren't allowed with compression.
      2. We can't just compose the format swizzle with the API swizzle, because the
         composed swizzle is applied to the border colour, so we need to be able to
         apply an inverted swizzle to the border colour. That only works for bijective
         format swizzles.
      
      Fortunately, there's a neat solution: decompose the format's swizzle into two
      swizzles, the first mapping to a reordering that IS allowed for compression, and
      the second a bijection. Then we use the allowed reordering when texturing, apply
      the bijective swizzle to the API swizzle, and apply the inverse of the bijective
      swizzle to the border colour. When we're sampling a border colour, what's now
      happening mathematically is:
      
         (API swizzle o bijective swizzle)((bijective swizzle^-1)(border colour)) =
         (API swizzle o (bijective swizzle o bijective swizzle^-1))(border colour) =
         API swizzle(border colour)
      
      which is exactly what we wanted.
      
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@collabora.com>
      Reviewed-by: Boris Brezillon's avatarBoris Brezillon <boris.brezillon@collabora.com>
      Part-of: <mesa/mesa!20311>
      476be5cb
    • Alyssa Rosenzweig's avatar
      panfrost: Allow swizzled AFBC on v9+ · f159ff53
      Alyssa Rosenzweig authored and Marge Bot's avatar Marge Bot committed
      
      
      On v6 and earlier, the hardware supports arbitrary format swizzles for AFBC, so
      there's no restriction on AFBC. On v8 and newer, the format swizzle gets applied
      to the *decompressed* interchange format, so we can effectively support BGRA of
      AFBC images without any special handling. (Confirmed working on v9. Obviously I
      can't test on v8 but the expression is cleaner if we assume optimistically it's
      like v9. Without hardware, we get to make that assumption :-p)
      
      That just leaves v7 as the only architecture where format swizzles are
      restricted for compression but there are no plane descriptor. Don't apply the
      restriction to the newer parts.
      
      This gets us AFBC of window surfaces on v9+. As the limiting case, fullscreen
      glmark2-es2-wayland -btexture (1080p) in sway on Mali-G57 from 1300fps to
      2353fps.
      
      45% reduction in frame time is nothing to sneeze at.
      
      Achoo.
      
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@collabora.com>
      Reviewed-by: Boris Brezillon's avatarBoris Brezillon <boris.brezillon@collabora.com>
      Part-of: <mesa/mesa!20311>
      f159ff53
    • Alyssa Rosenzweig's avatar
      panfrost: Introduce pan_afbc_mode · cb5e417c
      Alyssa Rosenzweig authored and Marge Bot's avatar Marge Bot committed
      Introduce an enum to represent an AFBC compression mode. These modes are not
      formats, on Valhall they are decoupled from the format. As such, it does not
      make sense to use a pipe_format to represent them. Add an enum that we can use
      in a straightforward way on Midgard and Bifrost to fallback for texture views,
      and can map 1:1 to the Valhall hardware enum.
      
      In addition to being less overloaded semantically, this lets -Wswitch kick in to
      ensure that we handle all enums when translating. The straightforward
      translation raises the following warnings:
      
      ../src/panfrost/lib/pan_cs.c:437:9: warning: enumeration value ‘PAN_AFBC_MODE_R5G5B5A1’ not handled in switch [-Wswitch]
        437 |         switch (panfrost_afbc_format(PAN_ARCH, format)) {
            |         ^~~~~~
      
      ...indicating that some formats were missed, leading to assertion fails "unknown
      canonical AFBC format" when rendering RGB5A1, which dEQP-GLES31 does. Fixes
      regressions in
      dEQP-GLES31.functional.draw_buffers_indexed.random.max_required_draw_buffers.*
      on Valhall.
      
      Given how scarce v9 hardware is, that v10 isn't upstream yet, and the offending
      code was merged a week ago, this should not have actually affected anyone. At
      any rate, it's a good reminder we really do need CI for v9...
      
      Fixes: 8e125b6c
      
       ("panfrost: Enable AFBC of more formats")
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@collabora.com>
      Reviewed-by: Boris Brezillon's avatarBoris Brezillon <boris.brezillon@collabora.com>
      Part-of: <!20311>
      cb5e417c
    • Alyssa Rosenzweig's avatar
      panfrost: Luminance-alpha AFBC unsupported on v7+ · 0784adc6
      Alyssa Rosenzweig authored and Marge Bot's avatar Marge Bot committed
      
      
      The L8_UNORM, A8_UNORM, and L8A8_UNORM v7 formats do not support AFBC,
      regardless of swizzling. We're about to lift the restrictions on swizzling with
      AFBC on v7, so we'll need to handle these cases explicitly to avoid using AFBC
      in these cases.
      
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@collabora.com>
      Reviewed-by: Boris Brezillon's avatarBoris Brezillon <boris.brezillon@collabora.com>
      Part-of: <!20311>
      0784adc6
    • Alyssa Rosenzweig's avatar
      panfrost: Align WSI strides for tiled AFBC · a3f9aa3b
      Alyssa Rosenzweig authored and Marge Bot's avatar Marge Bot committed
      When calculating legacy WSI strides for tiled AFBC, we need to account for the
      greater alignment requirement of tiled AFBC, or importing resources will fail
      later.
      
      Since tiled AFBC is only supported on v7 and later, and AFBC of window surfaces
      isn't being used on Linux on v7 and later, this probably hasn't been hit in
      practice. Probably.
      
      We're about to fix AFBC of window surfaces so we need to fix this side first.
      
      Fixes: 0255f554
      
       ("panfrost: Advertise 16x16 tiled AFBC")
      Signed-off-by: Alyssa Rosenzweig's avatarAlyssa Rosenzweig <alyssa@collabora.com>
      Reviewed-by: Boris Brezillon's avatarBoris Brezillon <boris.brezillon@collabora.com>
      Part-of: <!20311>
      a3f9aa3b