- 22 Jun, 2020 1 commit
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Neil Roberts authored
Adds PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX which is a subset of the primitive restart cap for when the hardware can only support the fixed indices specified in GLES. The switch statements were automatically modified with this command: find \( \( -name \*.cpp -o -name \*.c \) \! -type l \) \ -exec sed -i -r \ 's/^(\s*case\s+PIPE_CAP_PRIMITIVE_RESTART)\s*:.*$/\0\n\1_FIXED_INDEX:/' \ {} \; v2: Add a note in screen.rst Reviewed-by: Eric Anholt <eric@anholt.net> (v1) Reviewed by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <!5559>
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- 02 Jun, 2020 1 commit
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Marek Olšák authored
Reviewed-by:
Rob Clark <robdclark@chromium.org> Part-of: <!5002>
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- 13 May, 2020 1 commit
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Marek Olšák authored
Acked-by:
Eric Anholt <eric@anholt.net> Acked-by:
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Acked-by:
Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <!4902>
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- 05 May, 2020 1 commit
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Pierre-Eric Pelloux-Prayer authored
Allows driver to select a zero init mode between the 3 possible values. Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <!4607>
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- 29 Apr, 2020 1 commit
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Mike Blumenkrantz authored
this adds a new pipe cap that drivers can support which enables passing buffer clears with scissor test enabled through to be handled by the driver instead of having mesa draw a quad also adjust all existing clear() hooks to have the new parameter Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Reviewed-by:
Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by:
Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <!4310>
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- 27 Apr, 2020 2 commits
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Bas Nieuwenhuizen authored
This should prevent horrors like Iris has with the delayed calls to iris_resource_finish_aux_import just because info is not available at allocation time. AFAICT all drivers just copy the template except radeonsi/r600 which reset the next pointer. AFAICT there is also no other place we get a state tracker setting next ptrs on a resource. v2: Updated Gallium docs. Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <!3792>
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Marek Olšák authored
and add radeonsi support. Acked-by:
Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <!4758>
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- 16 Apr, 2020 1 commit
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Ilia Mirkin authored
Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <!4529>
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- 15 Apr, 2020 1 commit
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Karol Herbst authored
v2: split enum in specific caps to abstract the CL enum v3: remove BUFFER_SVM caps Signed-off-by:
Karol Herbst <kherbst@redhat.com> Reviewed-by:
Francisco Jerez <currojerez@riseup.net> Part-of: <!2076>
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- 12 Apr, 2020 1 commit
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Ilia Mirkin authored
Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <!4519>
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- 21 Mar, 2020 1 commit
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Marek Olšák authored
The default is 512 KB, but radeonsi wants 4 MB. Acked-by:
Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Tested-by: Marge Bot <!4154> Part-of: <!4154>
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- 11 Mar, 2020 1 commit
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Marek Olšák authored
Reviewed-by:
Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <!3591>
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- 10 Mar, 2020 1 commit
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Tomeu Vizoso authored
These three caps were missing docs. Signed-off-by:
Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by:
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Tested-by: Marge Bot <!4115> Part-of: <!4115>
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- 24 Feb, 2020 1 commit
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Eric Anholt authored
The deref stuff is hard to handle in a backend supporting dynamic indexing, while the lowering can easily turn that into the same kind of dynamic indexing we do for textures, UBOs, and SSBOs. Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <!3728>
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- 23 Jan, 2020 2 commits
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Ian Romanick authored
Driver supports integer multiplication between a 32-bit integer and a 16-bit integer. If the second operand is 32-bits, the upper 16-bits are ignored, and the low 16-bits are possibly sign extended as necessary. Iris will eventually enable this. Not sure about other drivers. v2: Add default value to u_screen.c. Suggested by Caio. Reviewed-by:
Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <!767>
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Ian Romanick authored
Iris will eventually enable this. Looking at the header files, it looks like Midgard could also enable it. Basically, any GPU that fully supports OpenCL can. v2: Add default value to u_screen.c. Suggested by Caio. Reviewed-by:
Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <!767>
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- 21 Dec, 2019 1 commit
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Christian Gmeiner authored
Add PIPE_CAP_MAX_VERTEX_BUFFERS param, which defaults to 16. Signed-off-by:
Christian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by:
Paul Cercueil <paul@crapouillou.net> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <!2807>
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- 17 Oct, 2019 5 commits
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Erik Faye-Lund authored
Reviewed-by:
Marek Olšák <marek.olsak@amd.com>
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Erik Faye-Lund authored
Reviewed-by:
Marek Olšák <marek.olsak@amd.com>
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Erik Faye-Lund authored
Reviewed-by:
Marek Olšák <marek.olsak@amd.com>
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Erik Faye-Lund authored
Reviewed-by:
Marek Olšák <marek.olsak@amd.com>
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Dave Airlie authored
This allows the driver to request flatshade lowering. (NIR drivers only so far). Reviewed-by:
Marek Olšák <marek.olsak@amd.com>
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- 14 Oct, 2019 1 commit
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James Xiong authored
v2: [ Michel Dänzer ] * Update src/gallium/docs/source/screen.rst accordingly Signed-off-by:
James Xiong <james.xiong@intel.com> Reviewed-by: Michel Dänzer <mdaenzer@redhat.com> # v1 Reviewed-by: Marek Olšák <marek.olsak@amd.com> # v1
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- 11 Oct, 2019 1 commit
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Dave Airlie authored
Accessing the TG4 component via immediates in the llvmpipe backend is quite messy (like really messy). Roland suggested we change the instruction encoding, so introduce a cap to allow the component to be selected to be store in the sampler swizzle, which should be otherwise unused. I could probably switch all drivers over, but virgl would need some work that I'd prefer not to rush it. Signed-off-by:
Dave Airlie <airlied@redhat.com> Reviewed-by:
Roland Scheidegger <sroland@vmware.com>
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- 10 Oct, 2019 1 commit
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Marek Olšák authored
Reviewed-by:
Timothy Arceri <tarceri@itsqueeze.com> Reviewed-by:
Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org>
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- 30 Sep, 2019 1 commit
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Caio Marcelo de Oliveira Filho authored
To enable EXT_demote_to_helper_invocation: This extension adds a "demote" keyword that is similar to "discard" but only suppresses subsequent writes and outputs to the framebuffer, and does not terminate the execution of the invocation. For the remainder of the execution, the invocation is "demoted" to act like a helper invocation. Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org>
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- 18 Sep, 2019 1 commit
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Christian Gmeiner authored
There are GPUs that do not support this feature. This reverts commit e871abe4Signed-off-by:
Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Reviewed-by:
Eric Anholt <eric@anholt.net>
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- 10 Sep, 2019 1 commit
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Caio Marcelo de Oliveira Filho authored
The PIPE_CAP_GL_SPIRV capability enables ARB_gl_spirv and ARB_spirv_extensions, and will make sure the corresponding SPIR-V capabilities and extensions lists are initialized. The additional PIPE_CAP_GL_SPIRV_VARIABLE_POINTERS capability enables the support for Variable Pointers in SPIR-V shaders. This depends on the driver and is not mandatory for ARB_gl_spirv support. v2: Add a PIPE_CAP for Variable Pointers. (Marek) Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> [v1]
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- 05 Sep, 2019 1 commit
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Connor Abbott authored
For radeonsi, we will prefer the NIR pass as it'll generate better code (some index calculation and a single load vs. a load, then index calculation, then another load) and oftentimes NIR optimization can kick in and make all the access indices constant. Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Reviewed-by:
Timothy Arceri <tarceri@itsqueeze.com>
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- 21 Aug, 2019 1 commit
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Ilia Mirkin authored
The compute paths in vl are a bit AMD-specific. For example, they (on nouveau), try to use a BGRX8 image format, which is not supported. Fixing all this is probably possible, but since the compute paths aren't in any way better, it's difficult to care. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111213 Fixes: 9364d66c (gallium/auxiliary/vl: Add video compositor compute shader render) Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by:
Marek Olšák <marek.olsak@amd.com>
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- 06 Aug, 2019 1 commit
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Pierre-Eric Pelloux-Prayer authored
Reviewed-by:
Marek Olšák <marek.olsak@amd.com>
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- 02 Aug, 2019 1 commit
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Kenneth Graunke authored
This exposes the textureSamplesIdenticalEXT function in GLSL. We enable it for iris and radeonsi, because their compilers already have support for this. Tested on Intel Kabylake and AMD Vega 64. Reviewed-by:
Marek Olšák <marek.olsak@amd.com>
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- 01 Aug, 2019 1 commit
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Gert Wollny authored
Use value "2" to signal that lowering is needed and supported and enable it accordingly. v2: - Note in CAP description that this lowering currently requires TGSI - use "true" instead of GL_TRUE (both Erik) Signed-off-by:
Gert Wollny <gert.wollny@collabora.com> Reviewed-by:
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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- 30 Jul, 2019 1 commit
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Sagar Ghuge authored
v2: Line wrap to 80 char (Marek Olsak) Signed-off-by:
Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org>
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- 29 Jul, 2019 1 commit
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Marek Olšák authored
Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
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- 18 Jul, 2019 1 commit
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Andreas Baierl authored
This adds an option to treat gl_PointCoord as a system value. Signed-off-by:
Andreas Baierl <ichgeh@imkreisrum.de> Reviewed-by:
Qiang Yu <yuq825@gmail.com> Reviewed-by:
Eric Anholt <eric@anholt.net>
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- 10 Jul, 2019 4 commits
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Erik Faye-Lund authored
PIPE_CAP_SM3 has always been an odd one out of all our caps. While most other caps are fine-grained and single-purpose, this cap encode several features in one. And since OpenGL cares more about single features, it'd be nice to get rid of this one. As it turns, this is now relatively simple. We only really care about three features using this cap, and those already got their own caps. So we can remove it, and make sure all current drivers just give the same response to all of them. The only place we *really* care about SM3 is in nine, and there we can instead just re-construct the information based on the finer-grained caps. This avoids DX9 semantics from needlessly leaking into all of the drivers, most of who doesn't care a whole lot about DX9 specifically. Signed-off-by:
Erik Faye-Lund <erik.faye-lund@collabora.com> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Acked-by:
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
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Erik Faye-Lund authored
Shader Model 3.0 is a big promise to make to the state-tracker, and for instance mobile hardware might support vertex-shader saturate but not some of the other features of SM3. So let's give this its own cap for simplicity. Signed-off-by:
Erik Faye-Lund <erik.faye-lund@collabora.com> Reviewed-by:
Marek Olšák <marek.olsak@amd.com>
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Erik Faye-Lund authored
Shader Model 3.0 is a big promise to make to the state-tracker, and for instance mobile hardware might support fragment-shader derivatives but not some of the other features of SM3. So let's give this its own cap for simplicity. Signed-off-by:
Erik Faye-Lund <erik.faye-lund@collabora.com> Reviewed-by:
Marek Olšák <marek.olsak@amd.com>
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Erik Faye-Lund authored
Shader Model 3.0 is a big promise to make to the state-tracker, and for instance mobile hardware might support texture lod but not some of the other features of SM3. So let's give this its own cap for simplicity. Signed-off-by:
Erik Faye-Lund <erik.faye-lund@collabora.com> Reviewed-by:
Marek Olšák <marek.olsak@amd.com>
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