1. 22 Jun, 2020 30 commits
    • Neil Roberts's avatar
      gallium: Add pipe cap for primitive restart with fixed index · bb5fc901
      Neil Roberts authored
      Adds PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX which is a subset of the
      primitive restart cap for when the hardware can only support the fixed
      indices specified in GLES.
      
      The switch statements were automatically modified with this command:
      
      find \( \( -name \*.cpp -o -name \*.c \) \! -type l \) \
       -exec sed -i -r \
       's/^(\s*case\s+PIPE_CAP_PRIMITIVE_RESTART)\s*:.*$/\0\n\1_FIXED_INDEX:/' \
       {} \;
      
      v2: Add a note in screen.rst
      
      Reviewed-by: Eric Anholt <eric@anholt.net> (v1)
      Reviewed by: Erik Faye-Lund <erik.faye-lund@collabora.com>
      
      Part-of: <!5559>
      bb5fc901
    • Karol Herbst's avatar
      nv50/ir/ra: fix memory corruption when spilling · bcf6a9ec
      Karol Herbst authored
      When doing RA we end up with adding ValueDef references to Values across
      all over the shader. This is all fine until we remove the Instruction
      defining those Values, which happens when spilling values.
      
      Instead of manipulating the values directly we should just track all
      merged in defs in a seperate structure and remove stale references when
      an instruction gets deleted in the spiller.
      
      fixes following libasan report:
      =================================================================
      ==612087==ERROR: AddressSanitizer: heap-use-after-free on address 0x6150003ea380 at pc 0x7f1d12142fe9 bp 0x7fffca6fd120 sp 0x7fffca6fd110
      READ of size 8 at 0x6150003ea380 thread T0
          #0 0x7f1d12142fe8 in nv50_ir::ValueDef::get() const ../src/gallium/drivers/nouveau/codegen/nv50_ir.h:648
          #1 0x7f1d12143c02 in nv50_ir::Value::getUniqueInsn() const ../src/gallium/drivers/nouveau/codegen/nv50_ir_inlines.h:229
          #2 0x7f1d1221530d in nv50_ir::RegAlloc::BuildIntervalsPass::addLiveRange(nv50_ir::Value*, nv50_ir::BasicBlock const*, int) ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:333
          #3 0x7f1d1221872e in nv50_ir::RegAlloc::BuildIntervalsPass::visit(nv50_ir::BasicBlock*) ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:686
          #4 0x7f1d1215676c in nv50_ir::Pass::doRun(nv50_ir::Function*, bool, bool) ../src/gallium/drivers/nouveau/codegen/nv50_ir_bb.cpp:495
          #5 0x7f1d121563ed in nv50_ir::Pass::run(nv50_ir::Function*, bool, bool) ../src/gallium/drivers/nouveau/codegen/nv50_ir_bb.cpp:477
          #6 0x7f1d122262b8 in nv50_ir::RegAlloc::execFunc() ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:1910
          #7 0x7f1d122256b0 in nv50_ir::RegAlloc::exec() ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:1849
          #8 0x7f1d12226f1e in nv50_ir::Program::registerAllocation() ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:1970
          #9 0x7f1d1214092a in nv50_ir_generate_code ../src/gallium/drivers/nouveau/codegen/nv50_ir.cpp:1275
          #10 0x7f1d1227461b in nvc0_program_translate ../src/gallium/drivers/nouveau/nvc0/nvc0_program.c:634
          #11 0x7f1d12294b21 in nvc0_sp_state_create ../src/gallium/drivers/nouveau/nvc0/nvc0_state.c:620
          #12 0x7f1d12294d90 in nvc0_fp_state_create ../src/gallium/drivers/nouveau/nvc0/nvc0_state.c:661
          #13 0x7f1d12ad4912 in st_create_fp_variant ../src/mesa/state_tracker/st_program.c:1498
          #14 0x7f1d12ad4cd5 in st_get_fp_variant ../src/mesa/state_tracker/st_program.c:1525
          #15 0x7f1d12ad8252 in st_precompile_shader_variant ../src/mesa/state_tracker/st_program.c:2053
          #16 0x7f1d12c9c851 in st_program_string_notify ../src/mesa/state_tracker/st_cb_program.c:185
          #17 0x7f1d12d17731 in st_link_tgsi ../src/mesa/state_tracker/st_glsl_to_tgsi.cpp:7441
          #18 0x7f1d12cabaf0 in st_link_shader ../src/mesa/state_tracker/st_glsl_to_ir.cpp:175
          #19 0x7f1d127c85ca in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3186
          #20 0x7f1d1252a9f7 in link_program ../src/mesa/main/shaderapi.c:1285
          #21 0x7f1d1252a9f7 in link_program_error ../src/mesa/main/shaderapi.c:1384
          #22 0x7f1d1252deb3 in _mesa_LinkProgram ../src/mesa/main/shaderapi.c:1876
          #23 0x403e13 in main._omp_fn.0 /home/kherbst/git/shader-db/run.c:926
          #24 0x7f1d17b8b4b5 in GOMP_parallel (/lib64/libgomp.so.1+0x124b5)
          #25 0x4029e4 in main /home/kherbst/git/shader-db/run.c:765
          #26 0x7f1d179b51a2 in __libc_start_main ../csu/libc-start.c:308
          #27 0x402d1d in _start (/home/kherbst/git/shader-db/run+0x402d1d)
      
      0x6150003ea380 is located 0 bytes inside of 504-byte region [0x6150003ea380,0x6150003ea578)
      freed by thread T0 here:
          #0 0x7f1d17e5d96f in operator delete(void*) (/usr/lib64/libasan.so.5.0.0+0x11096f)
          #1 0x7f1d1214ec0f in __gnu_cxx::new_allocator<nv50_ir::ValueDef>::deallocate(nv50_ir::ValueDef*, unsigned long) /usr/include/c++/9/ext/new_allocator.h:128
          #2 0x7f1d1214dc00 in std::allocator_traits<std::allocator<nv50_ir::ValueDef> >::deallocate(std::allocator<nv50_ir::ValueDef>&, nv50_ir::ValueDef*, unsigned long) /usr/include/c++/9/bits/alloc_traits.h:470
          #3 0x7f1d1214c5fb in std::_Deque_base<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::_M_deallocate_node(nv50_ir::ValueDef*) /usr/include/c++/9/bits/stl_deque.h:624
          #4 0x7f1d121498c4 in std::_Deque_base<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::_M_destroy_nodes(nv50_ir::ValueDef**, nv50_ir::ValueDef**) /usr/include/c++/9/bits/stl_deque.h:758
          #5 0x7f1d1214704d in std::_Deque_base<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::~_Deque_base() /usr/include/c++/9/bits/stl_deque.h:680
          #6 0x7f1d12145371 in std::deque<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::~deque() /usr/include/c++/9/bits/stl_deque.h:1069
          #7 0x7f1d1213bc5b in nv50_ir::Instruction::~Instruction() ../src/gallium/drivers/nouveau/codegen/nv50_ir.cpp:615
          #8 0x7f1d1213fb2f in nv50_ir::Program::releaseInstruction(nv50_ir::Instruction*) ../src/gallium/drivers/nouveau/codegen/nv50_ir.cpp:1148
          #9 0x7f1d122250fb in nv50_ir::SpillCodeInserter::run(std::__cxx11::list<std::pair<nv50_ir::Value*, nv50_ir::Value*>, std::allocator<std::pair<nv50_ir::Value*, nv50_ir::Value*> > > const&) ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:1830
          #10 0x7f1d12221445 in nv50_ir::GCRA::allocateRegisters(nv50_ir::ArrayList&) ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:1541
          #11 0x7f1d122262e9 in nv50_ir::RegAlloc::execFunc() ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:1913
          #12 0x7f1d122256b0 in nv50_ir::RegAlloc::exec() ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:1849
          #13 0x7f1d12226f1e in nv50_ir::Program::registerAllocation() ../src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp:1970
          #14 0x7f1d1214092a in nv50_ir_generate_code ../src/gallium/drivers/nouveau/codegen/nv50_ir.cpp:1275
          #15 0x7f1d1227461b in nvc0_program_translate ../src/gallium/drivers/nouveau/nvc0/nvc0_program.c:634
          #16 0x7f1d12294b21 in nvc0_sp_state_create ../src/gallium/drivers/nouveau/nvc0/nvc0_state.c:620
          #17 0x7f1d12294d90 in nvc0_fp_state_create ../src/gallium/drivers/nouveau/nvc0/nvc0_state.c:661
          #18 0x7f1d12ad4912 in st_create_fp_variant ../src/mesa/state_tracker/st_program.c:1498
          #19 0x7f1d12ad4cd5 in st_get_fp_variant ../src/mesa/state_tracker/st_program.c:1525
          #20 0x7f1d12ad8252 in st_precompile_shader_variant ../src/mesa/state_tracker/st_program.c:2053
          #21 0x7f1d12c9c851 in st_program_string_notify ../src/mesa/state_tracker/st_cb_program.c:185
          #22 0x7f1d12d17731 in st_link_tgsi ../src/mesa/state_tracker/st_glsl_to_tgsi.cpp:7441
          #23 0x7f1d12cabaf0 in st_link_shader ../src/mesa/state_tracker/st_glsl_to_ir.cpp:175
          #24 0x7f1d127c85ca in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3186
          #25 0x7f1d1252a9f7 in link_program ../src/mesa/main/shaderapi.c:1285
          #26 0x7f1d1252a9f7 in link_program_error ../src/mesa/main/shaderapi.c:1384
          #27 0x7f1d1252deb3 in _mesa_LinkProgram ../src/mesa/main/shaderapi.c:1876
          #28 0x403e13 in main._omp_fn.0 /home/kherbst/git/shader-db/run.c:926
      
      previously allocated by thread T0 here:
          #0 0x7f1d17e5c9d7 in operator new(unsigned long) (/usr/lib64/libasan.so.5.0.0+0x10f9d7)
          #1 0x7f1d1215046f in __gnu_cxx::new_allocator<nv50_ir::ValueDef>::allocate(unsigned long, void const*) /usr/include/c++/9/ext/new_allocator.h:114
          #2 0x7f1d1214ebec in std::allocator_traits<std::allocator<nv50_ir::ValueDef> >::allocate(std::allocator<nv50_ir::ValueDef>&, unsigned long) /usr/include/c++/9/bits/alloc_traits.h:444
          #3 0x7f1d1214dbd3 in std::_Deque_base<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::_M_allocate_node() /usr/include/c++/9/bits/stl_deque.h:617
          #4 0x7f1d1214c464 in std::_Deque_base<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::_M_create_nodes(nv50_ir::ValueDef**, nv50_ir::ValueDef**) (/home/kherbst/local/lib64/dri//nouveau_dri.so+0x829464)
          #5 0x7f1d121495cd in std::_Deque_base<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::_M_initialize_map(unsigned long) /usr/include/c++/9/bits/stl_deque.h:716
          #6 0x7f1d12146f7d in std::_Deque_base<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::_Deque_base() /usr/include/c++/9/bits/stl_deque.h:507
          #7 0x7f1d1214518d in std::deque<nv50_ir::ValueDef, std::allocator<nv50_ir::ValueDef> >::deque() /usr/include/c++/9/bits/stl_deque.h:912
          #8 0x7f1d1213b9c9 in nv50_ir::Instruction::Instruction(nv50_ir::Function*, nv50_ir::operation, nv50_ir::DataType) ../src/gallium/drivers/nouveau/codegen/nv50_ir.cpp:605
          #9 0x7f1d1224dd44 in nv50_ir::Function::convertToSSA() ../src/gallium/drivers/nouveau/codegen/nv50_ir_ssa.cpp:385
          #10 0x7f1d1224d381 in nv50_ir::Program::convertToSSA() ../src/gallium/drivers/nouveau/codegen/nv50_ir_ssa.cpp:310
          #11 0x7f1d121407c0 in nv50_ir_generate_code ../src/gallium/drivers/nouveau/codegen/nv50_ir.cpp:1264
          #12 0x7f1d1227461b in nvc0_program_translate ../src/gallium/drivers/nouveau/nvc0/nvc0_program.c:634
          #13 0x7f1d12294b21 in nvc0_sp_state_create ../src/gallium/drivers/nouveau/nvc0/nvc0_state.c:620
          #14 0x7f1d12294d90 in nvc0_fp_state_create ../src/gallium/drivers/nouveau/nvc0/nvc0_state.c:661
          #15 0x7f1d12ad4912 in st_create_fp_variant ../src/mesa/state_tracker/st_program.c:1498
          #16 0x7f1d12ad4cd5 in st_get_fp_variant ../src/mesa/state_tracker/st_program.c:1525
          #17 0x7f1d12ad8252 in st_precompile_shader_variant ../src/mesa/state_tracker/st_program.c:2053
          #18 0x7f1d12c9c851 in st_program_string_notify ../src/mesa/state_tracker/st_cb_program.c:185
          #19 0x7f1d12d17731 in st_link_tgsi ../src/mesa/state_tracker/st_glsl_to_tgsi.cpp:7441
          #20 0x7f1d12cabaf0 in st_link_shader ../src/mesa/state_tracker/st_glsl_to_ir.cpp:175
          #21 0x7f1d127c85ca in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3186
          #22 0x7f1d1252a9f7 in link_program ../src/mesa/main/shaderapi.c:1285
          #23 0x7f1d1252a9f7 in link_program_error ../src/mesa/main/shaderapi.c:1384
          #24 0x7f1d1252deb3 in _mesa_LinkProgram ../src/mesa/main/shaderapi.c:1876
          #25 0x403e13 in main._omp_fn.0 /home/kherbst/git/shader-db/run.c:926
      
      SUMMARY: AddressSanitizer: heap-use-after-free ../src/gallium/drivers/nouveau/codegen/nv50_ir.h:648 in nv50_ir::ValueDef::get() const
      Shadow bytes around the buggy address:
        0x0c2a80075420: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
        0x0c2a80075430: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
        0x0c2a80075440: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
        0x0c2a80075450: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 fa
        0x0c2a80075460: fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa
      =>0x0c2a80075470:[fd]fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd
        0x0c2a80075480: fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd
        0x0c2a80075490: fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd
        0x0c2a800754a0: fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd fa
        0x0c2a800754b0: fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa
        0x0c2a800754c0: fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd
      Shadow byte legend (one shadow byte represents 8 application bytes):
        Addressable:           00
        Partially addressable: 01 02 03 04 05 06 07
        Heap left redzone:       fa
        Freed heap region:       fd
        Stack left redzone:      f1
        Stack mid redzone:       f2
        Stack right redzone:     f3
        Stack after return:      f5
        Stack use after scope:   f8
        Global redzone:          f9
        Global init order:       f6
        Poisoned by user:        f7
        Container overflow:      fc
        Array cookie:            ac
        Intra object redzone:    bb
        ASan internal:           fe
        Left alloca redzone:     ca
        Right alloca redzone:    cb
        Shadow gap:              cc
      ==612087==ABORTING
      
      v2: full rework
      v3: manage a full copy instead of recreating new lists on every access
      
      Closes: #3066Signed-off-by: Karol Herbst's avatarKarol Herbst <kherbst@redhat.com>
      Part-of: <!5277>
      bcf6a9ec
    • Karol Herbst's avatar
      nv50/ir/ra: convert some for loops to Range-based for loops · b8c77d47
      Karol Herbst authored
      I will touch them in the next commit
      Signed-off-by: Karol Herbst's avatarKarol Herbst <kherbst@redhat.com>
      Part-of: <!5277>
      b8c77d47
    • Icecream95's avatar
      panfrost: Copy resources when mapping to avoid waiting for readers · 361fb386
      Icecream95 authored
      It is often faster to copy the whole resource and modify that than
      to flush and wait for readers of the BO.
      
      Helps anything which updates textures after already using them in a
      frame, such as most GLQuake ports.
      Reviewed-by: default avatarTomeu Vizoso <tomeu.vizoso@collabora.com>
      Part-of: <!5573>
      361fb386
    • Icecream95's avatar
      panfrost: Update sampler views when the texture bo changes · 65b3b08a
      Icecream95 authored
      The BO reallocation path in panfrost_transfer_map caused textures and
      sampler views to get out of sync.
      
      v2: Use the GPU address of the BO in case two BOs get allocated at the
          same address.
      Reviewed-by: default avatarTomeu Vizoso <tomeu.vizoso@collabora.com>
      Part-of: <!5573>
      65b3b08a
    • Icecream95's avatar
      panfrost: RGBA4 and RGB5_A1 framebuffer support · 96300120
      Icecream95 authored
      Tested with fbo_firecube.
      Reviewed-by: default avatarTomeu Vizoso <tomeu.vizoso@collabora.com>
      Part-of: <!5573>
      96300120
    • Icecream95's avatar
      b96d4449
    • Icecream95's avatar
      pan/decode: Add missing wrap modes · 5b351c80
      Icecream95 authored
      Reviewed-by: default avatarTomeu Vizoso <tomeu.vizoso@collabora.com>
      Part-of: <!5573>
      5b351c80
    • Icecream95's avatar
      pan/decode: Fix helper invocations when tracing · e219f045
      Icecream95 authored
      midgard1.flags_lo was being changed when tracing, causing helper
      invocations to be disabled.
      
      This was found by using mprotect to make BOs read only in
      pandecode_fetch_gpu_mem.
      Reviewed-by: default avatarTomeu Vizoso <tomeu.vizoso@collabora.com>
      Part-of: <!5573>
      e219f045
    • Gert Wollny's avatar
      r600/sfn: Don't set num_components on TESS sysvalue intrinsics · 97318994
      Gert Wollny authored
      These instructions are not vectorized, and validation rules added for
      this with 167fa288
          nir/validate: validate intr->num_components
      
      Fixes: 46a3033b
          r600/sfn: Emit some LDS instructions
      Signed-off-by: Gert Wollny's avatarGert Wollny <gert.wollny@collabora.com>
      Part-of: <!5575>
      97318994
    • Gert Wollny's avatar
      r600/sfn: Add support for shared atomics · 43c23ba9
      Gert Wollny authored
      Signed-off-by: Gert Wollny's avatarGert Wollny <gert.wollny@collabora.com>
      Part-of: <!5575>
      43c23ba9
    • Gert Wollny's avatar
      r600/sfn: Add lowering pass for shared IO · 033968a9
      Gert Wollny authored
      Lower shared load and store to use the r600 specific intrinsics.
      Signed-off-by: Gert Wollny's avatarGert Wollny <gert.wollny@collabora.com>
      Part-of: <!5575>
      033968a9
    • Karol Herbst's avatar
      nv50/ir/nir: rework CFG handling · 14591a45
      Karol Herbst authored
      Remove all convergency handling as it was broken and get the code to be a
      bit closer to TGSI. Also removes pointless asserts.
      Signed-off-by: Karol Herbst's avatarKarol Herbst <kherbst@redhat.com>
      Tested-by: default avatarBen Skeggs <bskeggs@redhat.com>
      Part-of: <!5512>
      14591a45
    • Karol Herbst's avatar
      nv50/ir/nir: rework input output handling · 8af22703
      Karol Herbst authored
      New code is a bit more structurized and fixes a bunch of int64 and double
      fails. Also disables lower_to_scalar which gives us nice vectorized inputs
      and outputs.
      Signed-off-by: Karol Herbst's avatarKarol Herbst <kherbst@redhat.com>
      Tested-by: default avatarBen Skeggs <bskeggs@redhat.com>
      Part-of: <!5512>
      8af22703
    • Karol Herbst's avatar
      c31d7119
    • Karol Herbst's avatar
      636cf22a
    • Karol Herbst's avatar
      nvc0: enable spirv caps with nir · cc71fccb
      Karol Herbst authored
      This enables the SPIR-V GL extensions moving us a step closer to GL 4.6.
      Signed-off-by: Karol Herbst's avatarKarol Herbst <kherbst@redhat.com>
      Tested-by: default avatarBen Skeggs <bskeggs@redhat.com>
      Part-of: <!5512>
      cc71fccb
    • Karol Herbst's avatar
      nv50/ir/nir: fix nv_viewport_array2 · e4766298
      Karol Herbst authored
      Signed-off-by: Karol Herbst's avatarKarol Herbst <kherbst@redhat.com>
      Tested-by: default avatarBen Skeggs <bskeggs@redhat.com>
      Part-of: <!5512>
      e4766298
    • Karol Herbst's avatar
      nv50/ir/nir: fix ext_demote_to_helper_invocation · 984e930b
      Karol Herbst authored
      Signed-off-by: Karol Herbst's avatarKarol Herbst <kherbst@redhat.com>
      Tested-by: default avatarBen Skeggs <bskeggs@redhat.com>
      Part-of: <!5512>
      984e930b
    • Karol Herbst's avatar
      nv50/ir/print: add missing VIEWPORT_MASK handling · b78c3375
      Karol Herbst authored
      Also add an STATIC_ASSERT so we catch those issues automatically.
      Signed-off-by: Karol Herbst's avatarKarol Herbst <kherbst@redhat.com>
      Reviewed-by: Ilia Mirkin's avatarIlia Mirkin <imirkin@alum.mit.edu>
      Part-of: <!5512>
      b78c3375
    • Karol Herbst's avatar
      nv50/ir/nir: add workaround for double vertex attribs · aecca24d
      Karol Herbst authored
      Gallium adjusts the vertrix attrib types for doubles, but can run out of
      bounds this way. As the slot is counted from 0 anyway, just fix it.
      Signed-off-by: Karol Herbst's avatarKarol Herbst <kherbst@redhat.com>
      Tested-by: default avatarBen Skeggs <bskeggs@redhat.com>
      Part-of: <!5512>
      aecca24d
    • Samuel Pitoiset's avatar
      aco: improve validation checks for readlane/writelane · 83d2a73b
      Samuel Pitoiset authored
      This allows literals for the lane select on GFX10+. The doc says
      that is should be a SGPR or a constant but VOP3 on GFX10+ allows
      literals.
      
      Some later validation code checks if literals are allowed anyways.
      Signed-off-by: Samuel Pitoiset's avatarSamuel Pitoiset <samuel.pitoiset@gmail.com>
      Reviewed-by: Daniel Schürmann's avatarDaniel Schürmann <daniel@schuermann.dev>
      Part-of: <!5010>
      83d2a73b
    • Daniel Schürmann's avatar
      radv/aco: implement logic64 instead of lowering · f03a5f6c
      Daniel Schürmann authored
      to make use of the scalar ALU
      Reviewed-by: Rhys Perry's avatarRhys Perry <pendingchaos02@gmail.com>
      Part-of: <!5527>
      f03a5f6c
    • Rhys Perry's avatar
      nir: slight correction to cube_face_coord constant folding · 9a389322
      Rhys Perry authored
      ACO does the division with a rcp and then a multiplication.
      Signed-off-by: Rhys Perry's avatarRhys Perry <pendingchaos02@gmail.com>
      Reviewed-by: Jason Ekstrand's avatarJason Ekstrand <jason@jlekstrand.net>
      Part-of: <!5547>
      9a389322
    • Samuel Pitoiset's avatar
      aco: fix printing ASM on GFX6-7 if clrxdisasm is not found · c95d258d
      Samuel Pitoiset authored
      Fixes some dEQP-VK.pipeline.executable_properties.* which expect
      a valid string to be returned.
      Signed-off-by: Samuel Pitoiset's avatarSamuel Pitoiset <samuel.pitoiset@gmail.com>
      Reviewed-by: Daniel Schürmann's avatarDaniel Schürmann <daniel@schuermann.dev>
      Part-of: <!5560>
      c95d258d
    • Neil Roberts's avatar
      v3d: Let scheduler know GS doesn’t have shared I/O memory · 053df9bd
      Neil Roberts authored
      Unlike the vertex shaders, the memory for inputs and outputs is stored
      in separate segments so the scheduler doesn’t need to serialise them.
      Reviewed-by: Eric Anholt's avatarEric Anholt <eric@anholt.net>
      Reviewed-by: Iago Toral's avatarIago Toral Quiroga <itoral@igalia.com>
      Part-of: <!5561>
      053df9bd
    • Neil Roberts's avatar
      nir/scheduler: Add an option to specify what stages share memory for I/O · ed29b576
      Neil Roberts authored
      The scheduler has code to handle hardware that shares the same memory
      for inputs and outputs. Seeing as the specific stages that need this is
      probably hardware-dependent, this patch makes it a configurable option
      instead of hard-coding it to everything but fragment shaders.
      Reviewed-by: Eric Anholt's avatarEric Anholt <eric@anholt.net>
      Reviewed-by: Iago Toral's avatarIago Toral Quiroga <itoral@igalia.com>
      Part-of: <!5561>
      ed29b576
    • Neil Roberts's avatar
      nir/schedule: Store a pointer to the scoreboard in nir_deps_state · 28e32099
      Neil Roberts authored
      nir_deps_state is a struct used as a closure for calculating the
      dependencies. Previously it had two fields copied out of the scoreboard.
      The closure is initialised in two seperate places. In order to make it
      easier to access other members of the scoreboard in the callbacks in
      later patches, the closure now just contains a pointer to the scoreboard
      and the two bits of copied information are removed.
      Reviewed-by: Eric Anholt's avatarEric Anholt <eric@anholt.net>
      Reviewed-by: Iago Toral's avatarIago Toral Quiroga <itoral@igalia.com>
      Part-of: <!5561>
      28e32099
    • Neil Roberts's avatar
      v3d: Remove unused member of v3d_compile · 0a18c935
      Neil Roberts authored
      It looks like gs_input_sizes was added when GS shaders were implemented
      but it was never used anywhere.
      Reviewed-by: Eric Anholt's avatarEric Anholt <eric@anholt.net>
      Reviewed-by: Iago Toral's avatarIago Toral Quiroga <itoral@igalia.com>
      Part-of: <!5561>
      0a18c935
    • Neil Roberts's avatar
      nir/scheduler: Handle nir_intrinsic_load_per_vertex_input · df8dc30c
      Neil Roberts authored
      load_per_vertex_input should probably be handled in the same way as a
      regular load_input. I think the nir_schedule pass was written before V3D
      had geometry shader support, so that is probably why it hasn’t taken
      this into account until now.
      Reviewed-by: Eric Anholt's avatarEric Anholt <eric@anholt.net>
      Reviewed-by: Iago Toral's avatarIago Toral Quiroga <itoral@igalia.com>
      Part-of: <!5561>
      df8dc30c
  2. 21 Jun, 2020 9 commits
  3. 20 Jun, 2020 1 commit