- 21 Jul, 2020 28 commits
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Connor Abbott authored
Part-of: <!5950>
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Connor Abbott authored
Part-of: <!5950>
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Connor Abbott authored
This should be much better than the previous method that was more guesswork-based than anything else. It returns a value within 1 of the blob for every input value I've tested, and it seems like it returns slightly better (but still legal) answers when it differs. Part-of: <!5950>
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Alyssa Rosenzweig authored
Signed-off-by:
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by:
Boris Brezillon <boris.brezillon@collabora.com> Part-of: <!5995>
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Alyssa Rosenzweig authored
Signed-off-by:
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by:
Boris Brezillon <boris.brezillon@collabora.com> Part-of: <!5995>
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Alyssa Rosenzweig authored
For implementing panfrost_flush, it suffices to wait on only a single syncobj, not an entire array of them. This lets us wait on it directly, without coercing to/from syncfds in the middle (although some complexity may be added later to support Android winsys). Further, we should let the fence own the syncobj, tying together the lifetimes and thus removing the connection between syncobjs and batch_fence. Signed-off-by:
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by:
Boris Brezillon <boris.brezillon@collabora.com> Part-of: <!5995>
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Alyssa Rosenzweig authored
With the current kernel UABI, there is no benefit to explicitly specifiying dependencies, since the kernel by design adds implicit dependencies to any referenced BOs. This is something we'd like to address in the future, but efficient handling with future kernels will require a tweaked design in userspace as well. So let's do the obvious thing now, and extend later. Signed-off-by:
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by:
Boris Brezillon <boris.brezillon@collabora.com> Part-of: <!5995>
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Alyssa Rosenzweig authored
It is always false now. Signed-off-by:
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by:
Boris Brezillon <boris.brezillon@collabora.com> Part-of: <!5995>
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Alyssa Rosenzweig authored
What is intended is to flush the batches and wait on a particular BO at a later time. Explicitly forcing a wait immediately is redundant. Signed-off-by:
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by:
Boris Brezillon <boris.brezillon@collabora.com> Part-of: <!5995>
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Rhys Perry authored
Fixes lots of tests under dEQP-VK.spirv_assembly.type.* Signed-off-by:
Rhys Perry <pendingchaos02@gmail.com> Reviewed-by:
Daniel Schürmann <daniel@schuermann.dev> Part-of: <!5993>
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Karol Herbst authored
Fixes: random KHR-GL45.sample_variables.mask.* fails Fixes: 66ed9792 ("nv50: Clear nv50_ir_prog_info of dead and codegen specific variables") Signed-off-by:
Karol Herbst <kherbst@redhat.com> Part-of: <!6001>
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Karol Herbst authored
Fixes: 66ed9792 ("nv50: Clear nv50_ir_prog_info of dead and codegen specific variables") Signed-off-by:
Karol Herbst <kherbst@redhat.com> Part-of: <!6001>
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Samuel Pitoiset authored
AMDGPU_GEM_CREATE_CPU_GTT_USWC should be faster when CPU reads are unexpected (because they aren't cached). Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <!5978>
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Samuel Pitoiset authored
To disable CPU caching. Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <!5978>
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Rhys Perry authored
Detroit: Become Human uses dFdx/dFdy immediately after a quad-divergent discard, which can cause the image to become white. Signed-off-by:
Rhys Perry <pendingchaos02@gmail.com> Reviewed-by:
Daniel Schürmann <daniel@schuermann.dev> Reviewed-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Cc: <mesa-stable@lists.freedesktop.org> Closes: #3212 Part-of: <!5991>
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Rhys Perry authored
bounds_ctrl is set to true by default which works around some game bugs, but that isn't enough on GFX10. Signed-off-by:
Rhys Perry <pendingchaos02@gmail.com> Reviewed-by:
Daniel Schürmann <daniel@schuermann.dev> Reviewed-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <!5991>
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Emma Anholt authored
We don't want these files shared between builds (it'll get blown away by the next rsync), and NFS will just increase our latency for hitting the cache. Drops a630 gles31 run from 11-17 minutes to 5.5. Maximum cache size on a run I've seen is 153M, which it seems we can easily spare. Fixes: f97acb4b ("freedreno/ir3: disk-cache support") Reviewed-by:
Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by:
Rob Clark <robdclark@chromium.org> Part-of: <!5998>
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Tomeu Vizoso authored
They were still depending on arm_build, but the build of kernel and rootfs has been moved to a separate job. Signed-off-by:
Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by:
Daniel Stone <daniels@collabora.com> Reviewed-By:
Rohan Garg <rohan.garg@collabora.com> Part-of: <!5472>
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Tomeu Vizoso authored
Upload failed images and the results.yml file to MinIO, to facilitate debugging. Also, fix version checking when git is installed as Mesa is going to output a different renderer string if git is installed. Signed-off-by:
Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by:
Daniel Stone <daniels@collabora.com> Reviewed-By:
Rohan Garg <rohan.garg@collabora.com> Part-of: <!5472>
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Tomeu Vizoso authored
Downloading the traces directly from git causes very high egress from GCE, which is expensive. So we can expand trace testing further, we are going to keep a cache in freedesktop.org's MinIO instance. This commit implements downloading from it. Signed-off-by:
Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by:
Daniel Stone <daniels@collabora.com> Reviewed-By:
Rohan Garg <rohan.garg@collabora.com> Part-of: <!5472>
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Rohan Garg authored
Submit lava jobs to replay traces on Veyron (Mali T760) and Kevin (Mali T860) boards. Signed-off-by:
Rohan Garg <rohan.garg@collabora.com> Signed-off-by:
Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by:
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by:
Daniel Stone <daniels@collabora.com> Reviewed-By:
Rohan Garg <rohan.garg@collabora.com> Part-of: <!5472>
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Kenneth Graunke authored
The intention here was to check "Would the GPU be able to compress this if we used the PBO-based texture upload path?" Prior to Gen12, that meant checking for CCS_E. On Gen12, there are a lot more types of compression, and basic CCS_E was replaced by GEN12_CCS_E, making this check simply not work, so we'd take the CPU path instead. Instead, check if it has CCS, and isn't the basic "fast clear" CCS_D. Fixes: 39f06e28 ("iris: Implement pipe->texture_subdata directly") Tested-by:
Mark Janes <mark.a.janes@intel.com> Reviewed-by:
Tapani Pälli <tapani.palli@intel.com> Reviewed-by:
Jordan Justen <jordan.l.justen@intel.com> Part-of: <!6005>
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Rhys Perry authored
Fixes an issue with Renderdoc's shader debugging with ACO. If nir_opt_algebraic isn't called in-between nir_lower_explicit_io and nir_lower_int64, we can end up with 64-bit multiplications. Signed-off-by:
Rhys Perry <pendingchaos02@gmail.com> Reviewed-by:
Daniel Schürmann <daniel@schuermann.dev> Fixes: 6320e37d ('nir: add amul instruction') Part-of: <!5709>
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Faith Ekstrand authored
We already have all of the shader code for load/store/exchange. Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <!5992>
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Faith Ekstrand authored
Fixes: e644ed46 "intel/fs: Implement nir_intrinsic_global_atomic_*" Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <!5992>
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Faith Ekstrand authored
Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <!5992>
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Faith Ekstrand authored
This pulls in commit 63cb1fc131573fa from KhronosGroup/SPIRV-Headers Acked-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <!5992>
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Eric Engestrom authored
_EGLDriver was an empty wrapper around _EGLAPI, so let's only keep one of them. "driver" represents better what's being accessed, so that's the one we're keeping. Signed-off-by:
Eric Engestrom <eric@engestrom.ch> Reviewed-by:
Eric Anholt <eric@anholt.net> Part-of: <!5987>
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- 20 Jul, 2020 12 commits
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Bas Nieuwenhuizen authored
Otherwise most counters return 0. Should be much more user friendly than having to totally disable clock-gating on the kernel cmdline. Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <!5972>
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Bas Nieuwenhuizen authored
Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <!5972>
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Faith Ekstrand authored
We already support a superset of VK_EXT_image_robustness via VK_EXT_robustness2. Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <!5985>
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Emma Anholt authored
It triggers the disk cache for me, and asserts abount not getting the build id right. Fixes: f97acb4b ("freedreno/ir3: disk-cache support") Part-of: <!5989>
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Samuel Pitoiset authored
All new dEQP-VK.robustness.image_robustness.* pass. Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <!5979>
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Christian Gmeiner authored
Closes: #2655 Signed-off-by:
Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by:
Eric Anholt <eric@anholt.net> Part-of: <!5661>
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Yevhenii Kolesnikov authored
According to the "Errors" list of the OpenGL 4.6 spec, section 8.6 "Alternate Texture Image Specification Commands": An INVALID_OPERATION error is generated by *TextureSubImage* if the effective target of texture does not match the command, as shown in table 8.15. Signed-off-by:
Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <!5934>
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Emma Anholt authored
I had a stp testcase that was getting its offset wrong, and by twiddling bits and feeding it to qc disasm, I found that the comment was sort of right: some the cat6a bits implicated in the old comment do get used, as the high bits of the cat6c offset. Reallocating those bits also fixes how we were getting r960.y for r0.y. Part-of: <!5815>
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Emma Anholt authored
We didn't need the extra branch and temp, we can move it inside of the dst handling by just duplicating the print of the dst reg. Part-of: <!5815>
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Emma Anholt authored
This started with making note of some ldp/stp instructions from the blob and how we differ from them. In the process of fixing it, I accidentally modified behavior of other opcodes, and the other instructions listed will keep us from doing that. I also dropped an old stl test that looks like I took from after a shader 'end' instruction. Part-of: <!5815>
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Emma Anholt authored
Part-of: <!5815>
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Faith Ekstrand authored
Acked-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by:
Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <!5983>
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