1. 17 May, 2012 22 commits
  2. 16 May, 2012 8 commits
  3. 15 May, 2012 10 commits
    • Homer Hsing's avatar
    • Jose Fonseca's avatar
    • Paul Berry's avatar
      i965/blorp: Move exec() out of brw_blorp_params. · 6335e0b0
      Paul Berry authored
      No functional change.  This patch replaces the
      brw_blorp_params::exec() method with a global function
      brw_blorp_exec() that performs the operation described by the params
      data structure.
      Reviewed-by: Kenneth Graunke's avatarKenneth Graunke <kenneth@whitecape.org>
      6335e0b0
    • Paul Berry's avatar
      i965/gen6: Initial implementation of MSAA. · 19e9b246
      Paul Berry authored
      This patch enables MSAA for Gen6, by modifying intel_mipmap_tree to
      understand multisampled buffers, adapting the rendering pipeline setup
      to enable multisampled rendering, and adding multisample resolve
      operations to brw_blorp_blit.cpp. Some preparation work is also
      included for Gen7, but it is not yet enabled.
      
      MSAA support is still fairly preliminary.  In particular, the
      following are not yet supported:
      - Fully general blits between MSAA and non-MSAA buffers.
      - Formats other than RGBA8, DEPTH24, and STENCIL8.
      - Centroid interpolation.
      - Coverage parameters (glSampleCoverage, GL_SAMPLE_ALPHA_TO_COVERAGE,
        GL_SAMPLE_ALPHA_TO_ONE, GL_SAMPLE_COVERAGE, GL_SAMPLE_COVERAGE_VALUE,
        GL_SAMPLE_COVERAGE_INVERT).
      
      Fixes piglit tests "EXT_framebuffer_multisample/accuracy" on
      i965/Gen6.
      
      v2:
      - In intel_alloc_renderbuffer_storage(), quantize the requested number
        of samples to the next higher sample count supported by the
        hardware.  This ensures that a query of GL_SAMPLES will return the
        correct value.  It also ensures that MSAA is fully disabled on Gen7
        for now (since Gen7 MSAA support doesn't work yet).
      - When reading from a non-MSAA surface, ensure that s_is_zero is true
        so that we won't try to read from a nonexistent sample.
      19e9b246
    • Paul Berry's avatar
      i965/gen6+: Add code to perform blits on the render path ("blorp"). · 506d70be
      Paul Berry authored
      This patch expands the "blorp" component to be able to perform blits
      as well as HiZ resolves.  The new blitting code is located in
      brw_blorp_blit.cpp.  This includes the necessary fragment shader code
      to look up pixels in the source buffer (which is configured as a
      texture) and output them to the destination buffer (which is
      configured as the render target).
      
      Most of the time the fragment shader code is simple and
      straightforward, since it merely has to apply a coordinate offset,
      read from the texture, and write to the render target.  However, in
      the case of blitting stencil buffers, things are more complicated,
      since the GPU stores stencil data using W tiling, and W tiling is not
      supported for textures or render targets.  So, we set up the stencil
      buffers as Y tiled, and emit fragment shader code that adjusts the
      coordinates to account for the difference between W and Y tiling.
      Furthermore, since a rectangular region in W tiling does not
      necessarily correspond to a rectangular region in Y tiling, we widen
      the rectangle primitive to the nearest tile boundary and have the
      fragment shader "kill" any pixels that don't fall inside the actual
      desired destination rectangle.
      
      All of this is a necessary prerequisite for implementing MSAA, since
      we'll need to be able to blit between multisample color, depth, and
      stencil buffers and their non-multisampled counterparts, and none of
      the existing blitting mechanisms support multisampling.
      
      In addition, the new blitting code should speed up operations where we
      previously fell back to software rasterization, such as blitting of
      stencil buffers.  The current fallback sequence is: first we try to do
      a blit using the hardware blitting engine.  If that fails we try to do
      a blit using the render path.  If that also fails then we do the blit
      using a meta-op (which may or may not fall back to software
      rasterization).
      
      Note that blitting using the render path has some limitations at the
      moment: it only supports a few formats, and it doesn't support
      clipping or scissoring.  These limitations will be addressed in future
      patch series.
      
      v2:
      - Add the code that configures the WM program to
        gen{6,7}_emit_wm_config() and gen7_emit_ps_config() rather than
        creating separate ...enable() functions.
      - Call intel_prepare_render before determining which miptrees we are
        blitting from/to, because it may cause miptrees to be reallocated.
      - Allow the blit to mirror X and/or Y coordinates.
      - Disable blorp blits on Gen7 for now, since they aren't working yet.
      506d70be
    • Paul Berry's avatar
      i965: Expose surface setup internals for use by blits. · 36e34134
      Paul Berry authored
      This patch exposes the functions brw_get_surface_tiling_bits and
      gen7_set_surface_tiling, so that they can be re-used when setting up
      surface states in gen6_blorp.cpp and gen7_blorp.cpp.
      Reviewed-by: default avatarChad Versace <chad.versace@linux.intel.com>
      36e34134
    • Paul Berry's avatar
      i965: split gen{6,7}_blorp_exec functions into manageable chunks. · 586b3894
      Paul Berry authored
      This patch splits up the gen6_blorp_exec and gen7_blorp_exec
      functions, which were very long, into simple component functions.
      With a few exceptions, there is one function per state packet.
      
      This will allow blit functionality to be added without significantly
      complicating the code.
      Reviewed-by: default avatarChad Versace <chad.versace@linux.intel.com>
      
      v2: Rename the functions gen{6,7}_emit_wm_disable() to
      gen{6,7}_emit_wm_config() (since the WM is not actually disabled
      during HiZ ops; it simply doesn't have a program).  Also, on gen7,
      split out the configration of 3DSTATE_PS to a separate function
      gen7_emit_ps_config().
      586b3894
    • Paul Berry's avatar
      i965: Parameterize HiZ code to prepare for adding blitting. · 2c5510b7
      Paul Berry authored
      This patch groups together the parameters used by the HiZ functions
      into a new data structure, brw_hiz_resolve_params, rather than passing
      each parameter individually between the HiZ functions.  This data
      structure is a subclass of brw_blorp_params, which represents the
      parameters of a general-purpose blit or resolve operation.  A future
      patch will add another subclass for blits.
      
      In addition, this patch generalizes the (width, height) parameters to
      a full rect (x0, y0, x1, y1), since blitting operations will need to
      be able to operate on arbitrary rectangles.  Also, it renames several
      of the HiZ functions to reflect the expanded role they will serve.
      
      v2: Rename brw_hiz_resolve_params to brw_hiz_op_params.  Move
      gen{6,7}_blorp_exec() functions back into gen{6,7}_blorp.h.
      Reviewed-by: default avatarChad Versace <chad.versace@linux.intel.com>
      2c5510b7
    • Kenneth Graunke's avatar
      i965: Implement guardband clipping on Ivybridge. · 610910a6
      Kenneth Graunke authored
      Improves performance in Citybench:
      - 320x240: 9.19589% +/- 0.557621%
      - 1280x480: 3.90797% +/- 0.774429%
      
      No apparent difference in OpenArena.
      Signed-off-by: Kenneth Graunke's avatarKenneth Graunke <kenneth@whitecape.org>
      Reviewed-by: Eric Anholt's avatarEric Anholt <eric@anholt.net>
      610910a6
    • Kenneth Graunke's avatar
      i965: Implement guardband clipping on Sandybridge. · 85cd3040
      Kenneth Graunke authored
      Improves performance in Citybench:
      - 320x240:  19.8008% +/- 0.937818%
      - 1280x480: 6.53856% +/- 0.859083%
      
      No apparent difference in OpenArena nor Xonotic.
      Signed-off-by: Kenneth Graunke's avatarKenneth Graunke <kenneth@whitecape.org>
      Reviewed-by: Eric Anholt's avatarEric Anholt <eric@anholt.net>
      85cd3040