- 04 Sep, 2019 40 commits
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It's only correct when 'a' is an integral greater or equal to 0. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111493 Fixes: 5544b2cb ("nir/algebraic: Use value range analysis to eliminate useless unary ops") Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by:
Ian Romanick <ian.d.romanick@intel.com> (cherry picked from commit 966a455b) (conflicts resolved by Dylan Baker)
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Dylan Baker authored
This was taken from 636da124, and is needed by the next patch.
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When run in optirun, applications that linked to `libGLX.so` and then proceeded to querying Mesa for extension strings caused a SEGV in Mesa. `glXQueryExtensionsString` was calling a chain of functions that eventually led to `__glXQueryServerString`. This function would call `xcb_glx_query_server_string` then `xcb_glx_query_server_string_reply`. The latter for some unknown reason returned `NULL`. Passing this `NULL` to `xcb_glx_query_server_string_string_length` would cause a SEGV as the function tried to dereference it. The reason behind the function returning `NULL` is yet to be determined, however, simply checking that the ptr is not `NULL` resolves this. A similar check has been added to `__glXGetString` for completeness sake, although not immediately necessary. In addition to that, we stumbled into a similar problem in `AllocAndFetchScreenConfigs` which tries to access the configs to free them if `__glXQueryServerString` fails. This, of course, SEGVs, because the configs are yet to have been allocated. Simply continuing past the configs if their config ptrs are `NULL` resolves this. We also switch to `calloc` to make sure that the config ptrs are `NULL` by default, and not some uninitialized value. Cc: mesa-stable@lists.freedesktop.org Fixes: 24b8a8cf "glx: implement __glXGetString, hide __glXGetStringFromServer" Fixes: cb3610e3 "Import the GLX client side library, formerly from xc/lib/GL/glx. Build it " Reviewed-by:
Adam Jackson <ajax@redhat.com> Signed-off-by:
Hal Gentz <zegentzy@protonmail.com>
(cherry picked from commit 1591d1fe) -
We were only handling the modifiers case and not counting the number of planes in actual planar images. Fixes Piglit's ext_image_dma_buf_import-export. Fixes: fc12fd05 ("iris: Implement pipe_screen::resource_get_param") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111509 Reviewed-by:
Jordan Justen <jordan.l.justen@intel.com> (cherry picked from commit f8887909)
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Fixes: 2cf59861 ("nir: Add partial redundancy elimination for compares") Signed-off-by:
Eric Engestrom <eric.engestrom@intel.com> Reviewed-by:
Timothy Arceri <tarceri@itsqueeze.com> Reviewed-by:
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Fixes: 494ecef6 ("freedreno: Add support for drm-shim.") Signed-off-by:
Eric Anholt <eric@anholt.net> (cherry picked from commit c4969b0a)
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Fixes: 9775894f ("anv: Move size check from anv_bo_cache_import() to caller (v2)") Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 7abf65ae) -
Fixes: 955c63d3 ("util/os_file: resize buffer to what was actually needed") Signed-off-by:
Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 1667360f) -
Fixes: cb0980e6 ("egl: move alloc & init out of _eglBuiltInDriver{DRI2,Haiku}") Signed-off-by:
Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 43d47040) -
Fixes: 4d0b2c7a ("ttn: Update shader->info as we generate code.") Signed-off-by:
Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rob Clark <robdclark@gmail.com> (cherry picked from commit 3afe9d79)
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Once we write the overlay to an image to be presented, we must not forget to put it back into present layout. Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111401
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 320b0f66) -
Add missing "device" platform v2: Add the missing platform (Eric) Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reported-by: Jean Hertel <jean.hertel@hotmail.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111529 Fixes: d6edccee ("egl: add EGL_platform_device support") Reviewed-by:
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The majority of these only apply the start argument to the input, but a few of them also does for the output-array. util_primconvert, the only user of this argument expects this pass a non-zero start-argument does not expect this to be applied to the output; if it is, it will write outside of allocated memory, leading to VRAM corruption. The reason this doesn't seem to have been noticed before, is that no driver currently use util_primconvert to convert a primitive-type to itself, which is the cases where this was broken. But for Zink, this will no longer be true, because we need to eliminate the use of 8-bit index-buffers. Signed-off-by:
Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: 28f3f8d4
("gallium/auxiliary/indices: add start param")
Reviewed-by: -
Travis is checking the exit code of the entire if statement. Fixes: 64ffc289 ("travis: add MacOS Scons build") Signed-off-by:
Vinson Lee <vlee@freedesktop.org> Acked-by:
Jose Fonseca <jfonseca@vmware.com> (cherry picked from commit 029b07b2)
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Commit 6f7306c0 ("swr/rast: Refactor memory API between rasterizer core and swr") unintentionally removed changes for llvm-9.0. Fixes: 6f7306c0 ("swr/rast: Refactor memory API between rasterizer core and swr") Fixes: 5dd9ad15 ("swr/rasterizer: Better implementation of scatter") Signed-off-by:
Jan Zielinski <jan.zielinski@intel.com>
(cherry picked from commit 3664a660) -
Dylan Baker authored
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This fixes a hang in shadertoy for radeonsi where a buffer was initialized with: value -= value with value being undefined. In this case LLVM replace the operation with an assignment to NaN. Cc: 19.1 19.2 <mesa-stable@lists.freedesktop.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111241 Reviewed-by:
Marek Olšák <marek.olsak@amd.com> (cherry picked from commit 47cc660d)
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This reverts commit 5a2e65be . Even though CONTEXT_CONTROL is emitted by the kernel, CONTEXT_CONTROL still needs to be emitted by the UMD, or else the driver will hang Cc: 19.2 <mesa-stable@lists.freedesktop.org> Signed-off-by:
Thong Thai <thong.thai@amd.com> Reviewed-by:
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I discovered this while looking at a shader that was hurt by some other work I'm doing. When I examined the changes, I was confused that one instance of a comparison that was used in a discard_if was (incorrectly) eliminated, while another instance used by a bcsel was (correctly) not eliminated. I had to use NIR_PRINT=true to see exactly where things when wrong. A bunch of shaders in Goat Simulator, Dungeon Defenders, Sanctum 2, and Strike Suit Zero were impacted. Reviewed-by:
Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Fixes: 405de7cc ("nir/range-analysis: Rudimentary value range analysis pass") All Intel platforms had similar results. (Ice Lake shown) total instructions in shared programs: 16280659 -> 16281075 (<.01%) instructions in affected programs: 21042 -> 21458 (1.98%) helped: 0 HURT: 136 HURT stats (abs) min: 1 max: 9 x̄: 3.06 x̃: 3 HURT stats (rel) min: 1.16% max: 6.12% x̄: 2.23% x̃: 2.03% 95% mean confidence interval for instructions value: 2.93 3.19 95% mean confidence interval for instructions %-change: 2.08% 2.37% Instructions are HURT. total cycles in shared programs: 367168270 -> 367170313 (<.01%) cycles in affected programs: 172020 -> 174063 (1.19%) helped: 14 HURT: 111 helped stats (abs) min: 2 max: 80 x̄: 21.21 x̃: 9 helped stats (rel) min: 0.10% max: 4.47% x̄: 1.35% x̃: 0.79% HURT stats (abs) min: 2 max: 584 x̄: 21.08 x̃: 5 HURT stats (rel) min: 0.12% max: 17.28% x̄: 1.55% x̃: 0.40% 95% mean confidence interval for cycles value: 5.41 27.28 95% mean confidence interval for cycles %-change: 0.64% 1.81% Cycles are HURT. (cherry picked from commit 7dba7df5)
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Found by inspection. I tried really, really hard to make a test case that would trigger this problem, but I was unsuccesful. It's very hard to get an instruction to produce a ne_zero result without ne_zero sources. The most plausible way is using bcsel. That proves problematic because bcsel interprets its sources as integers, so it cannot currently be used to "clean" values for floating point instructions. No shader-db changes on any Intel platform. Reviewed-by:
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Fixes piglit tests (new in piglit!110): - fs-underflow-fma-compare-zero.shader_test - fs-underflow-mul-compare-zero.shader_test v2: Add back part of comment accidentally deleted. Noticed by Caio. Remove is_not_zero function as it is no longer used. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111308 Fixes: fa116ce3 ("nir/range-analysis: Range tracking for ffma and flrp") Fixes: 405de7cc ("nir/range-analysis: Rudimentary value range analysis pass") Reviewed-by:
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Fixes piglit tests (new in piglit!110): - fs-underflow-exp2-compare-zero.shader_test Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111308 Fixes: 405de7cc ("nir/range-analysis: Rudimentary value range analysis pass") Reviewed-by:
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This didn't fix bug #111308, but it was found will trying to find the actual cause of that bug. Fixes piglit tests (new in piglit!110): - fs-fract-of-NaN.shader_test - fs-lt-nan-tautology.shader_test - fs-ge-nan-tautology.shader_test No shader-db changes on any Intel platform. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111308 Fixes: b77070e2 ("nir/algebraic: Use value range analysis to eliminate tautological compares") Reviewed-by:
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: -
We enabled fast clears at level > 0, but didn't minify the dimensions when comparing the box size, so we always thought it was a partial clear and as a result never actually enabled any. This eliminates some slow clears in Civilization VI, but they are mostly during initialization and not the main rendering. Thanks to Dan Walsh for noticing we had too many slow clears. Fixes: 393f659e ("iris: Enable fast clears on other miplevels and layers than 0.") Reviewed-by:
Rafael Antognolli <rafael.antognolli@intel.com> (cherry picked from commit 30b9ed92)
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See the previous commit for the explanation of the Fixes tag. Hurts 21 shaders in shader-db. All of the hurt shaders are in Unreal Engine 4 tech demos. Reviewed-by:
Matt Turner <mattst88@gmail.com> Fixes: 7afa26d4 ("nir: Add lowering for nir_op_bitfield_reverse.") (cherry picked from commit b418269d)
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This caused a problem on Sandybridge where an open-coded bitfieldReverse() function could be optimized to a nir_op_bitfield_reverse that would generate an unsupported BFREV instruction in the backend. This was encountered in some Unreal4 tech demos in shader-db. The bug was not previously noticed because we don't actually try to run those demos on Sandybridge. The fixes tag is a bit a lie. The actual bug was introduced about 26,000 commits earlier in 371c4b3c ("nir: Recognize open-coded bitfield_reverse."). Without the NIR lowering pass, the flag needed to avoid the optimization does not exist. Hopefully nobody will care to fix this on an earlier Mesa release. Reviewed-by:
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This fixes the following CTS test on 32-bit systems: GTF-GL46.gtf30.GL3Tests.packed_depth_stencil.packed_depth_stencil_init It does glGetTexImage of a 16-bit SNORM image, requesting 32-bit UNORM data. In get_tex_rgba_uncompressed, we round trip through float to handle image transfer ops for clamping. _mesa_format_convert does: _mesa_float_to_unorm(0.571428597f, 32) which translated to: _mesa_lroundevenf(0.571428597f * 0xffffffffu) which produced different results on 64-bit and 32-bit systems: 64-bit: result = 0x92492500 32-bit: result = 0x80000000 This is because the size of "long" varies between the two systems, and 0x92492500 is too large to fit in a signed 32-bit integer. To fix this, we switch to the new _mesa_i64roundevenf function which always does the 64-bit operation. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104395 Fixes: 594fc0f8 ("mesa: Replace F_TO_I() with _mesa_lroundevenf().") Reviewed-by:
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This always returns a int64_t, translating to _mesa_lroundevenf on systems where long is 64-bit, and llrintf where "long long" is needed. Fixes: 594fc0f8 ("mesa: Replace F_TO_I() with _mesa_lroundevenf().") Reviewed-by:
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Cc: 19.2 19.1 <mesa-stable@lists.freedesktop.org> Reviewed-by:
Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> (cherry picked from commit 360cf3c4)
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Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111414 Fixes: b758eed9 ("radeonsi: make sure that blend state != NULL and remove all NULL checking") Cc: 19.2 <mesa-stable@lists.freedesktop.org> Tested-by:
Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: -
Not sure how I missed this before, but compswap was hitting an assert here as it is it's own special case. Fixes: b5ac381d ("gallivm: add buffer operations to the tgsi->llvm conversion.") Reviewed-by:
Roland Scheidegger <sroland@vmware.com> (cherry picked from commit 1eda49cc)
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Looks like a copy/paste error. This patch prevents a segfault when running the following on BDW: INTEL_DEBUG=no8,no16,do32 ./deqp-vk -n \ dEQP-VK.subgroups.arithmetic.compute.subgroupmin_dvec4 For the curious, the message we're getting is: CS compile failed: Failure to register allocate. Reduce number of live scalar values to avoid this. Fixes: 864737ce ("i965/fs: Build 32-wide compute shader when needed.") Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: 
Paulo Zanoni <paulo.r.zanoni@intel.com>
(cherry picked from commit 848d5e44) -
This fixes dEQP-GLES3.functional.texture.specification subtests on iris: - texsubimage3d_depth.depth24_stencil8_2d_array - texsubimage3d_depth.depth32f_stencil8_2d_array - texsubimage3d_depth.depth_component32f_2d_array - texsubimage3d_depth.depth_component24_2d_array - texstorage2d.format.depth24_stencil8_2d - texstorage2d.format.depth32f_stencil8_2d - texstorage2d.format.depth_component24_2d - texstorage2d.format.depth_component32f_2d - texstorage3d.format.depth24_stencil8_2d_array - texstorage3d.format.depth32f_stencil8_2d_array - texstorage3d.format.depth_component24_2d_array - texstorage3d.format.depth_component32f_2d_array Here, something appears to be going wrong with having this bit set during blorp_copy operations for texture upload, which override the format to R8G8B8A8_UINT. AFAICT this bit should have no effect for integer surfaces, as it has to do with blending, and integer blending is not a thing. So it should be harmless to disable it. The Windows driver appears to be setting this bit universally, so I am unclear why we would need to. Perhaps they simply haven't run into this issue. Fixes: f741de23 ("isl: Enable Unorm Path in Color Pipe") Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 2e1be771) -
Jason suggested I remove this in review, and he's right. AFAICT this affects blending, and that just isn't going to happen on buffers. Fixes: f741de23 ("isl: Enable Unorm Path in Color Pipe") Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 1b090f06) -
16-bit and 32-bit values match hardware values but 8-bit doesn't. This fixes dEQP-VK.pipeline.input_assembly.* with 8-bit index. Fixes: 372c3dcf ("radv: implement VK_EXT_index_type_uint8") Signed-off-by:
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The virgl formats are fixed in time snapshots of the gallium ones, we just need to provide a translation table between them when we enter the hardware. This fixes a regression since Eric renumbered the gallium table. Fixes: c45c33a5 (gallium: Remove manual defining of PIPE_FORMAT enum values.) Bugzilla: https://bugs.freedesktop.org/111454 v1 by Dave Airlie <airlied@redhat.com> v2: virgl: Add a number of formats to the table that are used, e.g. for vertex attributes v3: cover some more missing formats from a piglit run Signed-off-by:
Gert Wollny <gert.wollny@collabora.com> (cherry picked from commit bba4d2f4)
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Put the uncached GTT type at a higher index than the visible VRAM type, rather than having GTT first. When we don't have dedicated VRAM, we don't have a non-visible VRAM type, and the property flags for GTT and visible VRAM are identical. According to the spec, for types with identical flags, we should give the one with better performance a lower index. Previously, apps which follow the spec guidance for choosing a memory type would have picked the GTT type in preference to visible VRAM (all Feral games will do this), and end up with lower performance. On a Ryzen 5 2500U laptop (Raven Ridge), this improves average FPS in the Rise of the Tomb Raider benchmark by up to ~30%. Tested a couple of other (Feral) games and saw similar improvement on those as well. Signed-off-by:
Alex Smith <asmith@feralinteractive.com> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by:
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On commit f6e7de41, we started emitting 3DSTATE_LINE_STIPPLE as part of the non-dynamic state. That gets re-emitted every time we bind a new VkPipeline. But that instruction is non-pipelined, and it caused a perf regression of about 9-10% on Dota2. This commit makes anv_dynamic_state_copy() return a mask with only the state that has changed when copying it. 3DSTATE_LINE_STIPPLE won't be emitted anymore unless it has changed, fixing the problem above. v2: Improve commit message and add documentation about skipped checks (Jason) Fixes: f6e7de41 ("anv: Implement VK_EXT_line_rasterization") Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 2b7ba9f2) -
timespec_get() is not available on macos, we need to pull in the include/c11/threads_posix.h helper. Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103674
Fixes: e2d761de
("util: drop final reference to p_compiler.h")
Reviewed-by: -
Make sure we read the updated data from the gpu in cases where WAIT_BIT is not set. Cc: 19.1 19.2 <mesa-stable@lists.freedesktop.org Reviewed-by:
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