1. 23 Aug, 2019 7 commits
    • Samuel Pitoiset's avatar
      ac,radv,radeonsi: remove LLVM 7 support · 1fd60db4
      Samuel Pitoiset authored
      Now that LLVM 9 will be released soon, we will only support
      LLVM 8, 9 and master (10).
      Signed-off-by: Samuel Pitoiset's avatarSamuel Pitoiset <samuel.pitoiset@gmail.com>
      Reviewed-by: default avatarMarek Olšák <marek.olsak@amd.com>
    • Tapani Pälli's avatar
      egl: reset blob cache set/get functions on terminate · 3e03a3fc
      Tapani Pälli authored
      Fixes errors seen with eglSetBlobCacheFuncsANDROID on Android when
      running dEQP that terminates and reinitializes a display.
      Fixes: 6f5b5709
       "egl: add support for EGL_ANDROID_blob_cache"
      Signed-off-by: Tapani Pälli's avatarTapani Pälli <tapani.palli@intel.com>
      Reviewed-by: Eric Engestrom's avatarEric Engestrom <eric.engestrom@intel.com>
    • Kenneth Graunke's avatar
      iris: Avoid unnecessary resolves on transfer maps · 2d799250
      Kenneth Graunke authored
      We were always resolving the buffer as if we were accessing it via
      CPU maps, which don't understand any auxiliary surfaces.  But we often
      copy to a temporary using BLORP, which understands compression just
      fine.  So we can avoid the resolve, and accelerate the copy as well.
      Fixes: 9d1334d2
       ("iris: Use copy_region and staging resources to avoid transfer stalls")
      Reviewed-by: Rafael Antognolli's avatarRafael Antognolli <rafael.antognolli@intel.com>
    • Kenneth Graunke's avatar
      iris: Drop copy format hacks from copy region based transfer path. · 136629a1
      Kenneth Graunke authored
      This doesn't work for compressed formats, as the source texture and
      temporary texture would have different block sizes.  (Forcing the driver
      to always take the GPU path would expose the bug.)  Instead, just use
      the source format for the temporary, and let blorp_copy deal with
      The one case where we can't do this is ASTC, because isl won't let us
      create a linear ASTC surface.  Fall back to the CPU paths there for now.
      Fixes: 9d1334d2
       ("iris: Use copy_region and staging resources to avoid transfer stalls")
      Reviewed-by: Rafael Antognolli's avatarRafael Antognolli <rafael.antognolli@intel.com>
    • Kenneth Graunke's avatar
      iris: Update fast clear colors on Gen9 with direct immediate writes. · 1cd13cce
      Kenneth Graunke authored
      Gen11 stores the fast clear color in an "indirect clear buffer", as
      a packed pixel value.  Gen9 hardware stores it as a float or integer
      value, which is interpreted via the format.  We were trying to store
      that in a buffer, for similarity with Icelake, and MI_COPY_MEM_MEM
      it from there to the actual SURFACE_STATE bytes where it's stored.
      This unfortunately doesn't work for blorp_copy(), which does bit-for-bit
      copies, and overrides the format to a CCS-compatible UINT format.  This
      causes the clear color to be interpreted in the overridden format.
      Normally, we provide the clear color on the CPU, and blorp_blit.c:2611
      converts it to a packed pixel value in the original format, then unpacks
      it in the overridden format, so the clear color we use expands to the
      bits we originally desired.
      However, BLORP doesn't support this pack/unpack with an indirect clear
      buffer, as it would need to do the math on the GPU.  On Gen11+, it isn't
      necessary, as the hardware does the right thing.
      This patch changes Gen9 to stop using an indirect clear buffer and
      simply do PIPE_CONTROLs with post-sync write immediate operations
      to store the new color over the surface states for regular drawing.
      BLORP continues streaming out surface states, and handles fast clear
      colors on the CPU.
      Fixes: 53c484ba
       ("iris: blorp using resolve hooks")
      Reviewed-by: Rafael Antognolli's avatarRafael Antognolli <rafael.antognolli@intel.com>
    • Kenneth Graunke's avatar
      iris: Fix broken aux.possible/sampler_usages bitmask handling · 117a0368
      Kenneth Graunke authored
      For renderable surfaces, we allocate SURFACE_STATEs for each bit in
      res->aux.possible_usages.  Sampler views use res->aux.sampler_usages.
      When pinning buffers, we call surf_state_offset_for_aux() to calculate
      the offset to the desired surface state.  surf_state_offset_for_aux()
      took an aux_modes parameter, which should be one of those two fields.
      However...it was not using that parameter.  It always used the broader
      res->aux.possible_usages field directly.
      One of the callers, update_clear_value(), was passing incorrect masks
      for this parameter.  It iterated through the bits in order, using
      u_bit_scan(), which destructively modifies the mask.  So each time we
      called it, the count of bits before our selected mode was 0, which would
      cause us to always update the SURFACE_STATE for ISL_AUX_USAGE_NONE,
      rather than updating each in turn.  This was hidden by the earlier bug
      where surf_state_offset_for_aux() ignored the parameter.
      Fixes: 7339660e
       ("iris: Add aux.sampler_usages.")
      Reviewed-by: Rafael Antognolli's avatarRafael Antognolli <rafael.antognolli@intel.com>
    • Kenneth Graunke's avatar
      iris: Replace devinfo->gen with GEN_GEN · f6c44549
      Kenneth Graunke authored
      This is genxml, we can compile out this code.
      Fixes: 26606672
       ("iris/gen8: Re-emit the SURFACE_STATE if the clear color changed.")
      Reviewed-by: Rafael Antognolli's avatarRafael Antognolli <rafael.antognolli@intel.com>
  2. 22 Aug, 2019 33 commits