- 11 Feb, 2014 2 commits
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Dave Airlie authored
this just ties the mesa code to the pre-existing gallium interface, I'm not sure what to do with the CSO stuff yet. 0.2: fix min/max bounds Acked-by:
Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Dave Airlie authored
This adds GS output and FS input support, even though FS input support isn't supported until GLSL 4.30 from what I can see. Signed-off-by:
Dave Airlie <airlied@redhat.com>
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- 10 Feb, 2014 6 commits
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Kenneth Graunke authored
There are only two sensible placements for 2x MSAA samples - and one is the mirror image of the other. I chose (0.25, 0.25) and (0.75, 0.75). Signed-off-by:
Kenneth Graunke <kenneth@whitecape.org> Reviewed-by:
Ian Romanick <ian.d.romanick@intel.com> Reviewed-by:
Chris Forbes <chrisf@ijw.co.nz>
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Kenneth Graunke authored
Storing a single value in an array is rather pointless. Signed-off-by:
Kenneth Graunke <kenneth@whitecape.org> Reviewed-by:
Ian Romanick <ian.d.romanick@intel.com> Reviewed-by:
Chris Forbes <chrisf@ijw.co.nz>
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Kenneth Graunke authored
The 4x and 8x cases contained identical code for extracting the X and Y sample offset values and converting them from U0.4 back to float. Without this refactoring, we'd have to duplicate it a third time in order to support 2x MSAA. Signed-off-by:
Kenneth Graunke <kenneth@whitecape.org> Reviewed-by:
Ian Romanick <ian.d.romanick@intel.com> Reviewed-by:
Chris Forbes <chrisf@ijw.co.nz>
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Ilia Mirkin authored
Apparently some players are ill-prepared for us claiming that a decoder exists only to have creating it fail, and express this poor preparation with crashes (e.g. flash). Check that firmware is there to increase the chances of there being a high correlation between reported capabilities and ability to create a decoder. Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Cc: 10.0 10.1 <mesa-stable@lists.freedesktop.org> Tested-by:
Emil Velikov <emil.l.velikov@gmail.com>
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Kenneth Graunke authored
In commit eeed49f5, Mark accidentally renamed MESA_FORMAT_S8_Z24 to MESA_FORMAT_Z24_UNORM_X8_UINT and MESA_FORMAT_X8_Z24 to MESA_FORMAT_Z24_UNORM_S8_UINT, reversing their sense. The commit message was correct, but what sed commands actually got run didn't match that. This patch swaps the two enum names, reversing them. This should undo the damage, but might break things if people have manually fixed a few instances in the meantime... Mark's commit also failed to mention renames: s/MESA_FORMAT_ARGB2101010_UINT\b/MESA_FORMAT_B10G10R10A2_UINT/g s/MESA_FORMAT_ABGR2101010\b/MESA_FORMAT_R10G10B10A2_UNORM/g but those seem okay. Signed-off-by:
Kenneth Graunke <kenneth@whitecape.org> Reviewed-by:
Marek Olšák <marek.olsak@amd.com>
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Maxence Le Doré authored
Already declared 5 lines before. Reviewed-by:
Ian Romanick <ian.d.romanick@intel.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org>
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- 09 Feb, 2014 3 commits
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Grigori Goronzy authored
v2: adjust limits for radeonsi and llvmpipe v3: add documentation Cc: "10.1" <mesa-stable@lists.freedesktop.org> Signed-off-by:
Marek Olšák <marek.olsak@amd.com>
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Siavash Eliasi authored
Note that it is OK to pass NULL pointers to this function since this commit: mesa: modified _mesa_align_free() to accept NULL pointer http://cgit.freedesktop.org/mesa/mesa/commit/?id=f0cc59d68a9f5231e8e2111393a1834858820735Reviewed-by:
Marek Olšák <marek.olsak@amd.com>
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Ilia Mirkin authored
nvfx_fragprog_assign_generic only allows for up to 10/8 texcoords for nv40/nv30. This fixes compilation of the varying-packing tests. Furthermore it appears that the last 2 inputs on nv4x don't seem to work in those tests, so just report 8 everywhere for now. Tested on NV42, NV44. NV4B appears to have additional problems. Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Cc: 9.1 9.2 10.0 10.1 <mesa-stable@lists.freedesktop.org>
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- 08 Feb, 2014 9 commits
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Christoph Bumiller authored
Cc: 10.1 <mesa-stable@lists.freedesktop.org>
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Brian Paul authored
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74723 Cc: "10.0" "10.1" <mesa-stable@lists.freedesktop.org> Tested-by:
Andreas Boll <andreas.boll.dev@gmail.com>
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Brian Paul authored
We don't need to allocate all the state related to GL_ARB_debug_output until some aspect of that extension is actually needed. The sizeof(gl_debug_state) is huge (~285KB on 64-bit systems), not even counting the 54(!) hash tables and lists that it contains. This change reduces the size of gl_context alone from 431KB bytes to 145KB bytes on 64-bit systems and from 277KB bytes to 78KB bytes on 32-bit systems. Reviewed-by:
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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Brian Paul authored
Whitespace changes, 78-column rewrapping, comment clean-ups, add some braces, etc. Reviewed-by:
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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Brian Paul authored
Reviewed-by:
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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Kenneth Graunke authored
This makes it obvious which number is which. Signed-off-by:
Kenneth Graunke <kenneth@whitecape.org> Reviewed-by:
Eric Anholt <eric@anholt.net>
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Kenneth Graunke authored
The WHILE instruction doesn't have UIP. It only has JIP. Signed-off-by:
Kenneth Graunke <kenneth@whitecape.org> Reviewed-by:
Eric Anholt <eric@anholt.net>
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Kenneth Graunke authored
The bits which normally contain the source register descriptions actually contain the JIP/UIP jump targets, which we already printed. Interpreting JIP/UIP as source registers results in some really creepy looking output, like IF statements with acc14.4<0,1,0>UD sources. Signed-off-by:
Kenneth Graunke <kenneth@whitecape.org> Reviewed-by:
Eric Anholt <eric@anholt.net>
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Kenneth Graunke authored
Broadwell's 3DSTATE_CLEAR_PARAMS packet expects a floating point value regardless of format. This means we need to stop converting it to UNORM. Storing the value as float would make sense, but since we already have a uint32_t field, this patch continues shoehorning it into that. In a sense, this makes mt->depth_clear_value the DWord you emit in the packet, rather than the clear value itself. Signed-off-by:
Kenneth Graunke <kenneth@whitecape.org> Reviewed-by:
Eric Anholt <eric@anholt.net>
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- 07 Feb, 2014 20 commits
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Christoph Bumiller authored
Cc: 10.1 <mesa-stable@lists.freedesktop.org>
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Christoph Bumiller authored
It's required for being able to use software methods now.
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Christoph Bumiller authored
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Chris Forbes authored
Signed-off-by:
Chris Forbes <chrisf@ijw.co.nz> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org>
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Chris Forbes authored
Signed-off-by:
Chris Forbes <chrisf@ijw.co.nz> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org>
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Chris Forbes authored
Signed-off-by:
Chris Forbes <chrisf@ijw.co.nz> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org>
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Chris Forbes authored
Signed-off-by:
Chris Forbes <chrisf@ijw.co.nz> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org>
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Chris Forbes authored
Signed-off-by:
Chris Forbes <chrisf@ijw.co.nz> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org>
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Eric Anholt authored
Reviewed-by:
Matt Turner <mattst88@gmail.com>
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Eric Anholt authored
Reviewed-by:
Matt Turner <mattst88@gmail.com>
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Eric Anholt authored
total instructions in shared programs: 1627754 -> 1624534 (-0.20%) instructions in affected programs: 45748 -> 42528 (-7.04%) GAINED: 3 LOST: 0 (serious sam, humus domino demo) Reviewed-by:
Matt Turner <mattst88@gmail.com>
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Eric Anholt authored
total instructions in shared programs: 1627826 -> 1627754 (-0.00%) instructions in affected programs: 6640 -> 6568 (-1.08%) GAINED: 0 LOST: 0 (HoN and savage2) Reviewed-by:
Matt Turner <mattst88@gmail.com>
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Eric Anholt authored
Reviewed-by:
Matt Turner <mattst88@gmail.com>
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Eric Anholt authored
v2: Fix pasteo of an extra abs being inserted (caught by many). Rewrite to drop the silly switch statement. Reviewed-by: Matt Turner <mattst88@gmail.com> (v1)
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Eric Anholt authored
We've had various bug reports over the years where miptrees are missing, and when I screwed it up while adding DRI2 to the modesetting driver, I figured I should put the info necessary for debug here. Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org>
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Eric Anholt authored
The intel_miptree_blit() code checks the format for us now, plus it handles xrgb vs argb for us. Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org>
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Kenneth Graunke authored
Signed-off-by:
Kenneth Graunke <kenneth@whitecape.org> Reviewed-by:
Ian Romanick <ian.d.romanick@intel.com>
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Kenneth Graunke authored
This makes it work on Broadwell, too. v2: Drop bogus double write to 3DPRIM_BASE_VERTEX register (caught by Chris Forbes). Signed-off-by:
Kenneth Graunke <kenneth@whitecape.org> Reviewed-by:
Ian Romanick <ian.d.romanick@intel.com> Reviewed-by:
Chris Forbes <chrisf@ijw.co.nz>
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Kenneth Graunke authored
This saves some boilerplate and hides the OUT_RELOC/OUT_RELOC64 distinction. Placing the function in intel_batchbuffer.c is rather arbitrary; there wasn't really an obvious place for it. Signed-off-by:
Kenneth Graunke <kenneth@whitecape.org> Reviewed-by:
Ian Romanick <ian.d.romanick@intel.com> Reviewed-by:
Chris Forbes <chrisf@ijw.co.nz>
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Kenneth Graunke authored
Since commit 9cee3ff5, INTEL_DEBUG=vs has caused a NULL pointer dereference for fixed-function/ARB programs. In the vec4 generators, "prog" is a gl_program, and "shader_prog" is the gl_shader_program. This is different than the FS visitor. Signed-off-by:
Kenneth Graunke <kenneth@whitecape.org> Reviewed-by:
Ian Romanick <ian.d.romanick@intel.com>
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