Commit fab1f07d authored by Jeff Smith's avatar Jeff Smith Committed by Brian Paul
Browse files

Grammar and spelling fixes


Signed-off-by: default avatarJeff Smith <whydoubt@yahoo.com>
Signed-off-by: Brian Paul's avatarBrian Paul <brianp@vmware.com>
parent 39c2d3ec
......@@ -644,7 +644,7 @@ Hints and Special Features:
- The Voodoo driver supports the GL_EXT_paletted_texture. it works
only with GL_COLOR_INDEX8_EXT, GL_RGBA palettes and the alpha value
is ignored because this is a limitation of the the current Glide
is ignored because this is a limitation of the current Glide
version and of the Voodoo hardware. See Mesa-3.1/3Dfx/demos/paltex.c for
a demo of this extension.
......
......@@ -28,7 +28,7 @@ cards.</p>
<ol>
<li>
<p>Run <code>configure</code> with the desired state trackers and and enable
<p>Run <code>configure</code> with the desired state trackers and enable
the Gallium driver for your hardware. For example</p>
<pre>
......
......@@ -1041,7 +1041,7 @@ glmFacetNormals(GLMmodel* model)
/* glmVertexNormals: Generates smooth vertex normals for a model.
* First builds a list of all the triangles each vertex is in. Then
* loops through each vertex in the the list averaging all the facet
* loops through each vertex in the list averaging all the facet
* normals of the triangles each vertex is in. Finally, sets the
* normal index in the triangle for the vertex to the generated smooth
* normal. If the dot product of a facet normal and the facet normal
......
......@@ -153,7 +153,7 @@ glmFacetNormals(GLMmodel* model);
/* glmVertexNormals: Generates smooth vertex normals for a model.
* First builds a list of all the triangles each vertex is in. Then
* loops through each vertex in the the list averaging all the facet
* loops through each vertex in the list averaging all the facet
* normals of the triangles each vertex is in. Finally, sets the
* normal index in the triangle for the vertex to the generated smooth
* normal. If the dot product of a facet normal and the facet normal
......
......@@ -30,7 +30,7 @@
* it (via \c glPopClientAttrib). After popping, the state of the VAO is
* examined.
*
* According the the APPLE_vertex_array_object spec, the contents of the VAO
* According to the APPLE_vertex_array_object spec, the contents of the VAO
* should be restored to the values that they had when pushed.
*
* \author Ian Romanick <idr@us.ibm.com>
......
......@@ -30,7 +30,7 @@
* it (via \c glPopClientAttrib). After popping, the state of the VAO is
* examined.
*
* According the the APPLE_vertex_array_object spec, the contents of the VAO
* According to the APPLE_vertex_array_object spec, the contents of the VAO
* should be restored to the values that they had when pushed.
*
* \author Ian Romanick <idr@us.ibm.com>
......
......@@ -71,7 +71,7 @@ os_time_sleep(int64_t usecs);
/*
* Helper function for detecting time outs, taking in account overflow.
*
* Returns true the the current time has elapsed beyond the specified interval.
* Returns true if the current time has elapsed beyond the specified interval.
*/
static INLINE boolean
os_time_timeout(int64_t start,
......
......@@ -1352,7 +1352,7 @@ gen_stencil_values(struct spe_function *f,
*/
ASSERT(fbS_reg != newS_reg);
/* The code also assumes the the stencil_max_value is of the form
/* The code also assumes that the stencil_max_value is of the form
* 2^n-1 and can therefore be used as a mask for the valid bits in
* addition to a maximum. Make sure this is the case as well.
* The clever math below exploits the fact that incrementing a
......
......@@ -135,7 +135,7 @@ cell_thread_function(void *arg)
/**
* Create the SPU threads. This is done once during driver initialization.
* This involves setting the the "init" message which is sent to each SPU.
* This involves setting the "init" message which is sent to each SPU.
* The init message specifies an SPU id, total number of SPUs, location
* and number of batch buffers, etc.
*/
......
......@@ -742,7 +742,7 @@ nv40_vertprog_translate(struct nv40_context *nv40,
}
/* Redirect post-transform vertex position to a temp if user clip
* planes are enabled. We need to append code the the vtxprog
* planes are enabled. We need to append code to the vtxprog
* to handle clip planes later.
*/
if (vp->ucp.nr) {
......
......@@ -540,7 +540,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_PVS_FIRST_INST(x) ((x) << 0)
# define R300_PVS_XYZW_VALID_INST(x) ((x) << 10)
# define R300_PVS_LAST_INST(x) ((x) << 20)
/* Addresses are relative the the vertex program parameters area. */
/* Addresses are relative to the vertex program parameters area. */
#define R300_VAP_PVS_CONST_CNTL 0x22D4
# define R300_PVS_CONST_BASE_OFFSET_SHIFT 0
# define R300_PVS_MAX_CONST_ADDR_SHIFT 16
......@@ -1857,7 +1857,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
* The destination register index is in FPI1 (color) and FPI3 (alpha)
* together with enable bits.
* There are separate enable bits for writing into temporary registers
* (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_*
* (DSTC_REG_* /DSTA_REG) and program output registers (DSTC_OUTPUT_*
* /DSTA_OUTPUT). You can write to both at once, or not write at all (the
* same index must be used for both).
*
......
......@@ -45,7 +45,7 @@ struct stw_framebuffer
/**
* This mutex has two purposes:
* - protect the access to the mutable data members below
* - prevent the the framebuffer from being deleted while being accessed.
* - prevent the framebuffer from being deleted while being accessed.
*
* It is OK to lock this mutex while holding the stw_device::fb_mutex lock,
* but the opposite must never happen.
......
......@@ -39,7 +39,7 @@
*or both at or below v. In addition, at least one of the ajacent verteces is
*strictly below or above v.
* A vertex is a relex vertex if the internals angle is strictly greater than
*180. In other words, if the the signed area is negative:
*180. In other words, if the signed area is negative:
*(x1, y1), (x2, y2), (x3, y3) are the three vertices along a polygon, the
*order is such that left hand side is inside the polygon. Then (x2,y2) is
*reflex if:
......
......@@ -142,7 +142,7 @@ static void CheckOrientation( GLUtesselator *tess )
GLUhalfEdge *e;
/* When we compute the normal automatically, we choose the orientation
* so that the the sum of the signed areas of all contours is non-negative.
* so that the sum of the signed areas of all contours is non-negative.
*/
area = 0;
for( f = fHead->next; f != fHead; f = f->next ) {
......
......@@ -698,7 +698,7 @@ setupLoaderExtensions(__DRIscreen *psp,
* \param drm_version Version of the kernel DRM.
* \param frame_buffer Data describing the location and layout of the
* framebuffer.
* \param pSAREA Pointer the the SAREA.
* \param pSAREA Pointer to the SAREA.
* \param fd Device handle for the DRM.
* \param extensions ??
* \param driver_modes Returns modes suppoted by the driver
......
......@@ -468,7 +468,7 @@ static void r128TexEnv( GLcontext *ctx, GLenum target,
* certain point. It is better than completely ignoring the LOD
* bias. Unfortunately there isn't much range in the bias, the
* spec mentions strides that vary between 0.5 and 2.0 but these
* numbers don't seem to relate the the GL LOD bias value at all.
* numbers don't seem to relate to the GL LOD bias value at all.
*/
if ( param[0] >= 1.0 ) {
bias = -128;
......
......@@ -690,7 +690,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R200_PVS_CNTL_1_PROGRAM_START_SHIFT 0
# define R200_PVS_CNTL_1_POS_END_SHIFT 10
# define R200_PVS_CNTL_1_PROGRAM_END_SHIFT 20
/* Addresses are relative the the vertex program parameters area. */
/* Addresses are relative to the vertex program parameters area. */
#define R200_VAP_PVS_CNTL_2 0x22d4
# define R200_PVS_CNTL_2_PARAM_OFFSET_SHIFT 0
# define R200_PVS_CNTL_2_PARAM_COUNT_SHIFT 16
......
......@@ -482,7 +482,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_PVS_FIRST_INST_SHIFT 0
# define R300_PVS_XYZW_VALID_INST_SHIFT 10
# define R300_PVS_LAST_INST_SHIFT 20
/* Addresses are relative the the vertex program parameters area. */
/* Addresses are relative to the vertex program parameters area. */
#define R300_VAP_PVS_CONST_CNTL 0x22D4
# define R300_PVS_CONST_BASE_OFFSET_SHIFT 0
# define R300_PVS_MAX_CONST_ADDR_SHIFT 16
......@@ -1760,7 +1760,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
* The destination register index is in FPI1 (color) and FPI3 (alpha)
* together with enable bits.
* There are separate enable bits for writing into temporary registers
* (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_*
* (DSTC_REG_* /DSTA_REG) and program output registers (DSTC_OUTPUT_*
* /DSTA_OUTPUT). You can write to both at once, or not write at all (the
* same index must be used for both).
*
......
......@@ -1900,7 +1900,7 @@ void radeonUploadTexMatrix( r100ContextPtr rmesa,
So: if we need the q coord in the end (solely determined by the texture
target, i.e. 2d / 1d / texrect targets) we swap the third and 4th row.
Additionally, if we don't have texgen but 4 tex coords submitted, we swap
column 3 and 4 (for the 2d / 1d / texrect targets) since the the q coord
column 3 and 4 (for the 2d / 1d / texrect targets) since the q coord
will get submitted in the "wrong", i.e. 3rd, slot.
If an app submits 3 coords for 2d targets, we assume it is saving on vertex
size and using the texture matrix to swap the r and q coords around (ut2k3
......
......@@ -287,7 +287,7 @@ extern void XMesaCopySubBuffer( XMesaBuffer b,
/*
* Return a pointer to the the Pixmap or XImage being used as the back
* Return a pointer to the Pixmap or XImage being used as the back
* color buffer of an XMesaBuffer. This function is a way to get "under
* the hood" of X/Mesa so one can manipulate the back buffer directly.
* Input: b - the XMesaBuffer
......
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